From 75e2d4fb303df9870bc724c4d9a795948f5947ad Mon Sep 17 00:00:00 2001 From: Yilin Sun Date: Thu, 22 Jun 2023 13:46:58 +0800 Subject: [PATCH] Initial commit with SWSD003. Signed-off-by: Yilin Sun --- .drone.yml | 2 +- .gitmodules | 3 + CMakeLists.txt | 13 +- MX_Generated/Core/Inc/stm32wlxx_hal_conf.h | 4 +- MX_Generated/Core/Inc/subghz.h | 52 ++ MX_Generated/Core/Inc/usart.h | 52 ++ MX_Generated/Core/Src/main.c | 2 + MX_Generated/Core/Src/subghz.c | 79 ++ MX_Generated/Core/Src/usart.c | 140 ++++ MX_Generated/STM32WLE5CBUx.ioc | 51 +- MX_Generated/startup_stm32wle5xx.s | 848 ++++++++++----------- SDK | 1 + lib/sx126x/CMakeLists.txt | 16 + lib/sx126x/SWSD003 | 1 + src/app_sx126x_impl.c | 23 + src/app_syscalls.c | 18 + src/main.c | 10 +- 17 files changed, 869 insertions(+), 446 deletions(-) create mode 100644 MX_Generated/Core/Inc/subghz.h create mode 100644 MX_Generated/Core/Inc/usart.h create mode 100644 MX_Generated/Core/Src/subghz.c create mode 100644 MX_Generated/Core/Src/usart.c create mode 160000 SDK create mode 100644 lib/sx126x/CMakeLists.txt create mode 160000 lib/sx126x/SWSD003 create mode 100644 src/app_sx126x_impl.c create mode 100644 src/app_syscalls.c diff --git a/.drone.yml b/.drone.yml index fcb2f41..a733eee 100644 --- a/.drone.yml +++ b/.drone.yml @@ -14,4 +14,4 @@ steps: commands: - mkdir build && cd build - cmake -DCMAKE_TOOLCHAIN_FILE=arm-none-eabi.cmake .. - - make yzl_wle5_template_FLASH.elf + - make yzl_wle5_lora_FLASH.elf diff --git a/.gitmodules b/.gitmodules index 0d9b3e5..984cdac 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +1,6 @@ [submodule "SDK"] path = SDK url = https://github.com/STMicroelectronics/STM32CubeWL.git +[submodule "lib/sx126x/SWSD003"] + path = lib/sx126x/SWSD003 + url = https://github.com/Lora-net/SWSD003.git diff --git a/CMakeLists.txt b/CMakeLists.txt index cf7efa7..973de0b 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,6 +1,6 @@ cmake_minimum_required(VERSION 3.10) -project(yzl_wle5_template) +project(yzl_wle5_lora) enable_language(CXX) enable_language(ASM) @@ -13,17 +13,25 @@ set(TARGET_SOURCES "MX_Generated/Core/Src/gpio.c" "MX_Generated/Core/Src/main.c" "MX_Generated/Core/Src/rtc.c" + "MX_Generated/Core/Src/subghz.c" "MX_Generated/Core/Src/stm32wlxx_hal_msp.c" "MX_Generated/Core/Src/stm32wlxx_it.c" "MX_Generated/Core/Src/system_stm32wlxx.c" + "MX_Generated/Core/Src/usart.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_cortex.c" + "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_gpio.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_pwr.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_pwr_ex.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_rcc.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_rcc_ex.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_rtc.c" "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_rtc_ex.c" + "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_subghz.c" + "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_uart.c" + "SDK/Drivers/STM32WLxx_HAL_Driver/Src/stm32wlxx_hal_uart_ex.c" + "src/app_sx126x_impl.c" + "src/app_syscalls.c" "src/main.c" ) @@ -43,6 +51,7 @@ set(TARGET_C_INCLUDES # Shared libraries linked with application set(TARGET_LIBS + "sx126x" "c" "m" "nosys" @@ -71,6 +80,8 @@ set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -f set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp") set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections") +add_subdirectory(lib/sx126x) + # Shared sources, includes and definitions add_compile_definitions(${TARGET_C_DEFINES}) include_directories(${TARGET_C_INCLUDES}) diff --git a/MX_Generated/Core/Inc/stm32wlxx_hal_conf.h b/MX_Generated/Core/Inc/stm32wlxx_hal_conf.h index a330dc9..c4dc628 100644 --- a/MX_Generated/Core/Inc/stm32wlxx_hal_conf.h +++ b/MX_Generated/Core/Inc/stm32wlxx_hal_conf.h @@ -53,9 +53,9 @@ /*#define HAL_SMARTCARD_MODULE_ENABLED */ /*#define HAL_SMBUS_MODULE_ENABLED */ /*#define HAL_SPI_MODULE_ENABLED */ -/*#define HAL_SUBGHZ_MODULE_ENABLED */ +#define HAL_SUBGHZ_MODULE_ENABLED /*#define HAL_TIM_MODULE_ENABLED */ -/*#define HAL_UART_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED /*#define HAL_USART_MODULE_ENABLED */ /*#define HAL_WWDG_MODULE_ENABLED */ #define HAL_EXTI_MODULE_ENABLED diff --git a/MX_Generated/Core/Inc/subghz.h b/MX_Generated/Core/Inc/subghz.h new file mode 100644 index 0000000..2c4f0f1 --- /dev/null +++ b/MX_Generated/Core/Inc/subghz.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file subghz.h + * @brief This file contains all the function prototypes for + * the subghz.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __SUBGHZ_H__ +#define __SUBGHZ_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern SUBGHZ_HandleTypeDef hsubghz; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_SUBGHZ_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __SUBGHZ_H__ */ + diff --git a/MX_Generated/Core/Inc/usart.h b/MX_Generated/Core/Inc/usart.h new file mode 100644 index 0000000..d2659f8 --- /dev/null +++ b/MX_Generated/Core/Inc/usart.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.h + * @brief This file contains all the function prototypes for + * the usart.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USART_H__ +#define __USART_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern UART_HandleTypeDef hlpuart1; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_LPUART1_UART_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USART_H__ */ + diff --git a/MX_Generated/Core/Src/main.c b/MX_Generated/Core/Src/main.c index 87b82c9..9f13e77 100644 --- a/MX_Generated/Core/Src/main.c +++ b/MX_Generated/Core/Src/main.c @@ -18,7 +18,9 @@ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" +#include "usart.h" #include "rtc.h" +#include "subghz.h" #include "gpio.h" /* Private includes ----------------------------------------------------------*/ diff --git a/MX_Generated/Core/Src/subghz.c b/MX_Generated/Core/Src/subghz.c new file mode 100644 index 0000000..28cbb0d --- /dev/null +++ b/MX_Generated/Core/Src/subghz.c @@ -0,0 +1,79 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file subghz.c + * @brief This file provides code for the configuration + * of the SUBGHZ instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "subghz.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +SUBGHZ_HandleTypeDef hsubghz; + +/* SUBGHZ init function */ +void MX_SUBGHZ_Init(void) +{ + + /* USER CODE BEGIN SUBGHZ_Init 0 */ + + /* USER CODE END SUBGHZ_Init 0 */ + + /* USER CODE BEGIN SUBGHZ_Init 1 */ + + /* USER CODE END SUBGHZ_Init 1 */ + hsubghz.Init.BaudratePrescaler = SUBGHZSPI_BAUDRATEPRESCALER_8; + if (HAL_SUBGHZ_Init(&hsubghz) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SUBGHZ_Init 2 */ + + /* USER CODE END SUBGHZ_Init 2 */ + +} + +void HAL_SUBGHZ_MspInit(SUBGHZ_HandleTypeDef* subghzHandle) +{ + + /* USER CODE BEGIN SUBGHZ_MspInit 0 */ + + /* USER CODE END SUBGHZ_MspInit 0 */ + /* SUBGHZ clock enable */ + __HAL_RCC_SUBGHZSPI_CLK_ENABLE(); + /* USER CODE BEGIN SUBGHZ_MspInit 1 */ + + /* USER CODE END SUBGHZ_MspInit 1 */ +} + +void HAL_SUBGHZ_MspDeInit(SUBGHZ_HandleTypeDef* subghzHandle) +{ + + /* USER CODE BEGIN SUBGHZ_MspDeInit 0 */ + + /* USER CODE END SUBGHZ_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SUBGHZSPI_CLK_DISABLE(); + /* USER CODE BEGIN SUBGHZ_MspDeInit 1 */ + + /* USER CODE END SUBGHZ_MspDeInit 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/MX_Generated/Core/Src/usart.c b/MX_Generated/Core/Src/usart.c new file mode 100644 index 0000000..0634085 --- /dev/null +++ b/MX_Generated/Core/Src/usart.c @@ -0,0 +1,140 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.c + * @brief This file provides code for the configuration + * of the USART instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2023 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "usart.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +UART_HandleTypeDef hlpuart1; + +/* LPUART1 init function */ + +void MX_LPUART1_UART_Init(void) +{ + + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + hlpuart1.Instance = LPUART1; + hlpuart1.Init.BaudRate = 115200; + hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; + hlpuart1.Init.StopBits = UART_STOPBITS_1; + hlpuart1.Init.Parity = UART_PARITY_NONE; + hlpuart1.Init.Mode = UART_MODE_TX_RX; + hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV8; + hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + hlpuart1.FifoMode = UART_FIFOMODE_ENABLE; + if (HAL_UART_Init(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_EnableFifoMode(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* USER CODE END LPUART1_Init 2 */ + +} + +void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + if(uartHandle->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspInit 0 */ + + /* USER CODE END LPUART1_MspInit 0 */ + + /** Initializes the peripherals clocks + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /* LPUART1 clock enable */ + __HAL_RCC_LPUART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**LPUART1 GPIO Configuration + PA2 ------> LPUART1_TX + PA3 ------> LPUART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN LPUART1_MspInit 1 */ + + /* USER CODE END LPUART1_MspInit 1 */ + } +} + +void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) +{ + + if(uartHandle->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspDeInit 0 */ + + /* USER CODE END LPUART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_LPUART1_CLK_DISABLE(); + + /**LPUART1 GPIO Configuration + PA2 ------> LPUART1_TX + PA3 ------> LPUART1_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); + + /* USER CODE BEGIN LPUART1_MspDeInit 1 */ + + /* USER CODE END LPUART1_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/MX_Generated/STM32WLE5CBUx.ioc b/MX_Generated/STM32WLE5CBUx.ioc index 1e68db2..b5ec87f 100644 --- a/MX_Generated/STM32WLE5CBUx.ioc +++ b/MX_Generated/STM32WLE5CBUx.ioc @@ -5,26 +5,37 @@ CAD.provider= File.Version=6 GPIO.groupedBy=Group By Peripherals KeepUserPlacement=false +LPUART1.BaudRate=115200 +LPUART1.ClockPrescaler=UART_PRESCALER_DIV8 +LPUART1.FIFOMode=UART_FIFOMODE_ENABLE +LPUART1.IPParameters=BaudRate,ClockPrescaler,FIFOMode,TXFIFOThreshold,RXFIFOThreshold +LPUART1.RXFIFOThreshold=UART_RXFIFO_THRESHOLD_1_2 +LPUART1.TXFIFOThreshold=UART_TXFIFO_THRESHOLD_1_2 Mcu.CPN=STM32WLE5CBU6 Mcu.Family=STM32WL Mcu.IP0=DEBUG -Mcu.IP1=NVIC -Mcu.IP2=RCC -Mcu.IP3=RTC -Mcu.IP4=SYS -Mcu.IPNb=5 +Mcu.IP1=LPUART1 +Mcu.IP2=NVIC +Mcu.IP3=RCC +Mcu.IP4=RTC +Mcu.IP5=SUBGHZ +Mcu.IP6=SYS +Mcu.IPNb=7 Mcu.Name=STM32WLE5CBUx Mcu.Package=UFQFPN48 -Mcu.Pin0=OSC_IN -Mcu.Pin1=OSC_OUT -Mcu.Pin2=PA13 -Mcu.Pin3=PC14-OSC32_IN -Mcu.Pin4=PC15-OSC32_OUT -Mcu.Pin5=PA14 -Mcu.Pin6=VP_RTC_VS_RTC_Activate -Mcu.Pin7=VP_RTC_VS_RTC_Calendar -Mcu.Pin8=VP_SYS_VS_Systick -Mcu.PinsNb=9 +Mcu.Pin0=PA2 +Mcu.Pin1=PA3 +Mcu.Pin10=VP_SUBGHZ_VS_SUBGHZ +Mcu.Pin11=VP_SYS_VS_Systick +Mcu.Pin2=OSC_IN +Mcu.Pin3=OSC_OUT +Mcu.Pin4=PA13 +Mcu.Pin5=PC14-OSC32_IN +Mcu.Pin6=PC15-OSC32_OUT +Mcu.Pin7=PA14 +Mcu.Pin8=VP_RTC_VS_RTC_Activate +Mcu.Pin9=VP_RTC_VS_RTC_Calendar +Mcu.PinsNb=12 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32WLE5CBUx @@ -49,6 +60,12 @@ PA13.Mode=Serial_Wire PA13.Signal=DEBUG_JTMS-SWDIO PA14.Mode=Serial_Wire PA14.Signal=DEBUG_JTCK-SWCLK +PA2.Locked=true +PA2.Mode=Asynchronous +PA2.Signal=LPUART1_TX +PA3.Locked=true +PA3.Mode=Asynchronous +PA3.Signal=LPUART1_RX PC14-OSC32_IN.Mode=LSE-External-Oscillator PC14-OSC32_IN.Signal=RCC_OSC32_IN PC15-OSC32_OUT.Mode=LSE-External-Oscillator @@ -89,7 +106,7 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=Makefile ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_RTC_Init-RTC-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_RTC_Init-RTC-false-HAL-true,4-MX_SUBGHZ_Init-SUBGHZ-false-HAL-true RCC.AHBFreq_Value=48000000 RCC.APB1Freq_Value=48000000 RCC.APB1TimFreq_Value=48000000 @@ -142,6 +159,8 @@ VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar +VP_SUBGHZ_VS_SUBGHZ.Mode=SUBGHZ_Activate +VP_SUBGHZ_VS_SUBGHZ.Signal=SUBGHZ_VS_SUBGHZ VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick board=custom diff --git a/MX_Generated/startup_stm32wle5xx.s b/MX_Generated/startup_stm32wle5xx.s index 8fd9bd4..84e71d3 100644 --- a/MX_Generated/startup_stm32wle5xx.s +++ b/MX_Generated/startup_stm32wle5xx.s @@ -1,424 +1,424 @@ -/** - ****************************************************************************** - * @file startup_stm32wle5xx.s - * @author MCD Application Team - * @brief STM32WLE5xx devices vector table for GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address, - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * Copyright (c) 2020-2021 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -.syntax unified -.cpu cortex-m4 -.fpu softvfp -.thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr r0, =_estack - mov sp, r0 /* set stack pointer */ - -/* Call the clock system initialization function.*/ - bl SystemInit - -/* Copy the data segment initializers from flash to SRAM */ - ldr r0, =_sdata - ldr r1, =_edata - ldr r2, =_sidata - movs r3, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r4, [r2, r3] - str r4, [r0, r3] - adds r3, r3, #4 - -LoopCopyDataInit: - adds r4, r0, r3 - cmp r4, r1 - bcc CopyDataInit - -/* Zero fill the bss segment. */ - ldr r2, =_sbss - ldr r4, =_ebss - movs r3, #0 - b LoopFillZerobss - -FillZerobss: - str r3, [r2] - adds r2, r2, #4 - -LoopFillZerobss: - cmp r2, r4 - bcc FillZerobss - -/* Call static constructors */ - bl __libc_init_array -/* Call the application's entry point.*/ - bl main - -LoopForever: - b LoopForever - - .size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler - -/****************************************************************************** -* -* The STM32WLE5xx vector table. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler /* Window Watchdog interrupt */ - .word PVD_PVM_IRQHandler /* PVD and PVM interrupt through EXTI */ - .word TAMP_STAMP_LSECSS_SSRU_IRQHandler /* RTC Tamper, RTC TimeStamp, LSECSS and RTC SSRU int.*/ - .word RTC_WKUP_IRQHandler /* RTC wakeup interrupt through EXTI[19] */ - .word FLASH_IRQHandler /* Flash memory global interrupt and Flash memory ECC */ - .word RCC_IRQHandler /* RCC global interrupt */ - .word EXTI0_IRQHandler /* EXTI line 0 interrupt */ - .word EXTI1_IRQHandler /* EXTI line 1 interrupt */ - .word EXTI2_IRQHandler /* EXTI line 2 interrupt */ - .word EXTI3_IRQHandler /* EXTI line 3 interrupt */ - .word EXTI4_IRQHandler /* EXTI line 4 interrupt */ - .word DMA1_Channel1_IRQHandler /* DMA1 channel 1 interrupt */ - .word DMA1_Channel2_IRQHandler /* DMA1 channel 2 interrupt */ - .word DMA1_Channel3_IRQHandler /* DMA1 channel 3 interrupt */ - .word DMA1_Channel4_IRQHandler /* DMA1 channel 4 interrupt */ - .word DMA1_Channel5_IRQHandler /* DMA1 channel 5 interrupt */ - .word DMA1_Channel6_IRQHandler /* DMA1 channel 6 interrupt */ - .word DMA1_Channel7_IRQHandler /* DMA1 channel 7 interrupt */ - .word ADC_IRQHandler /* ADC interrupt */ - .word DAC_IRQHandler /* DAC interrupt */ - .word 0 /* Reserved */ - .word COMP_IRQHandler /* COMP1 and COMP2 interrupt through EXTI */ - .word EXTI9_5_IRQHandler /* EXTI line 9_5 interrupt */ - .word TIM1_BRK_IRQHandler /* Timer 1 break interrupt */ - .word TIM1_UP_IRQHandler /* Timer 1 Update */ - .word TIM1_TRG_COM_IRQHandler /* Timer 1 trigger and communication */ - .word TIM1_CC_IRQHandler /* Timer 1 capture compare interrupt */ - .word TIM2_IRQHandler /* TIM2 global interrupt */ - .word TIM16_IRQHandler /* Timer 16 global interrupt */ - .word TIM17_IRQHandler /* Timer 17 global interrupt */ - .word I2C1_EV_IRQHandler /* I2C1 event interrupt */ - .word I2C1_ER_IRQHandler /* I2C1 event interrupt */ - .word I2C2_EV_IRQHandler /* I2C2 error interrupt */ - .word I2C2_ER_IRQHandler /* I2C2 error interrupt */ - .word SPI1_IRQHandler /* SPI1 global interrupt */ - .word SPI2_IRQHandler /* SPI2 global interrupt */ - .word USART1_IRQHandler /* USART1 global interrupt */ - .word USART2_IRQHandler /* USART2 global interrupt */ - .word LPUART1_IRQHandler /* LPUART1 global interrupt */ - .word LPTIM1_IRQHandler /* LPtimer 1 global interrupt */ - .word LPTIM2_IRQHandler /* LPtimer 2 global interrupt */ - .word EXTI15_10_IRQHandler /* EXTI line 15_10] interrupt through EXTI */ - .word RTC_Alarm_IRQHandler /* RTC Alarms A & B interrupt */ - .word LPTIM3_IRQHandler /* LPtimer 3 global interrupt */ - .word SUBGHZSPI_IRQHandler /* SUBGHZSPI global interrupt */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word HSEM_IRQHandler /* Semaphore interrupt 0 to CPU1 */ - .word I2C3_EV_IRQHandler /* I2C3 event interrupt */ - .word I2C3_ER_IRQHandler /* I2C3 error interrupt */ - .word SUBGHZ_Radio_IRQHandler /* Radio IRQs RFBUSY interrupt through EXTI */ - .word AES_IRQHandler /* AES global interrupt */ - .word RNG_IRQHandler /* RNG interrupt */ - .word PKA_IRQHandler /* PKA interrupt */ - .word DMA2_Channel1_IRQHandler /* DMA2 channel 1 interrupt */ - .word DMA2_Channel2_IRQHandler /* DMA2 channel 2 interrupt */ - .word DMA2_Channel3_IRQHandler /* DMA2 channel 3 interrupt */ - .word DMA2_Channel4_IRQHandler /* DMA2 channel 4 interrupt */ - .word DMA2_Channel5_IRQHandler /* DMA2 channel 5 interrupt */ - .word DMA2_Channel6_IRQHandler /* DMA2 channel 6 interrupt */ - .word DMA2_Channel7_IRQHandler /* DMA2 channel 7 interrupt */ - .word DMAMUX1_OVR_IRQHandler /* DMAMUX overrun interrupt */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_PVM_IRQHandler - .thumb_set PVD_PVM_IRQHandler,Default_Handler - - .weak TAMP_STAMP_LSECSS_SSRU_IRQHandler - .thumb_set TAMP_STAMP_LSECSS_SSRU_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak DAC_IRQHandler - .thumb_set DAC_IRQHandler,Default_Handler - - .weak COMP_IRQHandler - .thumb_set COMP_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_IRQHandler - .thumb_set TIM1_BRK_IRQHandler,Default_Handler - - .weak TIM1_UP_IRQHandler - .thumb_set TIM1_UP_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_IRQHandler - .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM16_IRQHandler - .thumb_set TIM16_IRQHandler,Default_Handler - - .weak TIM17_IRQHandler - .thumb_set TIM17_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak LPUART1_IRQHandler - .thumb_set LPUART1_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak LPTIM2_IRQHandler - .thumb_set LPTIM2_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak LPTIM3_IRQHandler - .thumb_set LPTIM3_IRQHandler,Default_Handler - - .weak SUBGHZSPI_IRQHandler - .thumb_set SUBGHZSPI_IRQHandler,Default_Handler - - .weak HSEM_IRQHandler - .thumb_set HSEM_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak SUBGHZ_Radio_IRQHandler - .thumb_set SUBGHZ_Radio_IRQHandler,Default_Handler - - .weak AES_IRQHandler - .thumb_set AES_IRQHandler,Default_Handler - - .weak RNG_IRQHandler - .thumb_set RNG_IRQHandler,Default_Handler - - .weak PKA_IRQHandler - .thumb_set PKA_IRQHandler,Default_Handler - - .weak DMA2_Channel1_IRQHandler - .thumb_set DMA2_Channel1_IRQHandler,Default_Handler - - .weak DMA2_Channel2_IRQHandler - .thumb_set DMA2_Channel2_IRQHandler,Default_Handler - - .weak DMA2_Channel3_IRQHandler - .thumb_set DMA2_Channel3_IRQHandler,Default_Handler - - .weak DMA2_Channel4_IRQHandler - .thumb_set DMA2_Channel4_IRQHandler,Default_Handler - - .weak DMA2_Channel5_IRQHandler - .thumb_set DMA2_Channel5_IRQHandler,Default_Handler - - .weak DMA2_Channel6_IRQHandler - .thumb_set DMA2_Channel6_IRQHandler,Default_Handler - - .weak DMA2_Channel7_IRQHandler - .thumb_set DMA2_Channel7_IRQHandler,Default_Handler - - .weak DMAMUX1_OVR_IRQHandler - .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler - - .weak SystemInit +/** + ****************************************************************************** + * @file startup_stm32wle5xx.s + * @author MCD Application Team + * @brief STM32WLE5xx devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + * Copyright (c) 2020-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +.syntax unified +.cpu cortex-m4 +.fpu softvfp +.thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + .size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The STM32WLE5xx vector table. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window Watchdog interrupt */ + .word PVD_PVM_IRQHandler /* PVD and PVM interrupt through EXTI */ + .word TAMP_STAMP_LSECSS_SSRU_IRQHandler /* RTC Tamper, RTC TimeStamp, LSECSS and RTC SSRU int.*/ + .word RTC_WKUP_IRQHandler /* RTC wakeup interrupt through EXTI[19] */ + .word FLASH_IRQHandler /* Flash memory global interrupt and Flash memory ECC */ + .word RCC_IRQHandler /* RCC global interrupt */ + .word EXTI0_IRQHandler /* EXTI line 0 interrupt */ + .word EXTI1_IRQHandler /* EXTI line 1 interrupt */ + .word EXTI2_IRQHandler /* EXTI line 2 interrupt */ + .word EXTI3_IRQHandler /* EXTI line 3 interrupt */ + .word EXTI4_IRQHandler /* EXTI line 4 interrupt */ + .word DMA1_Channel1_IRQHandler /* DMA1 channel 1 interrupt */ + .word DMA1_Channel2_IRQHandler /* DMA1 channel 2 interrupt */ + .word DMA1_Channel3_IRQHandler /* DMA1 channel 3 interrupt */ + .word DMA1_Channel4_IRQHandler /* DMA1 channel 4 interrupt */ + .word DMA1_Channel5_IRQHandler /* DMA1 channel 5 interrupt */ + .word DMA1_Channel6_IRQHandler /* DMA1 channel 6 interrupt */ + .word DMA1_Channel7_IRQHandler /* DMA1 channel 7 interrupt */ + .word ADC_IRQHandler /* ADC interrupt */ + .word DAC_IRQHandler /* DAC interrupt */ + .word 0 /* Reserved */ + .word COMP_IRQHandler /* COMP1 and COMP2 interrupt through EXTI */ + .word EXTI9_5_IRQHandler /* EXTI line 9_5 interrupt */ + .word TIM1_BRK_IRQHandler /* Timer 1 break interrupt */ + .word TIM1_UP_IRQHandler /* Timer 1 Update */ + .word TIM1_TRG_COM_IRQHandler /* Timer 1 trigger and communication */ + .word TIM1_CC_IRQHandler /* Timer 1 capture compare interrupt */ + .word TIM2_IRQHandler /* TIM2 global interrupt */ + .word TIM16_IRQHandler /* Timer 16 global interrupt */ + .word TIM17_IRQHandler /* Timer 17 global interrupt */ + .word I2C1_EV_IRQHandler /* I2C1 event interrupt */ + .word I2C1_ER_IRQHandler /* I2C1 event interrupt */ + .word I2C2_EV_IRQHandler /* I2C2 error interrupt */ + .word I2C2_ER_IRQHandler /* I2C2 error interrupt */ + .word SPI1_IRQHandler /* SPI1 global interrupt */ + .word SPI2_IRQHandler /* SPI2 global interrupt */ + .word USART1_IRQHandler /* USART1 global interrupt */ + .word USART2_IRQHandler /* USART2 global interrupt */ + .word LPUART1_IRQHandler /* LPUART1 global interrupt */ + .word LPTIM1_IRQHandler /* LPtimer 1 global interrupt */ + .word LPTIM2_IRQHandler /* LPtimer 2 global interrupt */ + .word EXTI15_10_IRQHandler /* EXTI line 15_10] interrupt through EXTI */ + .word RTC_Alarm_IRQHandler /* RTC Alarms A & B interrupt */ + .word LPTIM3_IRQHandler /* LPtimer 3 global interrupt */ + .word SUBGHZSPI_IRQHandler /* SUBGHZSPI global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word HSEM_IRQHandler /* Semaphore interrupt 0 to CPU1 */ + .word I2C3_EV_IRQHandler /* I2C3 event interrupt */ + .word I2C3_ER_IRQHandler /* I2C3 error interrupt */ + .word SUBGHZ_Radio_IRQHandler /* Radio IRQs RFBUSY interrupt through EXTI */ + .word AES_IRQHandler /* AES global interrupt */ + .word RNG_IRQHandler /* RNG interrupt */ + .word PKA_IRQHandler /* PKA interrupt */ + .word DMA2_Channel1_IRQHandler /* DMA2 channel 1 interrupt */ + .word DMA2_Channel2_IRQHandler /* DMA2 channel 2 interrupt */ + .word DMA2_Channel3_IRQHandler /* DMA2 channel 3 interrupt */ + .word DMA2_Channel4_IRQHandler /* DMA2 channel 4 interrupt */ + .word DMA2_Channel5_IRQHandler /* DMA2 channel 5 interrupt */ + .word DMA2_Channel6_IRQHandler /* DMA2 channel 6 interrupt */ + .word DMA2_Channel7_IRQHandler /* DMA2 channel 7 interrupt */ + .word DMAMUX1_OVR_IRQHandler /* DMAMUX overrun interrupt */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_PVM_IRQHandler + .thumb_set PVD_PVM_IRQHandler,Default_Handler + + .weak TAMP_STAMP_LSECSS_SSRU_IRQHandler + .thumb_set TAMP_STAMP_LSECSS_SSRU_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak DAC_IRQHandler + .thumb_set DAC_IRQHandler,Default_Handler + + .weak COMP_IRQHandler + .thumb_set COMP_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_IRQHandler + .thumb_set TIM1_BRK_IRQHandler,Default_Handler + + .weak TIM1_UP_IRQHandler + .thumb_set TIM1_UP_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_IRQHandler + .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak LPUART1_IRQHandler + .thumb_set LPUART1_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak LPTIM2_IRQHandler + .thumb_set LPTIM2_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak LPTIM3_IRQHandler + .thumb_set LPTIM3_IRQHandler,Default_Handler + + .weak SUBGHZSPI_IRQHandler + .thumb_set SUBGHZSPI_IRQHandler,Default_Handler + + .weak HSEM_IRQHandler + .thumb_set HSEM_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak SUBGHZ_Radio_IRQHandler + .thumb_set SUBGHZ_Radio_IRQHandler,Default_Handler + + .weak AES_IRQHandler + .thumb_set AES_IRQHandler,Default_Handler + + .weak RNG_IRQHandler + .thumb_set RNG_IRQHandler,Default_Handler + + .weak PKA_IRQHandler + .thumb_set PKA_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak DMA2_Channel6_IRQHandler + .thumb_set DMA2_Channel6_IRQHandler,Default_Handler + + .weak DMA2_Channel7_IRQHandler + .thumb_set DMA2_Channel7_IRQHandler,Default_Handler + + .weak DMAMUX1_OVR_IRQHandler + .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler + + .weak SystemInit diff --git a/SDK b/SDK new file mode 160000 index 0000000..5b47f70 --- /dev/null +++ b/SDK @@ -0,0 +1 @@ +Subproject commit 5b47f70ce5f9016b92a8bedb037d00d86b7c8080 diff --git a/lib/sx126x/CMakeLists.txt b/lib/sx126x/CMakeLists.txt new file mode 100644 index 0000000..73efc19 --- /dev/null +++ b/lib/sx126x/CMakeLists.txt @@ -0,0 +1,16 @@ +cmake_minimum_required(VERSION 3.10) + +project(sx126x) + +set(SX126X_SRCS + "SWSD003/sx126x/sx126x_driver/src/lr_fhss_mac.c" + "SWSD003/sx126x/sx126x_driver/src/sx126x.c" + "SWSD003/sx126x/sx126x_driver/src/sx126x_lr_fhss.c" +) + +set(SX126X_INCS + "SWSD003/sx126x/sx126x_driver/src" +) + +add_library(${PROJECT_NAME} ${SX126X_SRCS}) +target_include_directories(${PROJECT_NAME} PUBLIC ${SX126X_INCS}) \ No newline at end of file diff --git a/lib/sx126x/SWSD003 b/lib/sx126x/SWSD003 new file mode 160000 index 0000000..760bf87 --- /dev/null +++ b/lib/sx126x/SWSD003 @@ -0,0 +1 @@ +Subproject commit 760bf8751d86faa8b80cb71417f9a263b8470e15 diff --git a/src/app_sx126x_impl.c b/src/app_sx126x_impl.c new file mode 100644 index 0000000..72f40d7 --- /dev/null +++ b/src/app_sx126x_impl.c @@ -0,0 +1,23 @@ +/* HAL drivers */ +#include "stm32wlxx_hal.h" + +/* SX126x */ +#include "sx126x_hal.h" + +sx126x_hal_status_t sx126x_hal_write(const void* context, const uint8_t* command, const uint16_t command_length, + const uint8_t* data, const uint16_t data_length) { + return SX126X_HAL_STATUS_OK; +} + +sx126x_hal_status_t sx126x_hal_read(const void* context, const uint8_t* command, const uint16_t command_length, + uint8_t* data, const uint16_t data_length) { + return SX126X_HAL_STATUS_OK; +} + +sx126x_hal_status_t sx126x_hal_reset(const void* context) { + return SX126X_HAL_STATUS_OK; +} + +sx126x_hal_status_t sx126x_hal_wakeup(const void* context) { + return SX126X_HAL_STATUS_OK; +} \ No newline at end of file diff --git a/src/app_syscalls.c b/src/app_syscalls.c new file mode 100644 index 0000000..8e8b572 --- /dev/null +++ b/src/app_syscalls.c @@ -0,0 +1,18 @@ +#include + +/* HAL drivers */ +#include "stm32wlxx_hal.h" + +/* MX Generated */ +#include "usart.h" + +int _write(int file, char *ptr, int len) { + /* Not TTY write */ + if (file != STDOUT_FILENO && file != STDERR_FILENO) { + return len; + } + + HAL_UART_Transmit(&hlpuart1, (uint8_t *)ptr, len, 100); + + return len; +} \ No newline at end of file diff --git a/src/main.c b/src/main.c index 1756a48..59be6e2 100644 --- a/src/main.c +++ b/src/main.c @@ -1,9 +1,11 @@ -#include +#include /* MX Generated headers */ -#include "main.h" #include "gpio.h" +#include "main.h" #include "rtc.h" +#include "subghz.h" +#include "usart.h" extern void SystemClock_Config(void); @@ -15,6 +17,10 @@ int main(void) { MX_GPIO_Init(); SystemClock_Config(); MX_RTC_Init(); + MX_LPUART1_UART_Init(); + MX_SUBGHZ_Init(); + + printf("Initialization completed.\r\n"); for (;;) { /* -- */