u-boot/arch/arm/include/asm/arch-sunxi/i2c.h

/*
 * Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef _SUNXI_I2C_H_
#define _SUNXI_I2C_H_

#include <asm/arch/cpu.h>

#define CONFIG_I2C_MVTWSI_BASE0	SUNXI_TWI0_BASE
/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
#define CONFIG_SYS_TCLK		24000000

#endif
sunxi: Add i2c support Add support for the i2c controller found on all Allwinner sunxi SoCs, this is the same controller as found on the Marvell orion5x and kirkwood SoC families, with a slightly different register layout, so this patch uses the existing mvtwsi code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Heiko Schocher <hs@denx.de> [ ijc -- updated u-boot-spl-fel.lds ] 2014-06-13 20:55:49 +00:00			`/*`
			`* Copyright 2014 - Hans de Goede <hdegoede@redhat.com>`
			`*`
			`* SPDX-License-Identifier: GPL-2.0+`
			`*/`
			`#ifndef _SUNXI_I2C_H_`
			`#define _SUNXI_I2C_H_`

			`#include <asm/arch/cpu.h>`

i2c: mvtwsi: Support for up to 4 different controllers Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI controller. However, other platforms using MVTWSI may come with more: this is the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found on the same chip. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> 2015-04-10 21:09:51 +00:00			`#define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE`
sunxi: Add i2c support Add support for the i2c controller found on all Allwinner sunxi SoCs, this is the same controller as found on the Marvell orion5x and kirkwood SoC families, with a slightly different register layout, so this patch uses the existing mvtwsi code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Heiko Schocher <hs@denx.de> [ ijc -- updated u-boot-spl-fel.lds ] 2014-06-13 20:55:49 +00:00			`/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */`
			`#define CONFIG_SYS_TCLK 24000000`

			`#endif`