gpio: slg7xl45106: Add support for slg7xl45106 i2c gpo expander
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by writing and reading corresponding gpo bit value into its data register. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
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@ -636,6 +636,7 @@ F: arch/arm/mach-zynqmp/
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F: drivers/clk/clk_zynqmp.c
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F: driver/firmware/firmware-zynqmp.c
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F: drivers/fpga/zynqpl.c
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F: drivers/gpio/gpio_slg7xl45106.c
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F: drivers/gpio/zynq_gpio.c
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F: drivers/gpio/zynqmp_gpio_modepin.c
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F: drivers/i2c/i2c-cdns.c
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@ -550,4 +550,12 @@ config SL28CPLD_GPIO
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help
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Support GPIO access on Kontron sl28cpld board management controllers.
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config SLG7XL45106_I2C_GPO
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bool "slg7xl45106 i2c gpo expander"
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depends on DM_GPIO
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help
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Support for slg7xl45106 i2c gpo expander. It is an i2c based
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8-bit gpo expander, all gpo lines are controlled by writing
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value into data register.
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endif
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@ -72,3 +72,4 @@ obj-$(CONFIG_NOMADIK_GPIO) += nmk_gpio.o
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obj-$(CONFIG_MAX7320_GPIO) += max7320_gpio.o
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obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
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obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
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obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
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115
drivers/gpio/gpio_slg7xl45106.c
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115
drivers/gpio/gpio_slg7xl45106.c
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@ -0,0 +1,115 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* slg7xl45106_i2c_gpo driver
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*
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* Copyright (C) 2021 Xilinx, Inc.
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*/
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#include <common.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <dm.h>
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#include <i2c.h>
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#include <asm/arch/hardware.h>
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#define SLG7XL45106_REG 0xdb
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static int slg7xl45106_i2c_gpo_direction_input(struct udevice *dev,
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unsigned int offset)
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{
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return 0;
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}
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static int slg7xl45106_i2c_gpo_xlate(struct udevice *dev,
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struct gpio_desc *desc,
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struct ofnode_phandle_args *args)
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{
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desc->offset = (unsigned int)args->args[0];
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return 0;
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}
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static int slg7xl45106_i2c_gpo_set_value(struct udevice *dev,
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unsigned int offset, int value)
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{
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int ret;
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u8 val;
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ret = dm_i2c_read(dev, SLG7XL45106_REG, &val, 1);
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if (ret)
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return ret;
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if (value)
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val |= BIT(offset);
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else
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val &= ~BIT(offset);
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return dm_i2c_write(dev, SLG7XL45106_REG, &val, 1);
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}
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static int slg7xl45106_i2c_gpo_direction_output(struct udevice *dev,
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unsigned int offset, int value)
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{
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return slg7xl45106_i2c_gpo_set_value(dev, offset, value);
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}
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static int slg7xl45106_i2c_gpo_get_value(struct udevice *dev,
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unsigned int offset)
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{
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int ret;
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u8 val;
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ret = dm_i2c_read(dev, SLG7XL45106_REG, &val, 1);
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if (ret)
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return ret;
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return !!(val & BIT(offset));
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}
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static int slg7xl45106_i2c_gpo_get_function(struct udevice *dev,
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unsigned int offset)
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{
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return GPIOF_OUTPUT;
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}
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static const struct dm_gpio_ops slg7xl45106_i2c_gpo_ops = {
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.direction_input = slg7xl45106_i2c_gpo_direction_input,
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.direction_output = slg7xl45106_i2c_gpo_direction_output,
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.get_value = slg7xl45106_i2c_gpo_get_value,
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.set_value = slg7xl45106_i2c_gpo_set_value,
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.get_function = slg7xl45106_i2c_gpo_get_function,
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.xlate = slg7xl45106_i2c_gpo_xlate,
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};
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static int slg7xl45106_i2c_gpo_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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const void *label_ptr;
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label_ptr = dev_read_prop(dev, "label", NULL);
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if (label_ptr) {
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uc_priv->bank_name = strdup(label_ptr);
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if (!uc_priv->bank_name)
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return -ENOMEM;
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} else {
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uc_priv->bank_name = dev->name;
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}
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uc_priv->gpio_count = 8;
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return 0;
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}
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static const struct udevice_id slg7xl45106_i2c_gpo_ids[] = {
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{ .compatible = "dlg,slg7xl45106",},
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{ }
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};
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U_BOOT_DRIVER(slg7xl45106_i2c_gpo) = {
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.name = "slg7xl45106_i2c_gpo",
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.id = UCLASS_GPIO,
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.ops = &slg7xl45106_i2c_gpo_ops,
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.of_match = slg7xl45106_i2c_gpo_ids,
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.probe = slg7xl45106_i2c_gpo_probe,
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};
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