Minor sandbox enhancements / fixes
tpm improvements to clear up v1/v2 support buildman toolchain fixes New serial options to set/get config -----BEGIN PGP SIGNATURE----- iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAlwIe0gRHHNqZ0BjaHJv bWl1bS5vcmcACgkQfxc6PpAIreY02wgAjK9U1ADmoNi4xWgtq83EerxOGTq68BRD CfnUDgI+FQHNv/LxdZ8lZ2lgGG1xXZ8mdeHWghllHoLEnwMQ3LxfDRnpkyC6VBE9 LvZF4F7BhTnGsKImlloQ5oMhKI4sDKjqRkRL3D633x5dq9Z571obAyGwLMo67vv6 U8iv1mRMr6au46pLvH25DF6h5LuM7TBSJVDlzmFmmD++r/YDroTJfo07qdo8sNqS 0hDPjgp3uqf1mX2cbNHk56a3DmO9fL6Gcvdv0LHGQvRyfQ36TY+cEcDU2y2p+tl+ t1LFamfZvalix9AyJegr3qGMOb9B20ar89EItXzH9J+ahnlZmEat+w== =VAMW -----END PGP SIGNATURE----- Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dm Minor sandbox enhancements / fixes tpm improvements to clear up v1/v2 support buildman toolchain fixes New serial options to set/get config
This commit is contained in:
Tom Rini
commit
2a055ea532
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@ -380,6 +380,11 @@ S: Maintained
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T: git git://git.denx.de/u-boot-microblaze.git
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F: arch/arm/mach-zynqmp-r5/
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BINMAN
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M: Simon Glass <sjg@chromium.org>
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S: Maintained
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F: tools/binman/
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BUILDMAN
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M: Simon Glass <sjg@chromium.org>
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S: Maintained
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@ -1,6 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0+
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head-y := arch/sandbox/cpu/start.o
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head-y := arch/sandbox/cpu/start.o arch/sandbox/cpu/os.o
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head-$(CONFIG_SANDBOX_SDL) += arch/sandbox/cpu/sdl.o
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libs-y += arch/sandbox/cpu/
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libs-y += arch/sandbox/lib/
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@ -17,11 +17,12 @@ PLATFORM_CPPFLAGS += $(shell sdl-config --cflags)
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endif
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endif
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cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds \
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cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \
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-Wl,--start-group $(u-boot-main) -Wl,--end-group \
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$(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map
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cmd_u-boot-spl = (cd $(obj) && $(CC) -o $(SPL_BIN) -Wl,-T u-boot-spl.lds \
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$(patsubst $(obj)/%,%,$(u-boot-spl-init)) \
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-Wl,--start-group $(patsubst $(obj)/%,%,$(u-boot-spl-main)) \
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$(patsubst $(obj)/%,%,$(u-boot-spl-platdata)) -Wl,--end-group \
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$(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot-spl.map -Wl,--gc-sections)
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@ -5,10 +5,11 @@
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# (C) Copyright 2000-2003
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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obj-y := cpu.o os.o start.o state.o
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obj-y := cpu.o state.o
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extra-y := start.o os.o
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extra-$(CONFIG_SANDBOX_SDL) += sdl.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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obj-$(CONFIG_ETH_SANDBOX_RAW) += eth-raw-os.o
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obj-$(CONFIG_SANDBOX_SDL) += sdl.o
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# os.c is build in the system environment, so needs standard includes
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# CFLAGS_REMOVE_os.o cannot be used to drop header include path
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@ -668,7 +668,7 @@ static int os_jump_to_file(const char *fname)
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os_free(argv);
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if (err) {
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perror("Unable to run image");
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printf("Image filename '%s'\n", mem_fname);
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printf("Image filename '%s'\n", fname);
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return err;
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}
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@ -69,7 +69,11 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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const char *fname = spl_image->arg;
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os_fd_restore();
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os_spl_to_uboot(fname);
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if (fname) {
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os_fd_restore();
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os_spl_to_uboot(fname);
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} else {
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printf("No filename provided for U-Boot\n");
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}
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hang();
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}
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@ -180,6 +180,7 @@ static int sandbox_cmdline_cb_memory(struct sandbox_state *state,
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printf("Failed to read RAM buffer '%s': %d\n", arg, err);
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return err;
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}
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state->ram_buf_read = true;
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return 0;
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}
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@ -301,6 +302,12 @@ int board_run_command(const char *cmdline)
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static void setup_ram_buf(struct sandbox_state *state)
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{
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/* Zero the RAM buffer if we didn't read it, to keep valgrind happy */
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if (!state->ram_buf_read) {
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memset(state->ram_buf, '\0', state->ram_size);
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printf("clear %p %x\n", state->ram_buf, state->ram_size);
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}
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gd->arch.ram_buf = state->ram_buf;
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gd->ram_size = state->ram_size;
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}
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@ -690,6 +690,7 @@
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dev@0,0 {
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compatible = "denx,u-boot-fdt-dummy";
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reg = <0 0x0 0x1000>;
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reg-names = "sandbox-dummy-0";
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};
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dev@1,100 {
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@ -90,6 +90,7 @@ struct sandbox_state {
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bool show_test_output; /* Don't suppress stdout in tests */
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int default_log_level; /* Default log level for sandbox */
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bool show_of_platdata; /* Show of-platdata in SPL */
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bool ram_buf_read; /* true if we read the RAM buffer */
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/* Pointer to information for each SPI bus/cs */
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struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS]
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@ -303,6 +303,57 @@ struct acpi_mcfg_mmconfig {
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/* ACPI global NVS structure */
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struct acpi_global_nvs;
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/* DBG2 definitions are partially used for SPCR interface_type */
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/* Types for port_type field */
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#define ACPI_DBG2_SERIAL_PORT 0x8000
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#define ACPI_DBG2_1394_PORT 0x8001
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#define ACPI_DBG2_USB_PORT 0x8002
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#define ACPI_DBG2_NET_PORT 0x8003
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/* Subtypes for port_subtype field */
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#define ACPI_DBG2_16550_COMPATIBLE 0x0000
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#define ACPI_DBG2_16550_SUBSET 0x0001
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#define ACPI_DBG2_ARM_PL011 0x0003
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#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
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#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
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#define ACPI_DBG2_ARM_DCC 0x000F
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#define ACPI_DBG2_BCM2835 0x0010
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#define ACPI_DBG2_1394_STANDARD 0x0000
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#define ACPI_DBG2_USB_XHCI 0x0000
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#define ACPI_DBG2_USB_EHCI 0x0001
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#define ACPI_DBG2_UNKNOWN 0x00FF
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/* SPCR (Serial Port Console Redirection table) */
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struct __packed acpi_spcr {
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struct acpi_table_header header;
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u8 interface_type;
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u8 reserved[3];
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struct acpi_gen_regaddr serial_port;
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u8 interrupt_type;
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u8 pc_interrupt;
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u32 interrupt; /* Global system interrupt */
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u8 baud_rate;
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u8 parity;
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u8 stop_bits;
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u8 flow_control;
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u8 terminal_type;
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u8 reserved1;
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u16 pci_device_id; /* Must be 0xffff if not PCI device */
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u16 pci_vendor_id; /* Must be 0xffff if not PCI device */
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u8 pci_bus;
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u8 pci_device;
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u8 pci_function;
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u32 pci_flags;
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u8 pci_segment;
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u32 reserved2;
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};
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/* These can be used by the target port */
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void acpi_fill_header(struct acpi_table_header *header, char *signature);
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@ -10,6 +10,7 @@
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#include <cpu.h>
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#include <dm.h>
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#include <dm/uclass-internal.h>
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#include <serial.h>
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#include <version.h>
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#include <asm/acpi/global_nvs.h>
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#include <asm/acpi_table.h>
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@ -336,6 +337,115 @@ static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
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header->checksum = table_compute_checksum((void *)mcfg, header->length);
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}
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static void acpi_create_spcr(struct acpi_spcr *spcr)
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{
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struct acpi_table_header *header = &(spcr->header);
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struct serial_device_info serial_info = {0};
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ulong serial_address, serial_offset;
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uint serial_config;
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uint serial_width;
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int access_size;
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int space_id;
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int ret;
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/* Fill out header fields */
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acpi_fill_header(header, "SPCR");
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header->length = sizeof(struct acpi_spcr);
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header->revision = 2;
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ret = serial_getinfo(&serial_info);
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if (ret)
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serial_info.type = SERIAL_CHIP_UNKNOWN;
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/* Encode chip type */
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switch (serial_info.type) {
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case SERIAL_CHIP_16550_COMPATIBLE:
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spcr->interface_type = ACPI_DBG2_16550_COMPATIBLE;
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break;
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case SERIAL_CHIP_UNKNOWN:
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default:
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spcr->interface_type = ACPI_DBG2_UNKNOWN;
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break;
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}
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/* Encode address space */
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switch (serial_info.addr_space) {
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case SERIAL_ADDRESS_SPACE_MEMORY:
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space_id = ACPI_ADDRESS_SPACE_MEMORY;
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break;
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case SERIAL_ADDRESS_SPACE_IO:
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default:
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space_id = ACPI_ADDRESS_SPACE_IO;
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break;
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}
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serial_width = serial_info.reg_width * 8;
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serial_offset = serial_info.reg_offset << serial_info.reg_shift;
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serial_address = serial_info.addr + serial_offset;
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/* Encode register access size */
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switch (serial_info.reg_shift) {
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case 0:
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access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
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break;
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case 1:
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access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
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break;
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case 2:
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access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
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break;
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case 3:
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access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS;
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break;
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default:
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access_size = ACPI_ACCESS_SIZE_UNDEFINED;
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break;
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}
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debug("UART type %u @ %lx\n", spcr->interface_type, serial_address);
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/* Fill GAS */
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spcr->serial_port.space_id = space_id;
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spcr->serial_port.bit_width = serial_width;
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spcr->serial_port.bit_offset = 0;
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spcr->serial_port.access_size = access_size;
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spcr->serial_port.addrl = lower_32_bits(serial_address);
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spcr->serial_port.addrh = upper_32_bits(serial_address);
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/* Encode baud rate */
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switch (serial_info.baudrate) {
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case 9600:
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spcr->baud_rate = 3;
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break;
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case 19200:
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spcr->baud_rate = 4;
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break;
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case 57600:
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spcr->baud_rate = 6;
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break;
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case 115200:
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spcr->baud_rate = 7;
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break;
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default:
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spcr->baud_rate = 0;
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break;
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}
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ret = serial_getconfig(&serial_config);
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if (ret)
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serial_config = SERIAL_DEFAULT_CONFIG;
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spcr->parity = SERIAL_GET_PARITY(serial_config);
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spcr->stop_bits = SERIAL_GET_STOP(serial_config);
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/* No PCI devices for now */
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spcr->pci_device_id = 0xffff;
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spcr->pci_vendor_id = 0xffff;
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/* Fix checksum */
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header->checksum = table_compute_checksum((void *)spcr, header->length);
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}
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|
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/*
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* QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c
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*/
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@ -350,6 +460,7 @@ ulong write_acpi_tables(ulong start)
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struct acpi_fadt *fadt;
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struct acpi_mcfg *mcfg;
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struct acpi_madt *madt;
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struct acpi_spcr *spcr;
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int i;
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current = start;
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@ -438,6 +549,13 @@ ulong write_acpi_tables(ulong start)
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acpi_add_table(rsdp, mcfg);
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current = ALIGN(current, 16);
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debug("ACPI: * SPCR\n");
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spcr = (struct acpi_spcr *)current;
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acpi_create_spcr(spcr);
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current += spcr->header.length;
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acpi_add_table(rsdp, spcr);
|
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current = ALIGN(current, 16);
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|
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debug("current = %x\n", current);
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|
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acpi_rsdp_addr = (unsigned long)rsdp;
|
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|
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|
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@ -146,6 +146,16 @@ void *devfdt_remap_addr_index(struct udevice *dev, int index)
|
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return map_physmem(addr, 0, MAP_NOCACHE);
|
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}
|
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|
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void *devfdt_remap_addr_name(struct udevice *dev, const char *name)
|
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{
|
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fdt_addr_t addr = devfdt_get_addr_name(dev, name);
|
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|
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if (addr == FDT_ADDR_T_NONE)
|
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return NULL;
|
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|
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return map_physmem(addr, 0, MAP_NOCACHE);
|
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}
|
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|
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void *devfdt_remap_addr(struct udevice *dev)
|
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{
|
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return devfdt_remap_addr_index(dev, 0);
|
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|
|
|
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|
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@ -69,6 +69,26 @@ void *dev_remap_addr_index(struct udevice *dev, int index)
|
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return map_physmem(addr, 0, MAP_NOCACHE);
|
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}
|
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|
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fdt_addr_t dev_read_addr_name(struct udevice *dev, const char *name)
|
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{
|
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int index = dev_read_stringlist_search(dev, "reg-names", name);
|
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|
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if (index < 0)
|
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return FDT_ADDR_T_NONE;
|
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else
|
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return dev_read_addr_index(dev, index);
|
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}
|
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|
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void *dev_remap_addr_name(struct udevice *dev, const char *name)
|
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{
|
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fdt_addr_t addr = dev_read_addr_name(dev, name);
|
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|
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if (addr == FDT_ADDR_T_NONE)
|
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return NULL;
|
||||
|
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return map_physmem(addr, 0, MAP_NOCACHE);
|
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}
|
||||
|
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fdt_addr_t dev_read_addr(struct udevice *dev)
|
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{
|
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return dev_read_addr_index(dev, 0);
|
||||
|
|
|
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|
|
@ -167,19 +167,8 @@ static int kbd_controller_present(void)
|
|||
return in8(I8042_STS_REG) != 0xff;
|
||||
}
|
||||
|
||||
/*
|
||||
* Implement a weak default function for boards that optionally
|
||||
* need to skip the i8042 initialization.
|
||||
*
|
||||
* TODO(sjg@chromium.org): Use device tree for this?
|
||||
*/
|
||||
int __weak board_i8042_skip(void)
|
||||
{
|
||||
/* As default, don't skip */
|
||||
return 0;
|
||||
}
|
||||
|
||||
void i8042_flush(void)
|
||||
/** Flush all buffer from keyboard controller to host*/
|
||||
static void i8042_flush(void)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
|
|
@ -202,7 +191,13 @@ void i8042_flush(void)
|
|||
}
|
||||
}
|
||||
|
||||
int i8042_disable(void)
|
||||
/**
|
||||
* Disables the keyboard so that key strokes no longer generate scancodes to
|
||||
* the host.
|
||||
*
|
||||
* @return 0 if ok, -1 if keyboard input was found while disabling
|
||||
*/
|
||||
static int i8042_disable(void)
|
||||
{
|
||||
if (kbd_input_empty() == 0)
|
||||
return -1;
|
||||
|
|
@ -266,7 +261,7 @@ static int i8042_start(struct udevice *dev)
|
|||
char *penv;
|
||||
int ret;
|
||||
|
||||
if (!kbd_controller_present() || board_i8042_skip()) {
|
||||
if (!kbd_controller_present()) {
|
||||
debug("i8042 keyboard controller is not present\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
|
@ -294,6 +289,15 @@ static int i8042_start(struct udevice *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int i8042_kbd_remove(struct udevice *dev)
|
||||
{
|
||||
if (i8042_disable())
|
||||
log_debug("i8042_disable() failed. fine, continue.\n");
|
||||
i8042_flush();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* Set up the i8042 keyboard. This is called by the stdio device handler
|
||||
*
|
||||
|
|
@ -348,6 +352,7 @@ U_BOOT_DRIVER(i8042_kbd) = {
|
|||
.id = UCLASS_KEYBOARD,
|
||||
.of_match = i8042_kbd_ids,
|
||||
.probe = i8042_kbd_probe,
|
||||
.remove = i8042_kbd_remove,
|
||||
.ops = &i8042_kbd_ops,
|
||||
.priv_auto_alloc_size = sizeof(struct i8042_kbd_priv),
|
||||
};
|
||||
|
|
|
|||
|
|
@ -420,7 +420,7 @@ int cros_ec_read_id(struct udevice *dev, char *id, int maxlen)
|
|||
ret = ec_command_inptr(dev, EC_CMD_GET_VERSION, 0, NULL, 0,
|
||||
(uint8_t **)&r, sizeof(*r));
|
||||
if (ret != sizeof(*r)) {
|
||||
log_err("Got rc %d, expected %d\n", ret, sizeof(*r));
|
||||
log_err("Got rc %d, expected %u\n", ret, (uint)sizeof(*r));
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
|
@ -1466,7 +1466,7 @@ int cros_ec_set_lid_shutdown_mask(struct udevice *dev, int enable)
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
// Set lid close event state in the EC SMI event mask
|
||||
/* Set lid close event state in the EC SMI event mask */
|
||||
if (enable)
|
||||
mask |= EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED);
|
||||
else
|
||||
|
|
|
|||
|
|
@ -313,13 +313,15 @@ static int process_cmd(struct ec_state *ec,
|
|||
|
||||
switch (req->op) {
|
||||
case EC_VBNV_CONTEXT_OP_READ:
|
||||
/* TODO(sjg@chromium.org): Support full-size context */
|
||||
memcpy(resp->block, ec->vbnv_context,
|
||||
sizeof(resp->block));
|
||||
len = sizeof(*resp);
|
||||
EC_VBNV_BLOCK_SIZE);
|
||||
len = 16;
|
||||
break;
|
||||
case EC_VBNV_CONTEXT_OP_WRITE:
|
||||
memcpy(ec->vbnv_context, resp->block,
|
||||
sizeof(resp->block));
|
||||
/* TODO(sjg@chromium.org): Support full-size context */
|
||||
memcpy(ec->vbnv_context, req->block,
|
||||
EC_VBNV_BLOCK_SIZE);
|
||||
len = 0;
|
||||
break;
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ static int eth_raw_bus_post_bind(struct udevice *dev)
|
|||
device_probe(child);
|
||||
priv = dev_get_priv(child);
|
||||
if (priv) {
|
||||
memcpy(priv->host_ifname, i->if_name, IFNAMSIZ);
|
||||
strcpy(priv->host_ifname, i->if_name);
|
||||
priv->host_ifindex = i->if_index;
|
||||
priv->local = local;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -106,10 +106,15 @@ int regulator_get_enable(struct udevice *dev)
|
|||
int regulator_set_enable(struct udevice *dev, bool enable)
|
||||
{
|
||||
const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
|
||||
struct dm_regulator_uclass_platdata *uc_pdata;
|
||||
|
||||
if (!ops || !ops->set_enable)
|
||||
return -ENOSYS;
|
||||
|
||||
uc_pdata = dev_get_uclass_platdata(dev);
|
||||
if (!enable && uc_pdata->always_on)
|
||||
return -EACCES;
|
||||
|
||||
return ops->set_enable(dev, enable);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -372,6 +372,25 @@ static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ns16550_serial_getinfo(struct udevice *dev,
|
||||
struct serial_device_info *info)
|
||||
{
|
||||
struct NS16550 *const com_port = dev_get_priv(dev);
|
||||
struct ns16550_platdata *plat = com_port->plat;
|
||||
|
||||
info->type = SERIAL_CHIP_16550_COMPATIBLE;
|
||||
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
|
||||
info->addr_space = SERIAL_ADDRESS_SPACE_IO;
|
||||
#else
|
||||
info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
|
||||
#endif
|
||||
info->addr = plat->base;
|
||||
info->reg_width = plat->reg_width;
|
||||
info->reg_shift = plat->reg_shift;
|
||||
info->reg_offset = plat->reg_offset;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ns16550_serial_probe(struct udevice *dev)
|
||||
{
|
||||
struct NS16550 *const com_port = dev_get_priv(dev);
|
||||
|
|
@ -446,6 +465,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
|
|||
|
||||
plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
|
||||
plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
|
||||
plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
|
||||
|
||||
err = clk_get_by_index(dev, 0, &clk);
|
||||
if (!err) {
|
||||
|
|
@ -478,7 +498,8 @@ const struct dm_serial_ops ns16550_serial_ops = {
|
|||
.pending = ns16550_serial_pending,
|
||||
.getc = ns16550_serial_getc,
|
||||
.setbrg = ns16550_serial_setbrg,
|
||||
.setconfig = ns16550_serial_setconfig
|
||||
.setconfig = ns16550_serial_setconfig,
|
||||
.getinfo = ns16550_serial_getinfo,
|
||||
};
|
||||
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
||||
|
|
|
|||
|
|
@ -163,6 +163,18 @@ DEBUG_UART_FUNCS
|
|||
|
||||
#endif /* CONFIG_DEBUG_UART_SANDBOX */
|
||||
|
||||
static int sandbox_serial_getconfig(struct udevice *dev, uint *serial_config)
|
||||
{
|
||||
uint config = SERIAL_DEFAULT_CONFIG;
|
||||
|
||||
if (!serial_config)
|
||||
return -EINVAL;
|
||||
|
||||
*serial_config = config;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config)
|
||||
{
|
||||
u8 parity = SERIAL_GET_PARITY(serial_config);
|
||||
|
|
@ -176,6 +188,26 @@ static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int sandbox_serial_getinfo(struct udevice *dev,
|
||||
struct serial_device_info *serial_info)
|
||||
{
|
||||
struct serial_device_info info = {
|
||||
.type = SERIAL_CHIP_UNKNOWN,
|
||||
.addr_space = SERIAL_ADDRESS_SPACE_IO,
|
||||
.addr = SERIAL_DEFAULT_ADDRESS,
|
||||
.reg_width = 1,
|
||||
.reg_offset = 0,
|
||||
.reg_shift = 0,
|
||||
};
|
||||
|
||||
if (!serial_info)
|
||||
return -EINVAL;
|
||||
|
||||
*serial_info = info;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
static const char * const ansi_colour[] = {
|
||||
"black", "red", "green", "yellow", "blue", "megenta", "cyan",
|
||||
|
|
@ -207,7 +239,9 @@ static const struct dm_serial_ops sandbox_serial_ops = {
|
|||
.putc = sandbox_serial_putc,
|
||||
.pending = sandbox_serial_pending,
|
||||
.getc = sandbox_serial_getc,
|
||||
.getconfig = sandbox_serial_getconfig,
|
||||
.setconfig = sandbox_serial_setconfig,
|
||||
.getinfo = sandbox_serial_getinfo,
|
||||
};
|
||||
|
||||
static const struct udevice_id sandbox_serial_ids[] = {
|
||||
|
|
|
|||
|
|
@ -294,6 +294,20 @@ void serial_setbrg(void)
|
|||
ops->setbrg(gd->cur_serial_dev, gd->baudrate);
|
||||
}
|
||||
|
||||
int serial_getconfig(uint *config)
|
||||
{
|
||||
struct dm_serial_ops *ops;
|
||||
|
||||
if (!gd->cur_serial_dev)
|
||||
return 0;
|
||||
|
||||
ops = serial_get_ops(gd->cur_serial_dev);
|
||||
if (ops->getconfig)
|
||||
return ops->getconfig(gd->cur_serial_dev, config);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int serial_setconfig(uint config)
|
||||
{
|
||||
struct dm_serial_ops *ops;
|
||||
|
|
@ -308,6 +322,25 @@ int serial_setconfig(uint config)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int serial_getinfo(struct serial_device_info *info)
|
||||
{
|
||||
struct dm_serial_ops *ops;
|
||||
|
||||
if (!gd->cur_serial_dev)
|
||||
return -ENODEV;
|
||||
|
||||
if (!info)
|
||||
return -EINVAL;
|
||||
|
||||
info->baudrate = gd->baudrate;
|
||||
|
||||
ops = serial_get_ops(gd->cur_serial_dev);
|
||||
if (ops->getinfo)
|
||||
return ops->getinfo(gd->cur_serial_dev, info);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
void serial_stdio_init(void)
|
||||
{
|
||||
}
|
||||
|
|
@ -419,12 +452,16 @@ static int serial_post_probe(struct udevice *dev)
|
|||
ops->pending += gd->reloc_off;
|
||||
if (ops->clear)
|
||||
ops->clear += gd->reloc_off;
|
||||
if (ops->getconfig)
|
||||
ops->getconfig += gd->reloc_off;
|
||||
if (ops->setconfig)
|
||||
ops->setconfig += gd->reloc_off;
|
||||
#if CONFIG_POST & CONFIG_SYS_POST_UART
|
||||
if (ops->loop)
|
||||
ops->loop += gd->reloc_off;
|
||||
#endif
|
||||
if (ops->getinfo)
|
||||
ops->getinfo += gd->reloc_off;
|
||||
#endif
|
||||
/* Set the baud rate */
|
||||
if (ops->setbrg) {
|
||||
|
|
|
|||
|
|
@ -84,7 +84,13 @@ int sandbox_sysreset_get_status(struct udevice *dev, char *buf, int size)
|
|||
|
||||
int sandbox_sysreset_get_last(struct udevice *dev)
|
||||
{
|
||||
return SYSRESET_COLD;
|
||||
struct sandbox_state *state = state_get_current();
|
||||
|
||||
/*
|
||||
* The first phase is a power reset, after that we assume we don't
|
||||
* know.
|
||||
*/
|
||||
return state->jumped_fname ? SYSRESET_WARM : SYSRESET_POWER;
|
||||
}
|
||||
|
||||
static struct sysreset_ops sandbox_sysreset_ops = {
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ static int enable_sequence(struct udevice *dev, int seq)
|
|||
ret = regulator_set_enable(priv->reg, true);
|
||||
if (ret) {
|
||||
log_debug("Cannot enable regulator for PWM '%s'\n",
|
||||
__func__, dev->name);
|
||||
dev->name);
|
||||
return log_ret(ret);
|
||||
}
|
||||
mdelay(120);
|
||||
|
|
|
|||
|
|
@ -350,6 +350,8 @@ void smp_set_core_boot_addr(unsigned long addr, int corenr);
|
|||
void smp_kick_all_cpus(void);
|
||||
|
||||
/* $(CPU)/serial.c */
|
||||
struct serial_device_info;
|
||||
|
||||
int serial_init (void);
|
||||
void serial_setbrg (void);
|
||||
void serial_putc (const char);
|
||||
|
|
@ -357,7 +359,9 @@ void serial_putc_raw(const char);
|
|||
void serial_puts (const char *);
|
||||
int serial_getc (void);
|
||||
int serial_tstc (void);
|
||||
int serial_getconfig(uint *config);
|
||||
int serial_setconfig(uint config);
|
||||
int serial_getinfo(struct serial_device_info *info);
|
||||
|
||||
/* $(CPU)/speed.c */
|
||||
int get_clocks (void);
|
||||
|
|
|
|||
|
|
@ -55,6 +55,19 @@ void *devfdt_remap_addr(struct udevice *dev);
|
|||
*/
|
||||
void *devfdt_remap_addr_index(struct udevice *dev, int index);
|
||||
|
||||
/**
|
||||
* devfdt_remap_addr_name() - Get the reg property of a device, indexed by
|
||||
* name, as a memory-mapped I/O pointer
|
||||
* @name: the 'reg' property can hold a list of <addr, size> pairs, with the
|
||||
* 'reg-names' property providing named-based identification. @index
|
||||
* indicates the value to search for in 'reg-names'.
|
||||
*
|
||||
* @dev: Pointer to a device
|
||||
*
|
||||
* @return Pointer to addr, or NULL if there is no such property
|
||||
*/
|
||||
void *devfdt_remap_addr_name(struct udevice *dev, const char *name);
|
||||
|
||||
/**
|
||||
* devfdt_map_physmem() - Read device address from reg property of the
|
||||
* device node and map the address into CPU address
|
||||
|
|
|
|||
|
|
@ -124,6 +124,31 @@ fdt_addr_t dev_read_addr_index(struct udevice *dev, int index);
|
|||
*/
|
||||
void *dev_remap_addr_index(struct udevice *dev, int index);
|
||||
|
||||
/**
|
||||
* dev_read_addr_name() - Get the reg property of a device, indexed by name
|
||||
*
|
||||
* @dev: Device to read from
|
||||
* @name: the 'reg' property can hold a list of <addr, size> pairs, with the
|
||||
* 'reg-names' property providing named-based identification. @index
|
||||
* indicates the value to search for in 'reg-names'.
|
||||
*
|
||||
* @return address or FDT_ADDR_T_NONE if not found
|
||||
*/
|
||||
fdt_addr_t dev_read_addr_name(struct udevice *dev, const char* name);
|
||||
|
||||
/**
|
||||
* dev_remap_addr_name() - Get the reg property of a device, indexed by name,
|
||||
* as a memory-mapped I/O pointer
|
||||
*
|
||||
* @dev: Device to read from
|
||||
* @name: the 'reg' property can hold a list of <addr, size> pairs, with the
|
||||
* 'reg-names' property providing named-based identification. @index
|
||||
* indicates the value to search for in 'reg-names'.
|
||||
*
|
||||
* @return pointer or NULL if not found
|
||||
*/
|
||||
void *dev_remap_addr_name(struct udevice *dev, const char* name);
|
||||
|
||||
/**
|
||||
* dev_read_addr() - Get the reg property of a device
|
||||
*
|
||||
|
|
@ -494,6 +519,12 @@ static inline fdt_addr_t dev_read_addr_index(struct udevice *dev, int index)
|
|||
return devfdt_get_addr_index(dev, index);
|
||||
}
|
||||
|
||||
static inline fdt_addr_t dev_read_addr_name(struct udevice *dev,
|
||||
const char *name)
|
||||
{
|
||||
return devfdt_get_addr_name(dev, name);
|
||||
}
|
||||
|
||||
static inline fdt_addr_t dev_read_addr(struct udevice *dev)
|
||||
{
|
||||
return devfdt_get_addr(dev);
|
||||
|
|
@ -514,6 +545,11 @@ static inline void *dev_remap_addr_index(struct udevice *dev, int index)
|
|||
return devfdt_remap_addr_index(dev, index);
|
||||
}
|
||||
|
||||
static inline void *dev_remap_addr_name(struct udevice *dev, const char *name)
|
||||
{
|
||||
return devfdt_remap_addr_name(dev, name);
|
||||
}
|
||||
|
||||
static inline fdt_addr_t dev_read_addr_size(struct udevice *dev,
|
||||
const char *propname,
|
||||
fdt_size_t *sizep)
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@ enum uclass_id {
|
|||
/* U-Boot uclasses start here - in alphabetical order */
|
||||
UCLASS_ADC, /* Analog-to-digital converter */
|
||||
UCLASS_AHCI, /* SATA disk controller */
|
||||
UCLASS_AXI, /* AXI bus */
|
||||
UCLASS_BLK, /* Block device */
|
||||
UCLASS_BOARD, /* Device information from hardware */
|
||||
UCLASS_CLK, /* Clock source, e.g. used by peripherals */
|
||||
|
|
@ -38,15 +39,14 @@ enum uclass_id {
|
|||
UCLASS_DMA, /* Direct Memory Access */
|
||||
UCLASS_EFI, /* EFI managed devices */
|
||||
UCLASS_ETH, /* Ethernet device */
|
||||
UCLASS_FIRMWARE, /* Firmware */
|
||||
UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
|
||||
UCLASS_GPIO, /* Bank of general-purpose I/O pins */
|
||||
UCLASS_FIRMWARE, /* Firmware */
|
||||
UCLASS_I2C, /* I2C bus */
|
||||
UCLASS_I2C_EEPROM, /* I2C EEPROM device */
|
||||
UCLASS_I2C_GENERIC, /* Generic I2C device */
|
||||
UCLASS_I2C_MUX, /* I2C multiplexer */
|
||||
UCLASS_IDE, /* IDE device */
|
||||
UCLASS_AXI, /* AXI bus */
|
||||
UCLASS_IRQ, /* Interrupt controller */
|
||||
UCLASS_KEYBOARD, /* Keyboard input device */
|
||||
UCLASS_LED, /* Light-emitting diode (LED) */
|
||||
|
|
@ -68,8 +68,8 @@ enum uclass_id {
|
|||
UCLASS_PINCONFIG, /* Pin configuration node device */
|
||||
UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
|
||||
UCLASS_PMIC, /* PMIC I/O device */
|
||||
UCLASS_PWM, /* Pulse-width modulator */
|
||||
UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
|
||||
UCLASS_PWM, /* Pulse-width modulator */
|
||||
UCLASS_PWRSEQ, /* Power sequence device */
|
||||
UCLASS_RAM, /* RAM controller */
|
||||
UCLASS_REGULATOR, /* Regulator device */
|
||||
|
|
@ -81,9 +81,9 @@ enum uclass_id {
|
|||
UCLASS_SIMPLE_BUS, /* Bus with child devices */
|
||||
UCLASS_SMEM, /* Shared memory interface */
|
||||
UCLASS_SPI, /* SPI bus */
|
||||
UCLASS_SPMI, /* System Power Management Interface bus */
|
||||
UCLASS_SPI_FLASH, /* SPI flash */
|
||||
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
|
||||
UCLASS_SPMI, /* System Power Management Interface bus */
|
||||
UCLASS_SYSCON, /* System configuration device */
|
||||
UCLASS_SYSRESET, /* System reset device */
|
||||
UCLASS_TEE, /* Trusted Execution Environment device */
|
||||
|
|
|
|||
|
|
@ -72,19 +72,4 @@
|
|||
#define BRK 0x0100 /* make break flag for keyboard */
|
||||
#define ALT 0x0200 /* right alt */
|
||||
|
||||
/* exports */
|
||||
|
||||
/**
|
||||
* Flush all buffer from keyboard controller to host.
|
||||
*/
|
||||
void i8042_flush(void);
|
||||
|
||||
/**
|
||||
* Disables the keyboard so that key strokes no longer generate scancodes to
|
||||
* the host.
|
||||
*
|
||||
* @return 0 if ok, -1 if keyboard input was found while disabling
|
||||
*/
|
||||
int i8042_disable(void);
|
||||
|
||||
#endif /* _I8042_H_ */
|
||||
|
|
|
|||
271
include/inttypes.h
Normal file
271
include/inttypes.h
Normal file
|
|
@ -0,0 +1,271 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright (C) 1997-2001, 2004, 2007 Free Software Foundation, Inc.
|
||||
*
|
||||
* This file is taken from the GNU C Library v2.15, with the unimplemented
|
||||
* functions removed and a few style fixes.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ISO C99: 7.8 Format conversion of integer types <inttypes.h>
|
||||
*/
|
||||
|
||||
#ifndef _INTTYPES_H
|
||||
#define _INTTYPES_H 1
|
||||
|
||||
#include <linux/compiler.h>
|
||||
|
||||
/* Get a definition for wchar_t. But we must not define wchar_t itself. */
|
||||
#ifndef ____gwchar_t_defined
|
||||
# ifdef __cplusplus
|
||||
# define __gwchar_t wchar_t
|
||||
# elif defined __WCHAR_TYPE__
|
||||
typedef __WCHAR_TYPE__ __gwchar_t;
|
||||
# else
|
||||
# define __need_wchar_t
|
||||
# include <linux/stddef.h>
|
||||
typedef wchar_t __gwchar_t;
|
||||
# endif
|
||||
# define ____gwchar_t_defined 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The ISO C99 standard specifies that these macros must only be defined if
|
||||
* explicitly requested
|
||||
*/
|
||||
#if !defined __cplusplus || defined __STDC_FORMAT_MACROS
|
||||
|
||||
/* linux/types.h always uses long long for 64-bit and long for uintptr_t */
|
||||
# define __PRI64_PREFIX "ll"
|
||||
# define __PRIPTR_PREFIX "l"
|
||||
|
||||
/* Macros for printing format specifiers. */
|
||||
|
||||
/* Decimal notation. */
|
||||
# define PRId8 "d"
|
||||
# define PRId16 "d"
|
||||
# define PRId32 "d"
|
||||
# define PRId64 __PRI64_PREFIX "d"
|
||||
|
||||
# define PRIdLEAST8 "d"
|
||||
# define PRIdLEAST16 "d"
|
||||
# define PRIdLEAST32 "d"
|
||||
# define PRIdLEAST64 __PRI64_PREFIX "d"
|
||||
|
||||
# define PRIdFAST8 "d"
|
||||
# define PRIdFAST16 __PRIPTR_PREFIX "d"
|
||||
# define PRIdFAST32 __PRIPTR_PREFIX "d"
|
||||
# define PRIdFAST64 __PRI64_PREFIX "d"
|
||||
|
||||
# define PRIi8 "i"
|
||||
# define PRIi16 "i"
|
||||
# define PRIi32 "i"
|
||||
# define PRIi64 __PRI64_PREFIX "i"
|
||||
|
||||
# define PRIiLEAST8 "i"
|
||||
# define PRIiLEAST16 "i"
|
||||
# define PRIiLEAST32 "i"
|
||||
# define PRIiLEAST64 __PRI64_PREFIX "i"
|
||||
|
||||
# define PRIiFAST8 "i"
|
||||
# define PRIiFAST16 __PRIPTR_PREFIX "i"
|
||||
# define PRIiFAST32 __PRIPTR_PREFIX "i"
|
||||
# define PRIiFAST64 __PRI64_PREFIX "i"
|
||||
|
||||
/* Octal notation. */
|
||||
# define PRIo8 "o"
|
||||
# define PRIo16 "o"
|
||||
# define PRIo32 "o"
|
||||
# define PRIo64 __PRI64_PREFIX "o"
|
||||
|
||||
# define PRIoLEAST8 "o"
|
||||
# define PRIoLEAST16 "o"
|
||||
# define PRIoLEAST32 "o"
|
||||
# define PRIoLEAST64 __PRI64_PREFIX "o"
|
||||
|
||||
# define PRIoFAST8 "o"
|
||||
# define PRIoFAST16 __PRIPTR_PREFIX "o"
|
||||
# define PRIoFAST32 __PRIPTR_PREFIX "o"
|
||||
# define PRIoFAST64 __PRI64_PREFIX "o"
|
||||
|
||||
/* Unsigned integers. */
|
||||
# define PRIu8 "u"
|
||||
# define PRIu16 "u"
|
||||
# define PRIu32 "u"
|
||||
# define PRIu64 __PRI64_PREFIX "u"
|
||||
|
||||
# define PRIuLEAST8 "u"
|
||||
# define PRIuLEAST16 "u"
|
||||
# define PRIuLEAST32 "u"
|
||||
# define PRIuLEAST64 __PRI64_PREFIX "u"
|
||||
|
||||
# define PRIuFAST8 "u"
|
||||
# define PRIuFAST16 __PRIPTR_PREFIX "u"
|
||||
# define PRIuFAST32 __PRIPTR_PREFIX "u"
|
||||
# define PRIuFAST64 __PRI64_PREFIX "u"
|
||||
|
||||
/* lowercase hexadecimal notation. */
|
||||
# define PRIx8 "x"
|
||||
# define PRIx16 "x"
|
||||
# define PRIx32 "x"
|
||||
# define PRIx64 __PRI64_PREFIX "x"
|
||||
|
||||
# define PRIxLEAST8 "x"
|
||||
# define PRIxLEAST16 "x"
|
||||
# define PRIxLEAST32 "x"
|
||||
# define PRIxLEAST64 __PRI64_PREFIX "x"
|
||||
|
||||
# define PRIxFAST8 "x"
|
||||
# define PRIxFAST16 __PRIPTR_PREFIX "x"
|
||||
# define PRIxFAST32 __PRIPTR_PREFIX "x"
|
||||
# define PRIxFAST64 __PRI64_PREFIX "x"
|
||||
|
||||
/* UPPERCASE hexadecimal notation. */
|
||||
# define PRIX8 "X"
|
||||
# define PRIX16 "X"
|
||||
# define PRIX32 "X"
|
||||
# define PRIX64 __PRI64_PREFIX "X"
|
||||
|
||||
# define PRIXLEAST8 "X"
|
||||
# define PRIXLEAST16 "X"
|
||||
# define PRIXLEAST32 "X"
|
||||
# define PRIXLEAST64 __PRI64_PREFIX "X"
|
||||
|
||||
# define PRIXFAST8 "X"
|
||||
# define PRIXFAST16 __PRIPTR_PREFIX "X"
|
||||
# define PRIXFAST32 __PRIPTR_PREFIX "X"
|
||||
# define PRIXFAST64 __PRI64_PREFIX "X"
|
||||
|
||||
/* Macros for printing `intmax_t' and `uintmax_t'. */
|
||||
# define PRIdMAX __PRI64_PREFIX "d"
|
||||
# define PRIiMAX __PRI64_PREFIX "i"
|
||||
# define PRIoMAX __PRI64_PREFIX "o"
|
||||
# define PRIuMAX __PRI64_PREFIX "u"
|
||||
# define PRIxMAX __PRI64_PREFIX "x"
|
||||
# define PRIXMAX __PRI64_PREFIX "X"
|
||||
|
||||
/* Macros for printing `intptr_t' and `uintptr_t'. */
|
||||
# define PRIdPTR __PRIPTR_PREFIX "d"
|
||||
# define PRIiPTR __PRIPTR_PREFIX "i"
|
||||
# define PRIoPTR __PRIPTR_PREFIX "o"
|
||||
# define PRIuPTR __PRIPTR_PREFIX "u"
|
||||
# define PRIxPTR __PRIPTR_PREFIX "x"
|
||||
# define PRIXPTR __PRIPTR_PREFIX "X"
|
||||
|
||||
/* Macros for scanning format specifiers. */
|
||||
|
||||
/* Signed decimal notation. */
|
||||
# define SCNd8 "hhd"
|
||||
# define SCNd16 "hd"
|
||||
# define SCNd32 "d"
|
||||
# define SCNd64 __PRI64_PREFIX "d"
|
||||
|
||||
# define SCNdLEAST8 "hhd"
|
||||
# define SCNdLEAST16 "hd"
|
||||
# define SCNdLEAST32 "d"
|
||||
# define SCNdLEAST64 __PRI64_PREFIX "d"
|
||||
|
||||
# define SCNdFAST8 "hhd"
|
||||
# define SCNdFAST16 __PRIPTR_PREFIX "d"
|
||||
# define SCNdFAST32 __PRIPTR_PREFIX "d"
|
||||
# define SCNdFAST64 __PRI64_PREFIX "d"
|
||||
|
||||
/* Signed decimal notation. */
|
||||
# define SCNi8 "hhi"
|
||||
# define SCNi16 "hi"
|
||||
# define SCNi32 "i"
|
||||
# define SCNi64 __PRI64_PREFIX "i"
|
||||
|
||||
# define SCNiLEAST8 "hhi"
|
||||
# define SCNiLEAST16 "hi"
|
||||
# define SCNiLEAST32 "i"
|
||||
# define SCNiLEAST64 __PRI64_PREFIX "i"
|
||||
|
||||
# define SCNiFAST8 "hhi"
|
||||
# define SCNiFAST16 __PRIPTR_PREFIX "i"
|
||||
# define SCNiFAST32 __PRIPTR_PREFIX "i"
|
||||
# define SCNiFAST64 __PRI64_PREFIX "i"
|
||||
|
||||
/* Unsigned decimal notation. */
|
||||
# define SCNu8 "hhu"
|
||||
# define SCNu16 "hu"
|
||||
# define SCNu32 "u"
|
||||
# define SCNu64 __PRI64_PREFIX "u"
|
||||
|
||||
# define SCNuLEAST8 "hhu"
|
||||
# define SCNuLEAST16 "hu"
|
||||
# define SCNuLEAST32 "u"
|
||||
# define SCNuLEAST64 __PRI64_PREFIX "u"
|
||||
|
||||
# define SCNuFAST8 "hhu"
|
||||
# define SCNuFAST16 __PRIPTR_PREFIX "u"
|
||||
# define SCNuFAST32 __PRIPTR_PREFIX "u"
|
||||
# define SCNuFAST64 __PRI64_PREFIX "u"
|
||||
|
||||
/* Octal notation. */
|
||||
# define SCNo8 "hho"
|
||||
# define SCNo16 "ho"
|
||||
# define SCNo32 "o"
|
||||
# define SCNo64 __PRI64_PREFIX "o"
|
||||
|
||||
# define SCNoLEAST8 "hho"
|
||||
# define SCNoLEAST16 "ho"
|
||||
# define SCNoLEAST32 "o"
|
||||
# define SCNoLEAST64 __PRI64_PREFIX "o"
|
||||
|
||||
# define SCNoFAST8 "hho"
|
||||
# define SCNoFAST16 __PRIPTR_PREFIX "o"
|
||||
# define SCNoFAST32 __PRIPTR_PREFIX "o"
|
||||
# define SCNoFAST64 __PRI64_PREFIX "o"
|
||||
|
||||
/* Hexadecimal notation. */
|
||||
# define SCNx8 "hhx"
|
||||
# define SCNx16 "hx"
|
||||
# define SCNx32 "x"
|
||||
# define SCNx64 __PRI64_PREFIX "x"
|
||||
|
||||
# define SCNxLEAST8 "hhx"
|
||||
# define SCNxLEAST16 "hx"
|
||||
# define SCNxLEAST32 "x"
|
||||
# define SCNxLEAST64 __PRI64_PREFIX "x"
|
||||
|
||||
# define SCNxFAST8 "hhx"
|
||||
# define SCNxFAST16 __PRIPTR_PREFIX "x"
|
||||
# define SCNxFAST32 __PRIPTR_PREFIX "x"
|
||||
# define SCNxFAST64 __PRI64_PREFIX "x"
|
||||
|
||||
/* Macros for scanning `intmax_t' and `uintmax_t'. */
|
||||
# define SCNdMAX __PRI64_PREFIX "d"
|
||||
# define SCNiMAX __PRI64_PREFIX "i"
|
||||
# define SCNoMAX __PRI64_PREFIX "o"
|
||||
# define SCNuMAX __PRI64_PREFIX "u"
|
||||
# define SCNxMAX __PRI64_PREFIX "x"
|
||||
|
||||
/* Macros for scanning `intptr_t' and `uintptr_t'. */
|
||||
# define SCNdPTR __PRIPTR_PREFIX "d"
|
||||
# define SCNiPTR __PRIPTR_PREFIX "i"
|
||||
# define SCNoPTR __PRIPTR_PREFIX "o"
|
||||
# define SCNuPTR __PRIPTR_PREFIX "u"
|
||||
# define SCNxPTR __PRIPTR_PREFIX "x"
|
||||
|
||||
#endif /* C++ && format macros */
|
||||
|
||||
#if __WORDSIZE == 64
|
||||
|
||||
/* We have to define the `uintmax_t' type using `ldiv_t'. */
|
||||
typedef struct {
|
||||
long int quot; /* Quotient. */
|
||||
long int rem; /* Remainder. */
|
||||
} imaxdiv_t;
|
||||
|
||||
#else
|
||||
|
||||
/* We have to define the `uintmax_t' type using `lldiv_t'. */
|
||||
typedef struct {
|
||||
long long int quot; /* Quotient. */
|
||||
long long int rem; /* Remainder. */
|
||||
} imaxdiv_t;
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* inttypes.h */
|
||||
|
|
@ -10,8 +10,7 @@ void udelay(unsigned long usec);
|
|||
|
||||
static inline void mdelay(unsigned long msec)
|
||||
{
|
||||
while (msec--)
|
||||
udelay(1000);
|
||||
udelay(1000 * msec);
|
||||
}
|
||||
|
||||
static inline void ndelay(unsigned long nsec)
|
||||
|
|
|
|||
|
|
@ -33,6 +33,10 @@
|
|||
#define S64_MAX ((s64)(U64_MAX>>1))
|
||||
#define S64_MIN ((s64)(-S64_MAX - 1))
|
||||
|
||||
/* Aliases defined by stdint.h */
|
||||
#define UINT32_MAX U32_MAX
|
||||
#define UINT64_MAX U64_MAX
|
||||
|
||||
#define STACK_MAGIC 0xdeadbeef
|
||||
|
||||
#define REPEAT_BYTE(x) ((~0ul / 0xff) * (x))
|
||||
|
|
|
|||
|
|
@ -49,14 +49,16 @@
|
|||
* struct ns16550_platdata - information about a NS16550 port
|
||||
*
|
||||
* @base: Base register address
|
||||
* @reg_width: IO accesses size of registers (in bytes)
|
||||
* @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...)
|
||||
* @clock: UART base clock speed in Hz
|
||||
*/
|
||||
struct ns16550_platdata {
|
||||
unsigned long base;
|
||||
int reg_width;
|
||||
int reg_shift;
|
||||
int clock;
|
||||
int reg_offset;
|
||||
int clock;
|
||||
u32 fcr;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -86,7 +86,7 @@ struct rtc_ops {
|
|||
int dm_rtc_get(struct udevice *dev, struct rtc_time *time);
|
||||
|
||||
/**
|
||||
* dm_rtc_put() - Write a time to an RTC
|
||||
* dm_rtc_set() - Write a time to an RTC
|
||||
*
|
||||
* @dev: Device to read from
|
||||
* @time: Time to write into the RTC
|
||||
|
|
|
|||
|
|
@ -75,6 +75,8 @@ enum serial_par {
|
|||
|
||||
#define SERIAL_PAR_SHIFT 0
|
||||
#define SERIAL_PAR_MASK (0x03 << SERIAL_PAR_SHIFT)
|
||||
#define SERIAL_SET_PARITY(parity) \
|
||||
((parity << SERIAL_PAR_SHIFT) & SERIAL_PAR_MASK)
|
||||
#define SERIAL_GET_PARITY(config) \
|
||||
((config & SERIAL_PAR_MASK) >> SERIAL_PAR_SHIFT)
|
||||
|
||||
|
|
@ -87,6 +89,8 @@ enum serial_bits {
|
|||
|
||||
#define SERIAL_BITS_SHIFT 2
|
||||
#define SERIAL_BITS_MASK (0x3 << SERIAL_BITS_SHIFT)
|
||||
#define SERIAL_SET_BITS(bits) \
|
||||
((bits << SERIAL_BITS_SHIFT) & SERIAL_BITS_MASK)
|
||||
#define SERIAL_GET_BITS(config) \
|
||||
((config & SERIAL_BITS_MASK) >> SERIAL_BITS_SHIFT)
|
||||
|
||||
|
|
@ -99,6 +103,8 @@ enum serial_stop {
|
|||
|
||||
#define SERIAL_STOP_SHIFT 4
|
||||
#define SERIAL_STOP_MASK (0x3 << SERIAL_STOP_SHIFT)
|
||||
#define SERIAL_SET_STOP(stop) \
|
||||
((stop << SERIAL_STOP_SHIFT) & SERIAL_STOP_MASK)
|
||||
#define SERIAL_GET_STOP(config) \
|
||||
((config & SERIAL_STOP_MASK) >> SERIAL_STOP_SHIFT)
|
||||
|
||||
|
|
@ -107,9 +113,43 @@ enum serial_stop {
|
|||
bits << SERIAL_BITS_SHIFT | \
|
||||
stop << SERIAL_STOP_SHIFT)
|
||||
|
||||
#define SERIAL_DEFAULT_CONFIG SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \
|
||||
SERIAL_8_BITS << SERIAL_BITS_SHIFT | \
|
||||
SERIAL_ONE_STOP << SERIAL_STOP_SHIFT
|
||||
#define SERIAL_DEFAULT_CONFIG \
|
||||
(SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \
|
||||
SERIAL_8_BITS << SERIAL_BITS_SHIFT | \
|
||||
SERIAL_ONE_STOP << SERIAL_STOP_SHIFT)
|
||||
|
||||
enum serial_chip_type {
|
||||
SERIAL_CHIP_UNKNOWN = -1,
|
||||
SERIAL_CHIP_16550_COMPATIBLE,
|
||||
};
|
||||
|
||||
enum adr_space_type {
|
||||
SERIAL_ADDRESS_SPACE_MEMORY = 0,
|
||||
SERIAL_ADDRESS_SPACE_IO,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct serial_device_info - structure to hold serial device info
|
||||
*
|
||||
* @type: type of the UART chip
|
||||
* @addr_space: address space to access the registers
|
||||
* @addr: physical address of the registers
|
||||
* @reg_width: size (in bytes) of the IO accesses to the registers
|
||||
* @reg_offset: offset to apply to the @addr from the start of the registers
|
||||
* @reg_shift: quantity to shift the register offsets by
|
||||
* @baudrate: baud rate
|
||||
*/
|
||||
struct serial_device_info {
|
||||
enum serial_chip_type type;
|
||||
enum adr_space_type addr_space;
|
||||
ulong addr;
|
||||
u8 reg_width;
|
||||
u8 reg_offset;
|
||||
u8 reg_shift;
|
||||
unsigned int baudrate;
|
||||
};
|
||||
|
||||
#define SERIAL_DEFAULT_ADDRESS 0xBADACCE5
|
||||
|
||||
/**
|
||||
* struct struct dm_serial_ops - Driver model serial operations
|
||||
|
|
@ -188,6 +228,19 @@ struct dm_serial_ops {
|
|||
int (*loop)(struct udevice *dev, int on);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* getconfig() - Get the uart configuration
|
||||
* (parity, 5/6/7/8 bits word length, stop bits)
|
||||
*
|
||||
* Get a current config for this device.
|
||||
*
|
||||
* @dev: Device pointer
|
||||
* @parity: parity to use
|
||||
* @bits: bits number to use
|
||||
* @stop: stop bits number to use
|
||||
* @return 0 if OK, -ve on error
|
||||
*/
|
||||
int (*getconfig)(struct udevice *dev, uint *serial_config);
|
||||
/**
|
||||
* setconfig() - Set up the uart configuration
|
||||
* (parity, 5/6/7/8 bits word length, stop bits)
|
||||
|
|
@ -199,6 +252,13 @@ struct dm_serial_ops {
|
|||
* @return 0 if OK, -ve on error
|
||||
*/
|
||||
int (*setconfig)(struct udevice *dev, uint serial_config);
|
||||
/**
|
||||
* getinfo() - Get serial device information
|
||||
*
|
||||
* @dev: Device pointer
|
||||
* @info: struct serial_device_info to fill
|
||||
*/
|
||||
int (*getinfo)(struct udevice *dev, struct serial_device_info *info);
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -209,6 +209,14 @@ int tpm_open(struct udevice *dev);
|
|||
*/
|
||||
int tpm_close(struct udevice *dev);
|
||||
|
||||
/**
|
||||
* tpm_clear_and_reenable() - Force clear the TPM and reenable it
|
||||
*
|
||||
* @dev: TPM device
|
||||
* @return 0 on success, -ve on failure
|
||||
*/
|
||||
u32 tpm_clear_and_reenable(struct udevice *dev);
|
||||
|
||||
/**
|
||||
* tpm_get_desc() - Get a text description of the TPM
|
||||
*
|
||||
|
|
@ -274,4 +282,15 @@ static inline cmd_tbl_t *get_tpm2_commands(unsigned int *size)
|
|||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* tpm_get_version() - Find the version of a TPM
|
||||
*
|
||||
* This checks the uclass data for a TPM device and returns the version number
|
||||
* it supports.
|
||||
*
|
||||
* @dev: TPM device
|
||||
* @return version number (TPM_V1 or TPMV2)
|
||||
*/
|
||||
enum tpm_version tpm_get_version(struct udevice *dev);
|
||||
|
||||
#endif /* __TPM_COMMON_H */
|
||||
|
|
|
|||
|
|
@ -128,6 +128,39 @@ enum tpm2_algorithms {
|
|||
TPM2_ALG_NULL = 0x10,
|
||||
};
|
||||
|
||||
/* NV index attributes */
|
||||
enum tpm_index_attrs {
|
||||
TPMA_NV_PPWRITE = 1UL << 0,
|
||||
TPMA_NV_OWNERWRITE = 1UL << 1,
|
||||
TPMA_NV_AUTHWRITE = 1UL << 2,
|
||||
TPMA_NV_POLICYWRITE = 1UL << 3,
|
||||
TPMA_NV_COUNTER = 1UL << 4,
|
||||
TPMA_NV_BITS = 1UL << 5,
|
||||
TPMA_NV_EXTEND = 1UL << 6,
|
||||
TPMA_NV_POLICY_DELETE = 1UL << 10,
|
||||
TPMA_NV_WRITELOCKED = 1UL << 11,
|
||||
TPMA_NV_WRITEALL = 1UL << 12,
|
||||
TPMA_NV_WRITEDEFINE = 1UL << 13,
|
||||
TPMA_NV_WRITE_STCLEAR = 1UL << 14,
|
||||
TPMA_NV_GLOBALLOCK = 1UL << 15,
|
||||
TPMA_NV_PPREAD = 1UL << 16,
|
||||
TPMA_NV_OWNERREAD = 1UL << 17,
|
||||
TPMA_NV_AUTHREAD = 1UL << 18,
|
||||
TPMA_NV_POLICYREAD = 1UL << 19,
|
||||
TPMA_NV_NO_DA = 1UL << 25,
|
||||
TPMA_NV_ORDERLY = 1UL << 26,
|
||||
TPMA_NV_CLEAR_STCLEAR = 1UL << 27,
|
||||
TPMA_NV_READLOCKED = 1UL << 28,
|
||||
TPMA_NV_WRITTEN = 1UL << 29,
|
||||
TPMA_NV_PLATFORMCREATE = 1UL << 30,
|
||||
TPMA_NV_READ_STCLEAR = 1UL << 31,
|
||||
|
||||
TPMA_NV_MASK_READ = TPMA_NV_PPREAD | TPMA_NV_OWNERREAD |
|
||||
TPMA_NV_AUTHREAD | TPMA_NV_POLICYREAD,
|
||||
TPMA_NV_MASK_WRITE = TPMA_NV_PPWRITE | TPMA_NV_OWNERWRITE |
|
||||
TPMA_NV_AUTHWRITE | TPMA_NV_POLICYWRITE,
|
||||
};
|
||||
|
||||
/**
|
||||
* Issue a TPM2_Startup command.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -9,14 +9,16 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <mapmem.h>
|
||||
#include <physmem.h>
|
||||
#include <linux/compiler.h>
|
||||
|
||||
phys_addr_t __weak arch_phys_memset(phys_addr_t s, int c, phys_size_t n)
|
||||
{
|
||||
void *s_ptr = (void *)(uintptr_t)s;
|
||||
void *s_ptr = map_sysmem(s, n);
|
||||
|
||||
assert(((phys_addr_t)(uintptr_t)s) == s);
|
||||
assert(((phys_addr_t)(uintptr_t)(s + n)) == s + n);
|
||||
|
||||
return (phys_addr_t)(uintptr_t)memset(s_ptr, c, n);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -12,6 +12,13 @@
|
|||
#include <tpm-common.h>
|
||||
#include "tpm-utils.h"
|
||||
|
||||
enum tpm_version tpm_get_version(struct udevice *dev)
|
||||
{
|
||||
struct tpm_chip_priv *priv = dev_get_uclass_priv(dev);
|
||||
|
||||
return priv->version;
|
||||
}
|
||||
|
||||
int pack_byte_string(u8 *str, size_t size, const char *format, ...)
|
||||
{
|
||||
va_list args;
|
||||
|
|
@ -112,7 +119,7 @@ int unpack_byte_string(const u8 *str, size_t size, const char *format, ...)
|
|||
|
||||
if (offset + length > size) {
|
||||
va_end(args);
|
||||
log_err("Failed to read: size=%d, offset=%x, len=%x\n",
|
||||
log_err("Failed to read: size=%zd, offset=%zx, len=%zx\n",
|
||||
size, offset, length);
|
||||
return -1;
|
||||
}
|
||||
|
|
|
|||
22
lib/tpm-v1.c
22
lib/tpm-v1.c
|
|
@ -79,19 +79,19 @@ u32 tpm_clear_and_reenable(struct udevice *dev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_TPM_V1)
|
||||
ret = tpm_physical_enable(dev);
|
||||
if (ret != TPM_SUCCESS) {
|
||||
log_err("TPM: Can't set enabled state\n");
|
||||
return ret;
|
||||
}
|
||||
if (tpm_get_version(dev) == TPM_V1) {
|
||||
ret = tpm_physical_enable(dev);
|
||||
if (ret != TPM_SUCCESS) {
|
||||
log_err("TPM: Can't set enabled state\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = tpm_physical_set_deactivated(dev, 0);
|
||||
if (ret != TPM_SUCCESS) {
|
||||
log_err("TPM: Can't set deactivated state\n");
|
||||
return ret;
|
||||
ret = tpm_physical_set_deactivated(dev, 0);
|
||||
if (ret != TPM_SUCCESS) {
|
||||
log_err("TPM: Can't set deactivated state\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
return TPM_SUCCESS;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -11,7 +11,9 @@
|
|||
|
||||
static int dm_test_serial(struct unit_test_state *uts)
|
||||
{
|
||||
struct serial_device_info info_serial = {0};
|
||||
struct udevice *dev_serial;
|
||||
uint value_serial;
|
||||
|
||||
ut_assertok(uclass_get_device_by_name(UCLASS_SERIAL, "serial",
|
||||
&dev_serial));
|
||||
|
|
@ -22,6 +24,16 @@ static int dm_test_serial(struct unit_test_state *uts)
|
|||
* sandbox_serial driver
|
||||
*/
|
||||
ut_assertok(serial_setconfig(SERIAL_DEFAULT_CONFIG));
|
||||
ut_assertok(serial_getconfig(&value_serial));
|
||||
ut_assert(value_serial == SERIAL_DEFAULT_CONFIG);
|
||||
ut_assertok(serial_getinfo(&info_serial));
|
||||
ut_assert(info_serial.type == SERIAL_CHIP_UNKNOWN);
|
||||
ut_assert(info_serial.addr == SERIAL_DEFAULT_ADDRESS);
|
||||
/*
|
||||
* test with a parameter which is NULL pointer
|
||||
*/
|
||||
ut_asserteq(-EINVAL, serial_getconfig(NULL));
|
||||
ut_asserteq(-EINVAL, serial_getinfo(NULL));
|
||||
/*
|
||||
* test with a serial config which is not supported by
|
||||
* sandbox_serial driver: test with wrong parity
|
||||
|
|
|
|||
|
|
@ -102,10 +102,10 @@ static int dm_test_sysreset_get_last(struct unit_test_state *uts)
|
|||
|
||||
/* Device 2 is the cold sysreset device */
|
||||
ut_assertok(uclass_get_device(UCLASS_SYSRESET, 2, &dev));
|
||||
ut_asserteq(SYSRESET_COLD, sysreset_get_last(dev));
|
||||
ut_asserteq(SYSRESET_POWER, sysreset_get_last(dev));
|
||||
|
||||
/* This is device 0, the non-DT one */
|
||||
ut_asserteq(SYSRESET_COLD, sysreset_get_last_walk());
|
||||
ut_asserteq(SYSRESET_POWER, sysreset_get_last_walk());
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -490,7 +490,6 @@ static int dm_test_fdt_translation(struct unit_test_state *uts)
|
|||
}
|
||||
DM_TEST(dm_test_fdt_translation, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
|
||||
|
||||
/* Test devfdt_remap_addr_index() */
|
||||
static int dm_test_fdt_remap_addr_flat(struct unit_test_state *uts)
|
||||
{
|
||||
struct udevice *dev;
|
||||
|
|
@ -511,7 +510,46 @@ static int dm_test_fdt_remap_addr_flat(struct unit_test_state *uts)
|
|||
DM_TEST(dm_test_fdt_remap_addr_flat,
|
||||
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | DM_TESTF_FLAT_TREE);
|
||||
|
||||
/* Test dev_remap_addr_index() */
|
||||
static int dm_test_fdt_remap_addr_index_flat(struct unit_test_state *uts)
|
||||
{
|
||||
struct udevice *dev;
|
||||
fdt_addr_t addr;
|
||||
void *paddr;
|
||||
|
||||
ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, true, &dev));
|
||||
|
||||
addr = devfdt_get_addr_index(dev, 0);
|
||||
ut_asserteq(0x8000, addr);
|
||||
|
||||
paddr = map_physmem(addr, 0, MAP_NOCACHE);
|
||||
ut_assertnonnull(paddr);
|
||||
ut_asserteq_ptr(paddr, devfdt_remap_addr_index(dev, 0));
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_fdt_remap_addr_index_flat,
|
||||
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | DM_TESTF_FLAT_TREE);
|
||||
|
||||
static int dm_test_fdt_remap_addr_name_flat(struct unit_test_state *uts)
|
||||
{
|
||||
struct udevice *dev;
|
||||
fdt_addr_t addr;
|
||||
void *paddr;
|
||||
|
||||
ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, true, &dev));
|
||||
|
||||
addr = devfdt_get_addr_name(dev, "sandbox-dummy-0");
|
||||
ut_asserteq(0x8000, addr);
|
||||
|
||||
paddr = map_physmem(addr, 0, MAP_NOCACHE);
|
||||
ut_assertnonnull(paddr);
|
||||
ut_asserteq_ptr(paddr, devfdt_remap_addr_name(dev, "sandbox-dummy-0"));
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_fdt_remap_addr_name_flat,
|
||||
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | DM_TESTF_FLAT_TREE);
|
||||
|
||||
static int dm_test_fdt_remap_addr_live(struct unit_test_state *uts)
|
||||
{
|
||||
struct udevice *dev;
|
||||
|
|
@ -532,6 +570,46 @@ static int dm_test_fdt_remap_addr_live(struct unit_test_state *uts)
|
|||
DM_TEST(dm_test_fdt_remap_addr_live,
|
||||
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
|
||||
|
||||
static int dm_test_fdt_remap_addr_index_live(struct unit_test_state *uts)
|
||||
{
|
||||
struct udevice *dev;
|
||||
fdt_addr_t addr;
|
||||
void *paddr;
|
||||
|
||||
ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, true, &dev));
|
||||
|
||||
addr = dev_read_addr_index(dev, 0);
|
||||
ut_asserteq(0x8000, addr);
|
||||
|
||||
paddr = map_physmem(addr, 0, MAP_NOCACHE);
|
||||
ut_assertnonnull(paddr);
|
||||
ut_asserteq_ptr(paddr, dev_remap_addr_index(dev, 0));
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_fdt_remap_addr_index_live,
|
||||
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
|
||||
|
||||
static int dm_test_fdt_remap_addr_name_live(struct unit_test_state *uts)
|
||||
{
|
||||
struct udevice *dev;
|
||||
fdt_addr_t addr;
|
||||
void *paddr;
|
||||
|
||||
ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, true, &dev));
|
||||
|
||||
addr = dev_read_addr_name(dev, "sandbox-dummy-0");
|
||||
ut_asserteq(0x8000, addr);
|
||||
|
||||
paddr = map_physmem(addr, 0, MAP_NOCACHE);
|
||||
ut_assertnonnull(paddr);
|
||||
ut_asserteq_ptr(paddr, dev_remap_addr_name(dev, "sandbox-dummy-0"));
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_fdt_remap_addr_name_live,
|
||||
DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
|
||||
|
||||
static int dm_test_fdt_livetree_writing(struct unit_test_state *uts)
|
||||
{
|
||||
struct udevice *dev;
|
||||
|
|
|
|||
|
|
@ -502,7 +502,8 @@ class Toolchains:
|
|||
trailing /
|
||||
"""
|
||||
stdout = command.Output('tar', 'xvfJ', fname, '-C', dest)
|
||||
return stdout.splitlines()[0][:-1]
|
||||
dirs = stdout.splitlines()[1].split('/')[:2]
|
||||
return '/'.join(dirs)
|
||||
|
||||
def TestSettingsHasPath(self, path):
|
||||
"""Check if buildman will find this toolchain
|
||||
|
|
@ -516,13 +517,14 @@ class Toolchains:
|
|||
def ListArchs(self):
|
||||
"""List architectures with available toolchains to download"""
|
||||
host_arch, archives = self.LocateArchUrl('list')
|
||||
re_arch = re.compile('[-a-z0-9.]*_([^-]*)-.*')
|
||||
re_arch = re.compile('[-a-z0-9.]*[-_]([^-]*)-.*')
|
||||
arch_set = set()
|
||||
for archive in archives:
|
||||
# Remove the host architecture from the start
|
||||
arch = re_arch.match(archive[len(host_arch):])
|
||||
if arch:
|
||||
arch_set.add(arch.group(1))
|
||||
if arch.group(1) != '2.0' and arch.group(1) != '64':
|
||||
arch_set.add(arch.group(1))
|
||||
return sorted(arch_set)
|
||||
|
||||
def FetchAndInstall(self, arch):
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user