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Initial pinctrl macro support and additional UARTs.

Browse Source 
Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2023-09-04 10:04:10 +08:00
parent d1eaab9544
commit 31581c4539
Signed by: imi415
GPG Key ID: 17F01E106F9F5E0A
6 changed files with 187 additions and 0 deletions
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5
arch/riscv/dts/cv1800b-milkv-duo.dts
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@ -11,6 +11,7 @@
compatible = "milk-v,duo", "cvitek,cv1800b";
aliases {
i2c0 = &i2c0;
serial0 = &uart0;
serial1 = &uart1;
};
@ -28,3 +29,7 @@
&uart0 {
status = "okay";
};
&i2c0 {
status = "okay";
};

43
arch/riscv/dts/cv1800b.dtsi
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@ -74,6 +74,11 @@
interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
};
pinctrl: pinctrl@03000000 {
compatible = "cvitek,cv1800b-pinctrl";
reg = <0x0 0x03000000 0x0 0x00001000>;
};
uart0: serial@04140000 {
compatible = "cvitek,cv1800b-uart", "snps,dw-apb-uart";
reg = <0x0 0x04140000 0x0 0x1000>;
@ -93,5 +98,43 @@
reg-io-width = <4>;
status = "disabled";
};
uart2: serial@04160000 {
compatible = "cvitek,cv1800b-uart", "snps,dw-apb-uart";
reg = <0x0 0x04160000 0x0 0x1000>;
interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb_clk>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart3: serial@04170000 {
compatible = "cvitek,cv1800b-uart", "snps,dw-apb-uart";
reg = <0x0 0x04170000 0x0 0x1000>;
interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb_clk>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart4: serial@041C0000 {
compatible = "cvitek,cv1800b-uart", "snps,dw-apb-uart";
reg = <0x0 0x041C0000 0x0 0x1000>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb_clk>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
i2c0: i2c@04000000 {
compatible = "cvitek,cv1800b-i2c", "snps,designware-i2c";
reg = <0x0 0x04000000 0x0 0x1000>;
interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb_clk>;
status = "disabled";
};
};
};

6
drivers/pinctrl/Kconfig
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@ -195,6 +195,12 @@ config PINCTRL_AT91
can also control the multi-driver capability, pull-up and pull-down
feature on each I/O pin.
config PINCTRL_CV1800B
bool "CVITEK CV1800B pinctrl driver"
depends_on DM
help
This option is to enable the CV1800B pinctrl driver.
config PINCTRL_AT91PIO4
bool "AT91 PIO4 pinctrl driver"
depends on DM

1
drivers/pinctrl/Makefile
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@ -10,6 +10,7 @@ obj-y += nxp/
obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP) += rockchip/
obj-$(CONFIG_ARCH_ASPEED) += aspeed/
obj-$(CONFIG_ARCH_ATH79) += ath79/
obj-$(CONFIG_PINCTRL_CV1800B) += pinctrl-cv1800b.o
obj-$(CONFIG_PINCTRL_INTEL) += intel/
obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
obj-$(CONFIG_ARCH_NPCM) += nuvoton/

46
drivers/pinctrl/pinctrl-cv1800b.c Normal file
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@ -0,0 +1,46 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2023 Yilin Sun <imi415@imi.moe>
*/
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dt-bindings/pinctrl/cv1800b-pinctrl.h>
#include <mapmem.h>
#include <regmap.h>
#include <syscon.h>
#include <asm/io.h>
#include <linux/err.h>
#include <linux/bitfield.h>
#include <linux/bitops.h>
#define CV1800B_PC_FUNC GENMASK(3, 0)
struct cv1800b_pinmux{
u32 ctrl[75];
};
struct cv1800b_pc_priv {
struct cv1800b_pinmux __iomem *pinmux;
};
static int cv1800b_pc_probe(struct udevice *dev)
{
return 0;
}
static const struct device_id cv1800b_pc_ids[] = {
{ .compatible = "cvitek,cv1800b-pinctrl" },
{ }
};
U_BOOT_DRIVER(pinctrl_cv1800b) = {
.name = "pinctrl_cv1800b",
.id = UCLASS_PINCTRL,
.of_match = cv1800b_pc_ids,
.probe = cv1800b_pc_probe,
.priv_auto = sizeof(struct cv1800b_pc_priv),
.ops = &cv1800b_pc_ops,
}

86
include/dt-bindings/pinctrl/cv1800b-pinctrl.h Normal file
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@ -0,0 +1,86 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2023 Yilin Sun <imi415@imi.moe>
*/
#ifndef DT_CV1800B_PINCTRL_H
#define DT_CV1800B_PINCTRL_H
#define CVI_CTRL_SD0_CLK (0x000U)
#define CVI_CTRL_SD0_CMD (0x004U)
#define CVI_CTRL_SD0_D0 (0x008U)
#define CVI_CTRL_SD0_D1 (0x00CU)
#define CVI_CTRL_SD0_D2 (0x010U)
#define CVI_CTRL_SD0_D3 (0x014U)
#define CVI_CTRL_SD0_CD (0x018U)
#define CVI_CTRL_SD0_PWR_EN (0x01CU)
#define CVI_CTRL_SPK_EN (0x020U)
#define CVI_CTRL_UART0_TX (0x024U)
#define CVI_CTRL_UART0_RX (0x028U)
#define CVI_CTRL_SPINOR_HOLD_X (0x02CU)
#define CVI_CTRL_SPINOR_SCK (0x030U)
#define CVI_CTRL_SPINOR_MOSI (0x034U)
#define CVI_CTRL_SPINOR_WP_X (0x038U)
#define CVI_CTRL_SPINOR_MISO (0x03CU)
#define CVI_CTRL_SPINOR_CS_X (0x040U)
#define CVI_CTRL_JTAG_CPU_TMS (0x044U)
#define CVI_CTRL_JTAG_CPU_TCK (0x048U)
#define CVI_CTRL_IIC0_SCL (0x04CU)
#define CVI_CTRL_IIC0_SDA (0x050U)
#define CVI_CTRL_AUX0 (0x054U)
#define CVI_CTRL_GPIO_ZQ (0x058U)
#define CVI_CTRL_PWR_VBAT_DET (0x05CU)
#define CVI_CTRL_PWR_RSTN (0x060U)
#define CVI_CTRL_PWR_SEQ1 (0x064U)
#define CVI_CTRL_PWR_SEQ2 (0x068U)
#define CVI_CTRL_PWR_WAKEUP0 (0x06CU)
#define CVI_CTRL_PWR_BUTTON1 (0x070U)
#define CVI_CTRL_XTAL_XIN (0x074U)
#define CVI_CTRL_PWR_GPIO0 (0x078U)
#define CVI_CTRL_PWR_GPIO1 (0x07CU)
#define CVI_CTRL_PWR_GPIO2 (0x080U)
#define CVI_CTRL_SD1_GPIO1 (0x084U)
#define CVI_CTRL_SD1_GPIO0 (0x088U)
#define CVI_CTRL_SD1_D3 (0x08CU)
#define CVI_CTRL_SD1_D2 (0x090U)
#define CVI_CTRL_SD1_D1 (0x094U)
#define CVI_CTRL_SD1_D0 (0x098U)
#define CVI_CTRL_SD1_CMD (0x09CU)
#define CVI_CTRL_SD1_CLK (0x0A0U)
#define CVI_CTRL_PWM0_BUCK (0x0A4U)
#define CVI_CTRL_ADC1 (0x0A8U)
#define CVI_CTRL_USB_VBUS_DET (0x0ACU)
#define CVI_CTRL_MUX_SPI1_MISO (0x0B0U)
#define CVI_CTRL_MUX_SPI1_MOSI (0x0B4U)
#define CVI_CTRL_MUX_SPI1_CS (0x0B8U)
#define CVI_CTRL_MUX_SPI1_SCK (0x0BCU)
#define CVI_CTRL_PAD_ETH_TXP (0x0C0U)
#define CVI_CTRL_PAD_ETH_TXM (0x0C4U)
#define CVI_CTRL_PAD_ETH_RXP (0x0C8U)
#define CVI_CTRL_PAD_ETH_RXM (0x0CCU)
#define CVI_CTRL_GPIO_RTX (0x0D0U)
#define CVI_CTRL_PAD_MIPIRX4N (0x0D4U)
#define CVI_CTRL_PAD_MIPIRX4P (0x0D8U)
#define CVI_CTRL_PAD_MIPIRX3N (0x0DCU)
#define CVI_CTRL_PAD_MIPIRX3P (0x0E0U)
#define CVI_CTRL_PAD_MIPIRX2N (0x0E4U)
#define CVI_CTRL_PAD_MIPIRX2P (0x0E8U)
#define CVI_CTRL_PAD_MIPIRX1N (0x0ECU)
#define CVI_CTRL_PAD_MIPIRX1P (0x0F0U)
#define CVI_CTRL_PAD_MIPIRX0N (0x0F4U)
#define CVI_CTRL_PAD_MIPIRX0P (0x0F8U)
#define CVI_CTRL_PAD_MIPI_TXM2 (0x0FCU)
#define CVI_CTRL_PAD_MIPI_TXP2 (0x100U)
#define CVI_CTRL_PAD_MIPI_TXM1 (0x104U)
#define CVI_CTRL_PAD_MIPI_TXP1 (0x108U)
#define CVI_CTRL_PAD_MIPI_TXM0 (0x10CU)
#define CVI_CTRL_PAD_MIPI_TXP0 (0x110U)
#define CVI_CTRL_PKG_TYPE0 (0x114U)
#define CVI_CTRL_PKG_TYPE1 (0x118U)
#define CVI_CTRL_PKG_TYPE2 (0x11CU)
#define CVI_CTRL_PAD_AUD_AINL_MIC (0x120U)
#define CVI_CTRL_PAD_AUD_AINR_MIC (0x124U)
#define CVI_CTRL_PAD_AUD_AOUTL (0x128U)
#define CVI_CTRL_PAD_AUD_AOUTR (0x12CU)
#endif /* DT_CV1800B_PINCTRL_H */