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clk: mpc83xx: Fix clocks for mpc832x

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gd->arch.sdhc_clk only exists when CONFIG_FSL_ESDHC is set,
so enclose it inside ifdefs.

gd->arch.qe_clk and gd->arch.brg_clk must be populated when
CONFIG_QE is set.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
This commit is contained in:
Christophe Leroy 2023-04-03 14:16:56 +02:00
parent b20db903c8
commit 34ae2b2abb
1 changed files with 7 additions and 0 deletions
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7
drivers/clk/mpc83xx_clk.c
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@ -346,8 +346,10 @@ static int mpc83xx_clk_probe(struct udevice *dev)
type = dev_get_driver_data(dev);
#ifdef CONFIG_FSL_ESDHC
if (mpc83xx_has_sdhc(type))
gd->arch.sdhc_clk = priv->speed[MPC83XX_CLK_SDHC];
#endif
gd->arch.core_clk = priv->speed[MPC83XX_CLK_CORE];
gd->arch.i2c1_clk = priv->speed[MPC83XX_CLK_I2C1];
@ -362,6 +364,11 @@ static int mpc83xx_clk_probe(struct udevice *dev)
gd->cpu_clk = priv->speed[MPC83XX_CLK_CORE];
gd->bus_clk = priv->speed[MPC83XX_CLK_CSB];
#ifdef CONFIG_QE
gd->arch.qe_clk = priv->speed[MPC83XX_CLK_QE];
gd->arch.brg_clk = priv->speed[MPC83XX_CLK_BRG];
#endif
return 0;
}