ARM: renesas: Add Renesas R8A779H0 V4M Gray Hawk board code
Add board code for the Renesas R8A779H0 V4M Gray Hawk board. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
This commit is contained in:
Hai Pham
Marek Vasut
parent
9e9a92e4a3
commit
53066deccb
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@ -1172,7 +1172,8 @@ dtb-$(CONFIG_RCAR_GEN3) += \
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dtb-$(CONFIG_RCAR_GEN4) += \
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r8a779a0-falcon-u-boot.dtb \
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r8a779f0-spider-u-boot.dtb \
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r8a779g0-white-hawk-u-boot.dtb
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r8a779g0-white-hawk-u-boot.dtb \
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r8a779h0-gray-hawk-u-boot.dtb
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dtb-$(CONFIG_TARGET_RZG2L) += \
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r9a07g044l2-smarc.dts
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42
arch/arm/dts/r8a779h0-gray-hawk-u-boot.dts
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42
arch/arm/dts/r8a779h0-gray-hawk-u-boot.dts
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@ -0,0 +1,42 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source extras for U-Boot for the Gray Hawk board
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*
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* Copyright (C) 2023 Renesas Electronics Corp.
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*/
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#include "r8a779h0-gray-hawk.dts"
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#include "r8a779h0-u-boot.dtsi"
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/ {
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aliases {
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spi0 = &rpc;
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};
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};
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&pfc {
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qspi0_pins: qspi0 {
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groups = "qspi0_ctrl", "qspi0_data4";
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function = "qspi0";
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};
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};
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&rpc {
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pinctrl-0 = <&qspi0_pins>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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spi-max-frequency = <40000000>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "s25fs512s", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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};
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};
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@ -50,10 +50,17 @@ config TARGET_WHITEHAWK
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help
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Support for Renesas R-Car Gen4 White Hawk platform
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config TARGET_GRAYHAWK
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bool "Gray Hawk board"
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imply R8A779H0
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help
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Support for Renesas R-Car Gen4 Gray Hawk platform
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endchoice
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source "board/renesas/falcon/Kconfig"
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source "board/renesas/spider/Kconfig"
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source "board/renesas/whitehawk/Kconfig"
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source "board/renesas/grayhawk/Kconfig"
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endif
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15
board/renesas/grayhawk/Kconfig
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15
board/renesas/grayhawk/Kconfig
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@ -0,0 +1,15 @@
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if TARGET_GRAYHAWK
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config SYS_SOC
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default "rmobile"
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config SYS_BOARD
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default "grayhawk"
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config SYS_VENDOR
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default "renesas"
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config SYS_CONFIG_NAME
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default "grayhawk"
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endif
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5
board/renesas/grayhawk/MAINTAINERS
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5
board/renesas/grayhawk/MAINTAINERS
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@ -0,0 +1,5 @@
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GRAYHAWK BOARD
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M: Marek Vasut <marek.vasut+renesas@mailbox.org>
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S: Maintained
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N: grayhawk
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N: r8a779h0
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9
board/renesas/grayhawk/Makefile
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9
board/renesas/grayhawk/Makefile
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@ -0,0 +1,9 @@
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#
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# board/renesas/grayhawk/Makefile
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#
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# Copyright (C) 2023 Renesas Electronics Corp.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := grayhawk.o ../rcar-common/common.o
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66
board/renesas/grayhawk/grayhawk.c
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66
board/renesas/grayhawk/grayhawk.c
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@ -0,0 +1,66 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* board/renesas/grayhawk/grayhawk.c
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* This file is Gray Hawk board support.
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*
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* Copyright (C) 2023 Renesas Electronics Corp.
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*/
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#include <asm/arch/rmobile.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/processor.h>
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#include <linux/errno.h>
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#include <asm/system.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void init_generic_timer(void)
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{
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const u32 freq = CONFIG_SYS_CLK_FREQ;
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/* Update memory mapped and register based freqency */
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asm volatile ("msr cntfrq_el0, %0" :: "r" (freq));
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writel(freq, CNTFID0);
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/* Enable counter */
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setbits_le32(CNTCR_BASE, CNTCR_EN);
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}
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static void init_gic_v3(void)
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{
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/* GIC v3 power on */
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writel(BIT(1), GICR_LPI_PWRR);
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/* Wait till the WAKER_CA_BIT changes to 0 */
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clrbits_le32(GICR_LPI_WAKER, BIT(1));
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while (readl(GICR_LPI_WAKER) & BIT(2))
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;
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writel(0xffffffff, GICR_SGI_BASE + GICR_IGROUPR0);
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}
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void s_init(void)
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{
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if (current_el() == 3)
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init_generic_timer();
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}
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int board_early_init_f(void)
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{
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/* Unlock CPG access */
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writel(0x5A5AFFFF, CPGWPR);
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writel(0xA5A50000, CPGWPCR);
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return 0;
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}
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int board_init(void)
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{
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if (current_el() == 3)
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init_gic_v3();
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return 0;
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}
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75
configs/r8a779h0_grayhawk_defconfig
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75
configs/r8a779h0_grayhawk_defconfig
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@ -0,0 +1,75 @@
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CONFIG_ARM=y
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_ARCH_RMOBILE=y
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CONFIG_SYS_MALLOC_LEN=0x4000000
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0xFFFE0000
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="r8a779h0-gray-hawk-u-boot"
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CONFIG_RCAR_GEN4=y
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CONFIG_TARGET_GRAYHAWK=y
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_SYS_CLK_FREQ=16666666
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# CONFIG_PSCI_RESET is not set
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CONFIG_SYS_LOAD_ADDR=0x58000000
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CONFIG_SYS_BOOT_GET_CMDLINE=y
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CONFIG_SYS_BARGSIZE=2048
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CONFIG_REMAKE_ELF=y
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CONFIG_FIT=y
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CONFIG_SUPPORT_RAW_INITRD=y
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779h0-gray-hawk.dtb && booti 0x48080000 - 0x48000000"
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CONFIG_DEFAULT_FDT_FILE="r8a779h0-gray-hawk.dtb"
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CONFIG_SYS_CBSIZE=2048
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CONFIG_SYS_MALLOC_BOOTPARAMS=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_MAXARGS=64
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_PART=2
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CONFIG_VERSION_VARIABLE=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_CLK=y
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CONFIG_CLK_RENESAS=y
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CONFIG_RCAR_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_RCAR_I2C=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS200_SUPPORT=y
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CONFIG_RENESAS_SDHI=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SPANSION=y
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# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
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CONFIG_BITBANGMII=y
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CONFIG_BITBANGMII_MULTI=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_RENESAS_RAVB=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_BAUDRATE=921600
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_RENESAS_RPC_SPI=y
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14
include/configs/grayhawk.h
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14
include/configs/grayhawk.h
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@ -0,0 +1,14 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* include/configs/grayhawk.h
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* This file is Gray Hawk board configuration.
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*
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* Copyright (C) 2023 Renesas Electronics Corp.
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*/
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#ifndef __GRAYHAWK_H
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#define __GRAYHAWK_H
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#include "rcar-gen4-common.h"
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#endif /* __GRAYHAWK_H */
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