arm: mediatek: retrieve ram_base from dts node for armv8 platform

Now we use fdtdec_setup_mem_size_base() to get DRAM base from fdt ram node
and update gd->ram_base. CFG_SYS_SDRAM_BASE is unused and will be removed.

Also, since mt7622 always passes fdt to linux kernel, there's no need to
assign value to gd->bd->bi_boot_params.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This commit is contained in:
Weijie Gao 2023-07-19 17:15:41 +08:00 committed by Tom Rini
parent 35e6c89b76
commit 5fd6d4c7b3
15 changed files with 68 additions and 37 deletions

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@ -18,6 +18,11 @@
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x10000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";

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@ -17,6 +17,11 @@
stdout-path = &uart0;
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x10000000>;
};
};
&uart0 {

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@ -18,6 +18,11 @@
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x10000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";

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@ -19,6 +19,11 @@
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x80000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";

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@ -18,6 +18,11 @@
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x10000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";

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@ -19,6 +19,11 @@
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x10000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";

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@ -18,6 +18,11 @@
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x10000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";

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@ -19,6 +19,11 @@
tick-timer = &timer0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x10000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";

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@ -4,11 +4,15 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
#include <common.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/cache.h>
#include <asm/system.h>
#include <asm/global_data.h>
#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
int print_cpuinfo(void)
{
@ -20,11 +24,13 @@ int dram_init(void)
{
int ret;
ret = fdtdec_setup_memory_banksize();
ret = fdtdec_setup_mem_size_base();
if (ret)
return ret;
return fdtdec_setup_mem_size_base();
gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_2G);
return 0;
}
void reset_cpu(void)

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@ -4,18 +4,25 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
#include <cpu_func.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <asm/global_data.h>
#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_2G);
int ret;
ret = fdtdec_setup_mem_size_base();
if (ret)
return ret;
gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_1G);
return 0;
}

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@ -4,18 +4,25 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
#include <cpu_func.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <asm/global_data.h>
#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_2G);
int ret;
ret = fdtdec_setup_mem_size_base();
if (ret)
return ret;
gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_2G);
return 0;
}

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@ -14,7 +14,6 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
return 0;
}

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@ -9,14 +9,4 @@
#ifndef __MT7622_H
#define __MT7622_H
/* Uboot definition */
#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* SPL -> Uboot */
#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x40000000
/* Ethernet */
#endif

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@ -9,13 +9,4 @@
#ifndef __MT7981_H
#define __MT7981_H
/* Uboot definition */
#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* SPL -> Uboot */
#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x40000000
#endif

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@ -9,13 +9,4 @@
#ifndef __MT7986_H
#define __MT7986_H
/* Uboot definition */
#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
/* SPL -> Uboot */
#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x40000000
#endif