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nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically

Browse Source 
Contrary to what the help message says, this is the number of pages per
block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and
SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to
SYS_NAND_BLOCK_PAGES.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
This commit is contained in:
Sean Anderson 2023-11-04 16:37:41 -04:00 committed by Tom Rini
parent 23c2ebe4d4
commit 601b8901e0
49 changed files with 22 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
README
View File

@ -1191,11 +1191,10 @@ The following options need to be configured:
Support for a lightweight UBI (fastmap) scanner and
loader
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
CFG_SYS_NAND_ECCPOS, CFG_SYS_NAND_ECCSIZE,
CFG_SYS_NAND_ECCBYTES
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_SIZE,
CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE,
CONFIG_SYS_NAND_BAD_BLOCK_POS, CFG_SYS_NAND_ECCPOS,
CFG_SYS_NAND_ECCSIZE, CFG_SYS_NAND_ECCBYTES
Defines the size and behavior of the NAND that SPL uses
to read U-Boot

1
configs/am335x_baltos_defconfig
View File

@ -67,7 +67,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/am335x_evm_defconfig
View File

@ -84,7 +84,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/am335x_guardian_defconfig
View File

@ -99,7 +99,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0x100
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/am335x_igep003x_defconfig
View File

@ -85,7 +85,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_MTD_UBI_FASTMAP=y

1
configs/am3517_evm_defconfig
View File

@ -75,7 +75,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/am43xx_evm_defconfig
View File

@ -72,7 +72,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/am43xx_evm_rtconly_defconfig
View File

@ -62,7 +62,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/am43xx_evm_usbhost_boot_defconfig
View File

@ -75,7 +75,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/am43xx_hs_evm_defconfig
View File

@ -68,7 +68,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/axm_defconfig
View File

@ -86,7 +86,6 @@ CONFIG_MTD=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/chiliboard_defconfig
View File

@ -63,7 +63,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/corvus_defconfig
View File

@ -81,7 +81,6 @@ CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/da850evm_nand_defconfig
View File

@ -88,7 +88,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/devkit3250_defconfig
View File

@ -73,7 +73,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_LPC32XX_SLC=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
# CONFIG_SYS_NAND_5_ADDR_CYCLE is not set

1
configs/devkit8000_defconfig
View File

@ -77,7 +77,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/dra7xx_evm_defconfig
View File

@ -104,7 +104,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/draco_defconfig
View File

@ -100,7 +100,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/etamin_defconfig
View File

@ -104,7 +104,6 @@ CONFIG_SYS_MAX_NAND_DEVICE=3
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x80
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/gardena-smart-gateway-at91sam_defconfig
View File

@ -99,7 +99,6 @@ CONFIG_MTD=y
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/igep00x0_defconfig
View File

@ -78,7 +78,6 @@ CONFIG_SYS_MTDPARTS_RUNTIME=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/m53menlo_defconfig
View File

@ -90,7 +90,6 @@ CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXC=y
CONFIG_MXC_NAND_HWECC=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/omap35_logic_defconfig
View File

@ -74,7 +74,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/omap35_logic_somlv_defconfig
View File

@ -83,7 +83,6 @@ CONFIG_SYS_MAX_FLASH_SECT=256
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/omap3_beagle_defconfig
View File

@ -83,7 +83,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/omap3_evm_defconfig
View File

@ -74,7 +74,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/omap3_logic_defconfig
View File

@ -73,7 +73,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/omap3_logic_somlv_defconfig
View File

@ -84,7 +84,6 @@ CONFIG_SYS_MAX_FLASH_SECT=256
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/omapl138_lcdk_defconfig
View File

@ -84,7 +84,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

1
configs/phycore-am335x-r2-regor_defconfig
View File

@ -76,7 +76,6 @@ CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/phycore-am335x-r2-wega_defconfig
View File

@ -76,7 +76,6 @@ CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/pxm2_defconfig
View File

@ -99,7 +99,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/rastaban_defconfig
View File

@ -100,7 +100,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/rut_defconfig
View File

@ -99,7 +99,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/sama5d3_xplained_nandflash_defconfig
View File

@ -86,7 +86,6 @@ CONFIG_PMECC_CAP=4
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/sama5d3xek_nandflash_defconfig
View File

@ -90,7 +90,6 @@ CONFIG_PMECC_CAP=4
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/sama5d4_xplained_nandflash_defconfig
View File

@ -84,7 +84,6 @@ CONFIG_PMECC_CAP=8
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/sama5d4ek_nandflash_defconfig
View File

@ -81,7 +81,6 @@ CONFIG_PMECC_CAP=8
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/smartweb_defconfig
View File

@ -84,7 +84,6 @@ CONFIG_MTD=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/taurus_defconfig
View File

@ -94,7 +94,6 @@ CONFIG_MTD=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

1
configs/thuban_defconfig
View File

@ -100,7 +100,6 @@ CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

8
drivers/mtd/nand/raw/Kconfig
View File

@ -659,14 +659,6 @@ config SYS_NAND_ONFI_DETECTION
And fetching device parameters flashed on device, by parsing
ONFI parameter page.
config SYS_NAND_PAGE_COUNT
hex "NAND chip page count"
depends on SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC || \
SPL_NAND_AM33XX_BCH || SPL_NAND_LOAD || SPL_NAND_SIMPLE || \
NAND_OMAP_GPMC)
help
Number of pages in the NAND chip.
config SYS_NAND_PAGE_SIZE
hex "NAND chip page size"
depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \

3
drivers/mtd/nand/raw/am335x_spl_bch.c
View File

@ -11,6 +11,7 @@
#include <common.h>
#include <nand.h>
#include <system-constants.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/mtd/nand_ecc.h>
@ -32,7 +33,7 @@ static int nand_command(int block, int page, uint32_t offs,
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;

5
drivers/mtd/nand/raw/atmel_nand.c
View File

@ -12,6 +12,7 @@
#include <common.h>
#include <log.h>
#include <system-constants.h>
#include <asm/gpio.h>
#include <asm/arch/gpio.h>
#include <dm/device_compat.h>
@ -1258,7 +1259,7 @@ static struct nand_chip nand_chip;
static int nand_command(int block, int page, uint32_t offs, u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
@ -1359,7 +1360,7 @@ int spl_nand_erase_one(int block, int page)
if (nand_chip.select_chip)
nand_chip.select_chip(mtd, 0);
page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
page_addr = page + block * SYS_NAND_BLOCK_PAGES;
hwctrl(mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Row address */
hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);

5
drivers/mtd/nand/raw/mxc_nand_spl.c
View File

@ -13,6 +13,7 @@
#include <common.h>
#include <hang.h>
#include <nand.h>
#include <system-constants.h>
#include <linux/mtd/rawnand.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
@ -304,13 +305,13 @@ int nand_spl_load_image(uint32_t from, unsigned int size, void *buf)
* Check if we have crossed a block boundary, and if so
* check for bad block.
*/
if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
if (!(page % SYS_NAND_BLOCK_PAGES)) {
/*
* Yes, new block. See if this block is good. If not,
* loop until we find a good block.
*/
while (is_badblock(page)) {
page = page + CONFIG_SYS_NAND_PAGE_COUNT;
page = page + SYS_NAND_BLOCK_PAGES;
/* Check i we've reached the end of flash. */
if (page >= maxpages)
return -1;

2
drivers/mtd/nand/raw/nand_spl_loaders.c
View File

@ -12,7 +12,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
while (block <= lastblock) {
if (!nand_is_bad_block(block)) {
/* Skip bad blocks */
while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
while (page < SYS_NAND_BLOCK_PAGES) {
nand_read_page(block, page, dst);
/*
* When offs is not aligned to page address the

5
drivers/mtd/nand/raw/nand_spl_simple.c
View File

@ -6,6 +6,7 @@
#include <common.h>
#include <nand.h>
#include <system-constants.h>
#include <asm/io.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/rawnand.h>
@ -27,7 +28,7 @@ static int nand_command(int block, int page, uint32_t offs,
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
while (!this->dev_ready(mtd))
;
@ -59,7 +60,7 @@ static int nand_command(int block, int page, uint32_t offs,
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;

3
drivers/mtd/nand/raw/omap_gpmc.c
View File

@ -6,6 +6,7 @@
#include <common.h>
#include <log.h>
#include <system-constants.h>
#include <asm/io.h>
#include <dm/uclass.h>
#include <linux/errno.h>
@ -1298,7 +1299,7 @@ static int nand_is_bad_block(int block)
static int nand_read_page(int block, int page, uchar *dst)
{
int page_addr = block * CONFIG_SYS_NAND_PAGE_COUNT + page;
int page_addr = block * SYS_NAND_BLOCK_PAGES + page;
loff_t ofs = page_addr * CONFIG_SYS_NAND_PAGE_SIZE;
int ret;
size_t len = CONFIG_SYS_NAND_PAGE_SIZE;

4
include/system-constants.h
View File

@ -41,4 +41,8 @@
#define SPL_PAYLOAD_ARGS_ADDR 0
#endif
/* Number of pages per block */
#define SYS_NAND_BLOCK_PAGES \
(CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE)
#endif