Revert "arch: arm: use dt and UCLASS_SYSCON to get gic lpi details"
Stop using the device tree as a source for ad-hoc information.
This reverts commit 2ae7adc659.
Signed-off-by: Michael Walle <michael@walle.cc>
[trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Michael Walle
Tom Rini
parent
a84cea06bb
commit
60b9b47d29
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@ -82,8 +82,6 @@ config GICV3
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config GIC_V3_ITS
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bool "ARM GICV3 ITS"
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select REGMAP
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select SYSCON
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select IRQ
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help
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ARM GICV3 Interrupt translation service (ITS).
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@ -41,11 +41,36 @@ DECLARE_GLOBAL_DATA_PTR;
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#endif
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#ifdef CONFIG_GIC_V3_ITS
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#define PENDTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
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#define PROPTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
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#define GIC_LPI_SIZE ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \
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PROPTABLE_MAX_SZ, SZ_1M)
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static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
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{
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int err;
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struct fdt_memory gic_rd_tables;
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gic_rd_tables.start = base;
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gic_rd_tables.end = base + size - 1;
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err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
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NULL, 0, NULL, 0);
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if (err < 0)
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debug("%s: failed to add reserved memory: %d\n", __func__, err);
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return err;
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}
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int ls_gic_rd_tables_init(void *blob)
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{
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u64 gic_lpi_base;
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int ret;
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ret = gic_lpi_tables_init();
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gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
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ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
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if (ret)
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return ret;
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ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
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if (ret)
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debug("%s: failed to init gic-lpi-tables\n", __func__);
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@ -127,9 +127,9 @@
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#define GIC_REDISTRIBUTOR_OFFSET 0x20000
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#ifdef CONFIG_GIC_V3_ITS
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int gic_lpi_tables_init(void);
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int gic_lpi_tables_init(u64 base, u32 max_redist);
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#else
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int gic_lpi_tables_init(void)
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int gic_lpi_tables_init(u64 base, u32 max_redist)
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{
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return 0;
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}
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@ -5,8 +5,6 @@
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#include <common.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <asm/gic.h>
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#include <asm/gic-v3.h>
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#include <asm/io.h>
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@ -19,22 +17,15 @@ static u32 lpi_id_bits;
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#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K)
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#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)
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/* Number of GIC re-distributors */
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#define MAX_GIC_REDISTRIBUTORS 8
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/*
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* gic_v3_its_priv - gic details
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*
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* @gicd_base: gicd base address
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* @gicr_base: gicr base address
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* @lpi_base: gic lpi base address
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* @num_redist: number of gic re-distributors
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*/
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struct gic_v3_its_priv {
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ulong gicd_base;
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ulong gicr_base;
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ulong lpi_base;
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u32 num_redist;
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};
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static int gic_v3_its_get_gic_addr(struct gic_v3_its_priv *priv)
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@ -68,39 +59,13 @@ static int gic_v3_its_get_gic_addr(struct gic_v3_its_priv *priv)
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return 0;
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}
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static int gic_v3_its_get_gic_lpi_addr(struct gic_v3_its_priv *priv)
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{
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struct regmap *regmap;
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struct udevice *dev;
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int ret;
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ret = uclass_get_device_by_driver(UCLASS_SYSCON,
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DM_DRIVER_GET(gic_lpi_syscon), &dev);
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if (ret) {
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pr_err("%s: failed to get %s syscon device\n", __func__,
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DM_DRIVER_GET(gic_lpi_syscon)->name);
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return ret;
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}
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regmap = syscon_get_regmap(dev);
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if (!regmap) {
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pr_err("%s: failed to regmap for %s syscon device\n", __func__,
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DM_DRIVER_GET(gic_lpi_syscon)->name);
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return -ENODEV;
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}
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priv->lpi_base = regmap->ranges[0].start;
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priv->num_redist = dev_read_u32_default(dev, "max-gic-redistributors",
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MAX_GIC_REDISTRIBUTORS);
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return 0;
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}
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/*
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* Program the GIC LPI configuration tables for all
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* the re-distributors and enable the LPI table
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* base: Configuration table address
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* num_redist: number of redistributors
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*/
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int gic_lpi_tables_init(void)
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int gic_lpi_tables_init(u64 base, u32 num_redist)
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{
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struct gic_v3_its_priv priv;
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u32 gicd_typer;
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@ -109,15 +74,12 @@ int gic_lpi_tables_init(void)
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int i;
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u64 redist_lpi_base;
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u64 pend_base;
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ulong pend_tab_total_sz;
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ulong pend_tab_total_sz = num_redist * LPI_PENDBASE_SZ;
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void *pend_tab_va;
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if (gic_v3_its_get_gic_addr(&priv))
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return -EINVAL;
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if (gic_v3_its_get_gic_lpi_addr(&priv))
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return -EINVAL;
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gicd_typer = readl((uintptr_t)(priv.gicd_base + GICD_TYPER));
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/* GIC support for Locality specific peripheral interrupts (LPI's) */
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if (!(gicd_typer & GICD_TYPER_LPIS)) {
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@ -130,7 +92,7 @@ int gic_lpi_tables_init(void)
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* Once the LPI table is enabled, can not program the
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* LPI configuration tables again, unless the GIC is reset.
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*/
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for (i = 0; i < priv.num_redist; i++) {
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for (i = 0; i < num_redist; i++) {
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u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
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if ((readl((uintptr_t)(priv.gicr_base + offset))) &
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@ -146,7 +108,7 @@ int gic_lpi_tables_init(void)
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ITS_MAX_LPI_NRBITS);
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/* Set PropBase */
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val = (priv.lpi_base |
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val = (base |
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GICR_PROPBASER_INNERSHAREABLE |
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GICR_PROPBASER_RAWAWB |
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((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK));
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@ -163,8 +125,7 @@ int gic_lpi_tables_init(void)
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}
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}
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redist_lpi_base = priv.lpi_base + LPI_PROPBASE_SZ;
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pend_tab_total_sz = priv.num_redist * LPI_PENDBASE_SZ;
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redist_lpi_base = base + LPI_PROPBASE_SZ;
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pend_tab_va = map_physmem(redist_lpi_base, pend_tab_total_sz,
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MAP_NOCACHE);
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memset(pend_tab_va, 0, pend_tab_total_sz);
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@ -172,7 +133,7 @@ int gic_lpi_tables_init(void)
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unmap_physmem(pend_tab_va, MAP_NOCACHE);
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pend_base = priv.gicr_base + GICR_PENDBASER;
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for (i = 0; i < priv.num_redist; i++) {
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for (i = 0; i < num_redist; i++) {
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u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
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val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) |
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@ -207,14 +168,3 @@ U_BOOT_DRIVER(arm_gic_v3_its) = {
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.id = UCLASS_IRQ,
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.of_match = gic_v3_its_ids,
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};
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static const struct udevice_id gic_lpi_syscon_ids[] = {
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{ .compatible = "gic-lpi-base" },
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{}
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};
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U_BOOT_DRIVER(gic_lpi_syscon) = {
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.name = "gic-lpi-base",
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.id = UCLASS_SYSCON,
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.of_match = gic_lpi_syscon_ids,
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};
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@ -196,7 +196,8 @@ int ft_board_setup(void *fdt, struct bd_info *bd)
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{
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u32 chimp_hs = CHIMP_HANDSHAKE_WAIT_TIMEOUT;
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gic_lpi_tables_init();
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/* FIXME: Need to call gic_lpi_tables_init correctly now */
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printf("%s: failed to init gic-lpi-tables\n", __func__);
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/*
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* Check for chimp handshake status.
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