diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index ceadb9b952..9b76fa2294 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -39,11 +39,17 @@ secondary_harts_relocation_error:
 
 .section .text
 .globl _start
-#if defined(CONFIG_ENABLE_RISCV_SOC_BOOT0_HOOK)
-#include <asm/arch/boot0.h>
-#else
 _start:
+
+#if defined(CONFIG_ENABLE_RISCV_SOC_BOOT0_HOOK)
+/*
+ * Various SoCs need something special and SoC-specific up front in
+ * order to boot, allow them to set that in their boot0.h file and then
+ * use it here.
+ */
+#include <asm/arch/boot0.h>
 #endif
+
 #if CONFIG_IS_ENABLED(RISCV_MMODE)
 	csrr	a0, CSR_MHARTID
 #endif
diff --git a/arch/riscv/include/asm/arch-cv1800b/boot0.h b/arch/riscv/include/asm/arch-cv1800b/boot0.h
index 76b1313631..4ffc97bcb0 100644
--- a/arch/riscv/include/asm/arch-cv1800b/boot0.h
+++ b/arch/riscv/include/asm/arch-cv1800b/boot0.h
@@ -6,7 +6,6 @@
 #ifndef __BOOT0_H__
 #define __BOOT0_H__
 
-_start:
 /* BOOT0 header information */
 	j boot0_time_recode
 	.balign 4
diff --git a/board/milkv/cv1800b_milkv_duo/Kconfig b/board/milkv/cv1800b_milkv_duo/Kconfig
index f51738dbcb..4b2d7102d7 100644
--- a/board/milkv/cv1800b_milkv_duo/Kconfig
+++ b/board/milkv/cv1800b_milkv_duo/Kconfig
@@ -20,10 +20,11 @@ config BOARD_SPECIFIC_OPTIONS
 	select CVITEK_CV1800B
 	imply CPU
 	imply CPU_RISCV
-	imply RISCV_TIMER if RISCV_SMODE
 	imply CMD_CPU
 	imply SUPPORT_OF_CONTROL
-	imply PINCTRL_CV1800B
 	imply OF_CONTROL
 	imply OF_REAL
+	imply PINCTRL_CV1800B
+	imply DM_I2C
+	imply SYS_I2C_DW
 endif