rockchip: rk3328: Add support for Orange Pi R1 Plus
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong. This device is similar to the NanoPi R2S, and has a 16MB SPI NOR (mx25l12805d). The reset button is changed to directly reset the power supply, another detail is that both network ports have independent MAC addresses. The device tree and description are taken from kernel v6.3-rc1. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tianling Shen <cnsztl@gmail.com>
This commit is contained in:
Tianling Shen
Kever Yang
parent
182d0ba6d6
commit
69e16c7b1c
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@ -125,6 +125,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb \
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rk3328-nanopi-r2c.dtb \
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rk3328-nanopi-r2s.dtb \
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rk3328-orangepi-r1-plus.dtb \
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rk3328-roc-cc.dtb \
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rk3328-rock64.dtb \
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rk3328-rock-pi-e.dtb
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46
arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
Normal file
46
arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
Normal file
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@ -0,0 +1,46 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
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* (C) Copyright 2020 David Bauer
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*/
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#include "rk3328-u-boot.dtsi"
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#include "rk3328-sdram-ddr4-666.dtsi"
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/ {
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
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};
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};
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&gpio0 {
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bootph-pre-ram;
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};
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&pinctrl {
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bootph-pre-ram;
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};
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&sdmmc0m1_pin {
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bootph-pre-ram;
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};
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&pcfg_pull_up_4ma {
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bootph-pre-ram;
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};
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/* Need this and all the pinctrl/gpio stuff above to set pinmux */
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&vcc_sd {
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bootph-pre-ram;
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};
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&gmac2io {
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snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 50000>;
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};
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&spi0 {
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spi_flash: spiflash@0 {
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bootph-all;
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};
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};
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373
arch/arm/dts/rk3328-orangepi-r1-plus.dts
Normal file
373
arch/arm/dts/rk3328-orangepi-r1-plus.dts
Normal file
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@ -0,0 +1,373 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Based on rk3328-nanopi-r2s.dts, which is:
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* Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "rk3328.dtsi"
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/ {
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model = "Xunlong Orange Pi R1 Plus";
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compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
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aliases {
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ethernet1 = &rtl8153;
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mmc0 = &sdmmc;
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};
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chosen {
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stdout-path = "serial2:1500000n8";
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};
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gmac_clk: gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "gmac_clkin";
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#clock-cells = <0>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
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pinctrl-names = "default";
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led-0 {
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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};
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led-1 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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led-2 {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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};
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};
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vcc_sd: sdmmc-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&sdmmc0m1_pin>;
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pinctrl-names = "default";
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regulator-name = "vcc_sd";
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regulator-boot-on;
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vin-supply = <&vcc_io>;
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};
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vcc_sys: vcc-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vdd_5v_lan: vdd-5v-lan-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&lan_vdd_pin>;
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pinctrl-names = "default";
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regulator-name = "vdd_5v_lan";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc_sys>;
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};
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu1 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu2 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu3 {
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cpu-supply = <&vdd_arm>;
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};
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&display_subsystem {
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status = "disabled";
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};
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&gmac2io {
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assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
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clock_in_out = "input";
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phy-handle = <&rtl8211e>;
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phy-mode = "rgmii";
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phy-supply = <&vcc_io>;
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pinctrl-0 = <&rgmiim1_pins>;
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pinctrl-names = "default";
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snps,aal;
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rx_delay = <0x18>;
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tx_delay = <0x24>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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rtl8211e: ethernet-phy@1 {
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reg = <1>;
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pinctrl-0 = <ð_phy_reset_pin>;
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pinctrl-names = "default";
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reset-assert-us = <10000>;
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reset-deassert-us = <50000>;
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reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&i2c1 {
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status = "okay";
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rk805: pmic@18 {
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compatible = "rockchip,rk805";
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reg = <0x18>;
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interrupt-parent = <&gpio1>;
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interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <1>;
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clock-output-names = "xin32k", "rk805-clkout2";
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gpio-controller;
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#gpio-cells = <2>;
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pinctrl-0 = <&pmic_int_l>;
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pinctrl-names = "default";
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rockchip,system-power-controller;
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wakeup-source;
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vcc1-supply = <&vcc_sys>;
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vcc2-supply = <&vcc_sys>;
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vcc3-supply = <&vcc_sys>;
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vcc4-supply = <&vcc_sys>;
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vcc5-supply = <&vcc_io>;
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vcc6-supply = <&vcc_sys>;
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regulators {
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vdd_log: DCDC_REG1 {
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vdd_arm: DCDC_REG2 {
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regulator-name = "vdd_arm";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <950000>;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_io: DCDC_REG4 {
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regulator-name = "vcc_io";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc_18: LDO_REG1 {
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regulator-name = "vcc_18";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc18_emmc: LDO_REG2 {
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regulator-name = "vcc18_emmc";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vdd_10: LDO_REG3 {
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regulator-name = "vdd_10";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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};
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};
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};
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&io_domains {
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pmuio-supply = <&vcc_io>;
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vccio1-supply = <&vcc_io>;
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vccio2-supply = <&vcc18_emmc>;
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vccio3-supply = <&vcc_io>;
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vccio4-supply = <&vcc_io>;
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vccio5-supply = <&vcc_io>;
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vccio6-supply = <&vcc_io>;
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status = "okay";
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};
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&pinctrl {
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gmac2io {
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eth_phy_reset_pin: eth-phy-reset-pin {
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rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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leds {
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lan_led_pin: lan-led-pin {
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rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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sys_led_pin: sys-led-pin {
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rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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wan_led_pin: wan-led-pin {
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rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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lan {
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lan_vdd_pin: lan-vdd-pin {
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rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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pmic_int_l: pmic-int-l {
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rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&pwm2 {
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-sd-highspeed;
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disable-wp;
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pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sd>;
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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};
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};
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&tsadc {
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rockchip,hw-tshut-mode = <0>;
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rockchip,hw-tshut-polarity = <0>;
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status = "okay";
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};
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&u2phy {
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status = "okay";
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};
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&u2phy_host {
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status = "okay";
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};
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&u2phy_otg {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&usb20_otg {
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dr_mode = "host";
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status = "okay";
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};
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&usbdrd3 {
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dr_mode = "host";
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Second port is for USB 3.0 */
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rtl8153: device@2 {
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compatible = "usbbda,8153";
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reg = <2>;
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};
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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@ -18,6 +18,12 @@ F: configs/nanopi-r2s-rk3328_defconfig
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F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
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F: arch/arm/dts/rk3328-nanopi-r2s.dts
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ORANGEPI-R1-PLUS-RK3328
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M: Tianling Shen <cnsztl@gmail.com>
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S: Maintained
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F: configs/orangepi-r1-plus-rk3328_defconfig
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F: arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
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ROC-RK3328-CC
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M: Loic Devulder <ldevulder@suse.com>
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M: Chen-Yu Tsai <wens@csie.org>
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114
configs/orangepi-r1-plus-rk3328_defconfig
Normal file
114
configs/orangepi-r1-plus-rk3328_defconfig
Normal file
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@ -0,0 +1,114 @@
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CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_TEXT_BASE=0x00200000
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
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CONFIG_DM_RESET=y
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CONFIG_ROCKCHIP_RK3328=y
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CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
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CONFIG_TPL_LIBCOMMON_SUPPORT=y
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CONFIG_TPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_SPL_STACK=0x400000
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CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
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CONFIG_DEBUG_UART_BASE=0xFF130000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SYS_LOAD_ADDR=0x800800
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CONFIG_DEBUG_UART=y
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb"
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_SPL_MAX_SIZE=0x40000
|
||||
CONFIG_SPL_PAD_TO=0x7f8000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x2000000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_POWER=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
||||
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_TPL_OF_CONTROL=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_TPL_OF_PLATDATA=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SYS_MMC_ENV_DEV=1
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_TPL_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_TPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
CONFIG_TPL_SYSCON=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_ETH_DESIGNWARE=y
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_RK8XX=y
|
||||
CONFIG_SPL_PMIC_RK8XX=y
|
||||
CONFIG_SPL_DM_REGULATOR=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_SPL_DM_REGULATOR_FIXED=y
|
||||
CONFIG_REGULATOR_RK8XX=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SYS_NS16550_MEM32=y
|
||||
CONFIG_ROCKCHIP_SPI=y
|
||||
CONFIG_SYSINFO=y
|
||||
CONFIG_SYSRESET=y
|
||||
# CONFIG_TPL_SYSRESET is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC2=y
|
||||
CONFIG_USB_DWC3=y
|
||||
# CONFIG_USB_DWC3_GADGET is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_TPL_TINY_MEMSET=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
Loading…
Reference in New Issue
Block a user