imx6q_logic: Enable MMC booting from SPL
The MMC booting wasn't previously fitting into the codespace. This patch enables MMC booting from the baseboard by reducing some DM overhead during SPL. Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
Adam Ford
Stefano Babic
parent
8ba377321c
commit
79ae06ff58
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@ -60,6 +60,7 @@ static iomux_v3_cfg_t const uart3_pads[] = {
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MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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#ifndef CONFIG_SPL_BUILD
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static void fixup_enet_clock(void)
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{
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struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
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@ -108,6 +109,7 @@ static void fixup_enet_clock(void)
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dm_gpio_set_value(&reset, 1);
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mdelay(50);
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}
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#endif
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static void setup_iomux_uart(void)
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{
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@ -158,7 +160,9 @@ int overwrite_console(void)
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int board_early_init_f(void)
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{
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#ifndef CONFIG_SPL_BUILD
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fixup_enet_clock();
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#endif
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setup_iomux_uart();
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setup_nand_pins();
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return 0;
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@ -200,6 +204,74 @@ int spl_start_uboot(void)
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}
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#endif
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/* SD interface */
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#define USDHC_PAD_CTRL \
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(PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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static iomux_v3_cfg_t const usdhc1_pads[] = {
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MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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};
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static iomux_v3_cfg_t const usdhc2_pads[] = {
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MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
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};
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg usdhc_cfg[] = {
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{USDHC1_BASE_ADDR}, /* SOM */
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{USDHC2_BASE_ADDR} /* Baseboard */
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};
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int board_mmc_init(bd_t *bis)
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{
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struct src *psrc = (struct src *)SRC_BASE_ADDR;
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unsigned int reg = readl(&psrc->sbmr1) >> 11;
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/*
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* Upon reading BOOT_CFG register the following map is done:
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* Bit 11 and 12 of BOOT_CFG register can determine the current
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* mmc port
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* 0x1 SD1-SOM
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* 0x2 SD2-Baseboard
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*/
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reg &= 0x3; /* Only care about bottom 2 bits */
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switch (reg) {
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case 0:
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SETUP_IOMUX_PADS(usdhc1_pads);
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usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
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break;
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case 1:
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SETUP_IOMUX_PADS(usdhc2_pads);
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usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR;
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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gd->arch.sdhc_clk = usdhc_cfg[1].sdhc_clk;
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break;
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}
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return fsl_esdhc_initialize(bis, &usdhc_cfg[reg]);
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}
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int board_mmc_getcd(struct mmc *mmc)
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{
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return 1;
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}
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#endif
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static void ccgr_init(void)
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{
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struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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@ -4,26 +4,26 @@ CONFIG_SYS_TEXT_BASE=0x17800000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_MX6LOGICPD=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
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CONFIG_SPL=y
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CONFIG_SPL_FAT_SUPPORT=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
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CONFIG_BOOTDELAY=3
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# CONFIG_USE_BOOTCOMMAND is not set
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
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CONFIG_BOUNCE_BUFFER=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_SEPARATE_BSS=y
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# CONFIG_TPL_BANNER_PRINT is not set
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# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
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CONFIG_SPL_DMA_SUPPORT=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_SPL_OS_BOOT=y
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CONFIG_SPL_PAYLOAD="u-boot.img"
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CONFIG_SPL_USB_HOST_SUPPORT=y
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CONFIG_SPL_USB_GADGET=y
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CONFIG_SPL_USB_SDP_SUPPORT=y
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@ -48,13 +48,11 @@ CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:2m(spl),2m(uboot),1m(env),16m(kernel),1m(dtb),-(fs)"
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CONFIG_CMD_UBI=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd"
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_SPL_DM=y
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CONFIG_PCF8575_GPIO=y
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CONFIG_SYS_I2C_MXC=y
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CONFIG_DM_I2C=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_FSL_ESDHC=y
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@ -65,7 +63,6 @@ CONFIG_PHY_ATHEROS=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX6=y
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CONFIG_DM_PMIC_PFUZE100=y
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CONFIG_MXC_UART=y
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