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spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR

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Rename this so that SPL is first, as per U-Boot convention. Also add
PAYLOAD_ since this is where in memory the parameters for the payload
have been stored.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2023-09-26 08:14:17 -06:00 committed by Tom Rini
parent 82e26e0d68
commit 9cbdc3a0fc
39 changed files with 51 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon
View File

@ -30,7 +30,7 @@ to understand the device tree in FIT image should be the one actually used, or
leave it absent to favor the stored sectors. It is easier to deploy the FIT
image with embedded static device tree to multiple boards.
Macro CONFIG_SYS_SPL_ARGS_ADDR serves two purposes. One is the pointer to load
Macro CONFIG_SPL_PAYLOAD_ARGS_ADDR serves two purposes. One is the pointer to load
the stored sectors to. Normally this is the static device tree. The second
purpose is the memory location of signature header for secure boot. After the
FIT image is loaded into memory, it is validated against the signature header

2
common/spl/Kconfig
View File

@ -1063,7 +1063,7 @@ config SPL_OS_BOOT
Enable booting directly to an OS from SPL.
for more info read doc/README.falcon
config SYS_SPL_ARGS_ADDR
config SPL_PAYLOAD_ARGS_ADDR
hex "Address in memory to load 'args' file for Falcon Mode to"
depends on SPL_OS_BOOT
default 0x88000000 if ARCH_OMAP2PLUS

8
common/spl/spl.c
View File

@ -814,8 +814,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
}
memset(&spl_image, '\0', sizeof(spl_image));
#ifdef CONFIG_SYS_SPL_ARGS_ADDR
spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
#ifdef CONFIG_SPL_PAYLOAD_ARGS_ADDR
spl_image.arg = (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR;
#endif
spl_image.boot_device = BOOT_DEVICE_NONE;
board_boot_order(spl_boot_list);
@ -873,8 +873,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
#if CONFIG_IS_ENABLED(OS_BOOT)
case IH_OS_LINUX:
debug("Jumping to Linux\n");
#if defined(CONFIG_SYS_SPL_ARGS_ADDR)
spl_fixup_fdt((void *)CONFIG_SYS_SPL_ARGS_ADDR);
#if defined(CONFIG_SPL_PAYLOAD_ARGS_ADDR)
spl_fixup_fdt((void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR);
#endif
spl_board_prepare_for_linux();
jump_to_image_linux(&spl_image);

4
common/spl/spl_ext.c
View File

@ -97,7 +97,7 @@ int spl_load_image_ext_os(struct spl_image_info *spl_image,
puts("spl: ext4fs_open failed\n");
goto defaults;
}
err = ext4fs_read((void *)CONFIG_SYS_SPL_ARGS_ADDR, 0, filelen, &actlen);
err = ext4fs_read((void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR, 0, filelen, &actlen);
if (err < 0) {
printf("spl: error reading image %s, err - %d, falling back to default\n",
file, err);
@ -127,7 +127,7 @@ defaults:
if (err < 0)
puts("spl: ext4fs_open failed\n");
err = ext4fs_read((void *)CONFIG_SYS_SPL_ARGS_ADDR, 0, filelen, &actlen);
err = ext4fs_read((void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR, 0, filelen, &actlen);
if (err < 0) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("%s: error reading image %s, err - %d\n",

4
common/spl/spl_fat.c
View File

@ -128,7 +128,7 @@ int spl_load_image_fat_os(struct spl_image_info *spl_image,
#if defined(CONFIG_SPL_ENV_SUPPORT) && defined(CONFIG_SPL_OS_BOOT)
file = env_get("falcon_args_file");
if (file) {
err = file_fat_read(file, (void *)CONFIG_SYS_SPL_ARGS_ADDR, 0);
err = file_fat_read(file, (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR, 0);
if (err <= 0) {
printf("spl: error reading image %s, err - %d, falling back to default\n",
file, err);
@ -153,7 +153,7 @@ defaults:
#endif
err = file_fat_read(CONFIG_SPL_FS_LOAD_ARGS_NAME,
(void *)CONFIG_SYS_SPL_ARGS_ADDR, 0);
(void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR, 0);
if (err <= 0) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("%s: error reading image %s, err - %d\n",

2
common/spl/spl_mmc.c
View File

@ -235,7 +235,7 @@ static int mmc_load_image_raw_os(struct spl_image_info *spl_image,
count = blk_dread(mmc_get_blk_desc(mmc),
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS,
(void *) CONFIG_SYS_SPL_ARGS_ADDR);
(void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR);
if (count != CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
puts("mmc_load_image_raw_os: mmc block read error\n");

10
common/spl/spl_nand.c
View File

@ -159,11 +159,11 @@ static int spl_nand_load_image(struct spl_image_info *spl_image,
CONFIG_CMD_SPL_WRITE_SIZE,
(void *)CONFIG_TEXT_BASE);
/* copy to destintion */
for (dst = (int *)CONFIG_SYS_SPL_ARGS_ADDR,
src = (int *)CONFIG_TEXT_BASE;
src < (int *)(CONFIG_TEXT_BASE +
CONFIG_CMD_SPL_WRITE_SIZE);
src++, dst++) {
for (dst = (int *)CONFIG_SPL_PAYLOAD_ARGS_ADDR,
src = (int *)CONFIG_TEXT_BASE;
src < (int *)(CONFIG_TEXT_BASE +
CONFIG_CMD_SPL_WRITE_SIZE);
src++, dst++) {
writel(readl(src), dst);
}

8
common/spl/spl_nor.c
View File

@ -54,8 +54,8 @@ static int spl_nor_load_image(struct spl_image_info *spl_image,
CONFIG_SYS_OS_BASE,
(void *)header);
#if defined CONFIG_SYS_SPL_ARGS_ADDR && defined CONFIG_CMD_SPL_NOR_OFS
memcpy((void *)CONFIG_SYS_SPL_ARGS_ADDR,
#if defined CONFIG_SPL_PAYLOAD_ARGS_ADDR && defined CONFIG_CMD_SPL_NOR_OFS
memcpy((void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR,
(void *)CONFIG_CMD_SPL_NOR_OFS,
CONFIG_CMD_SPL_WRITE_SIZE);
#endif
@ -74,8 +74,8 @@ static int spl_nor_load_image(struct spl_image_info *spl_image,
(void *)(CONFIG_SYS_OS_BASE +
sizeof(struct legacy_img_hdr)),
spl_image->size);
#ifdef CONFIG_SYS_SPL_ARGS_ADDR
spl_image->arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
#ifdef CONFIG_SPL_PAYLOAD_ARGS_ADDR
spl_image->arg = (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR;
#endif
return 0;

2
common/spl/spl_spi.c
View File

@ -47,7 +47,7 @@ static int spi_load_image_os(struct spl_image_info *spl_image,
/* Read device tree. */
spi_flash_read(flash, CFG_SYS_SPI_ARGS_OFFS,
CFG_SYS_SPI_ARGS_SIZE,
(void *)CONFIG_SYS_SPL_ARGS_ADDR);
(void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR);
return 0;
}

2
common/spl/spl_ubi.c
View File

@ -50,7 +50,7 @@ int spl_ubi_load_image(struct spl_image_info *spl_image,
volumes[0].vol_id = CONFIG_SPL_UBI_LOAD_KERNEL_ID;
volumes[0].load_addr = (void *)CONFIG_SYS_LOAD_ADDR;
volumes[1].vol_id = CONFIG_SPL_UBI_LOAD_ARGS_ID;
volumes[1].load_addr = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
volumes[1].load_addr = (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR;
ret = ubispl_load_volumes(&info, volumes, 2);
if (!ret) {

2
common/spl/spl_xip.c
View File

@ -14,7 +14,7 @@ static int spl_xip(struct spl_image_info *spl_image,
{
#if CONFIG_IS_ENABLED(OS_BOOT)
if (!spl_start_uboot()) {
spl_image->arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
spl_image->arg = (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR;
spl_image->name = "Linux";
spl_image->os = IH_OS_LINUX;
spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;

2
configs/am3517_evm_defconfig
View File

@ -32,7 +32,7 @@ CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x84000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x84000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x2a0000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700

2
configs/devkit8000_defconfig
View File

@ -28,7 +28,7 @@ CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x80000100
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80000100
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x500

2
configs/display5_defconfig
View File

@ -45,7 +45,7 @@ CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_SAVEENV=y
CONFIG_SPL_I2C=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x100
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x3F00

2
configs/display5_factory_defconfig
View File

@ -40,7 +40,7 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_I2C=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x100
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x3F00

2
configs/gwventana_emmc_defconfig
View File

@ -49,7 +49,7 @@ CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DMA=y
CONFIG_SPL_I2C=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800

2
configs/gwventana_nand_defconfig
View File

@ -50,7 +50,7 @@ CONFIG_SPL_DMA=y
CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x1200000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000

2
configs/igep00x0_defconfig
View File

@ -43,7 +43,7 @@ CONFIG_SPL_UBI_LOAD_KERNEL_ID=3
CONFIG_SPL_UBI_LOAD_ARGS_ID=4
CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x84000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x84000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700

2
configs/imx28_xea_defconfig
View File

@ -51,7 +51,7 @@ CONFIG_SPL_DMA=y
CONFIG_SPL_MMC_TINY=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x44000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x44000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x800
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x400

2
configs/imx6dl_mamoj_defconfig
View File

@ -20,7 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x13000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x13000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800

2
configs/imx6q_logic_defconfig
View File

@ -35,7 +35,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x500000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000

2
configs/imx6qdl_icore_mipi_defconfig
View File

@ -35,7 +35,7 @@ CONFIG_BOOTCOMMAND="run $modeboot"
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800

2
configs/imx6qdl_icore_mmc_defconfig
View File

@ -38,7 +38,7 @@ CONFIG_BOOTCOMMAND="run $modeboot"
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800

2
configs/imx6qdl_icore_rqs_defconfig
View File

@ -32,7 +32,7 @@ CONFIG_BOOTCOMMAND="run $modeboot"
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1000
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800

2
configs/ls1046ardb_qspi_spl_defconfig
View File

@ -61,7 +61,7 @@ CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x90000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x90000000
CONFIG_SYS_OS_BASE=0x40980000
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_TARGET="spl/u-boot-spl.pbl"

2
configs/mccmon6_nor_defconfig
View File

@ -29,7 +29,7 @@ CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x18000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SYS_OS_BASE=0x8180000
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=532

2
configs/omap35_logic_defconfig
View File

@ -36,7 +36,7 @@ CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x84000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x84000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700

2
configs/omap35_logic_somlv_defconfig
View File

@ -37,7 +37,7 @@ CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x84000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x84000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700

2
configs/omap3_logic_defconfig
View File

@ -35,7 +35,7 @@ CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x84000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x84000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700

2
configs/omap3_logic_somlv_defconfig
View File

@ -37,7 +37,7 @@ CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x84000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x84000000
CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700

2
configs/riotboard_defconfig
View File

@ -35,7 +35,7 @@ CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
CONFIG_SPL_FS_LOAD_ARGS_NAME="imx6dl-riotboard.dtb"
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x13000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x13000000
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y

2
configs/stm32746g-eval_spl_defconfig
View File

@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x80c0000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050

2
configs/stm32f746-disco_spl_defconfig
View File

@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x80c0000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050

2
configs/stm32f769-disco_spl_defconfig
View File

@ -35,7 +35,7 @@ CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x81c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050

2
configs/syzygy_hub_defconfig
View File

@ -32,7 +32,7 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb"
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x10000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x10000000
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=2071
CONFIG_SYS_BOOTM_LEN=0x3c00000

2
configs/vyasa-rk3288_defconfig
View File

@ -32,7 +32,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0xffe5000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0xffe5000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x8800
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x8000

2
configs/xilinx_zynq_virt_defconfig
View File

@ -43,7 +43,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb"
CONFIG_SPL_FPGA=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x10000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x10000000
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_MAXARGS=32

2
configs/xilinx_zynqmp_virt_defconfig
View File

@ -43,7 +43,7 @@ CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub"
CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin"
CONFIG_SPL_FPGA=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_SPL_ARGS_ADDR=0x8000000
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x8000000
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y

2
doc/develop/falcon.rst
View File

@ -63,7 +63,7 @@ CONFIG_CMD_SPL
Enable the "spl export" command.
The command "spl export" is then available in U-Boot mode.
CONFIG_SYS_SPL_ARGS_ADDR
CONFIG_SPL_PAYLOAD_ARGS_ADDR
Address in RAM where the parameters must be copied by SPL.
In most cases, it is <start_of_ram> + 0x100.