drivers/mtd/nvmxip: introduce QSPI XIP driver
add nvmxip_qspi driver under UCLASS_NVMXIP The device associated with this driver is the parent of the blk#<id> device nvmxip_qspi can be reused by other platforms. If the platform has custom settings to apply before using the flash, then the platform can provide its own parent driver belonging to UCLASS_NVMXIP and reuse nvmxip-blk driver. The custom driver can be implemented like nvmxip_qspi in addition to the platform custom settings. Platforms can use multiple NVM XIP devices at the same time by defining a DT node for each one of them. For more details please refer to doc/develop/driver-model/nvmxip_qspi.rst Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
This commit is contained in:
Abdellatif El Khlifi
Tom Rini
parent
f37af2760e
commit
9e115ace35
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@ -1208,6 +1208,7 @@ NVMXIP
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M: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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S: Maintained
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F: doc/develop/driver-model/nvmxip.rst
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F: doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
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F: drivers/mtd/nvmxip/
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NVMEM
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@ -25,7 +25,33 @@ The NVMXIP Uclass provides the following drivers:
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the Uclass creates a block device and binds it with the nvmxip-blk.
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The Uclass driver implemented by drivers/mtd/nvmxip/nvmxip-uclass.c
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The implementation is generic and can be used by different platforms.
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nvmxip_qspi driver :
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The driver probed with the DT and is the parent of the blk#<id> device.
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nvmxip_qspi can be reused by other platforms. If the platform
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has custom settings to apply before using the flash, then the platform
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can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
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nvmxip-blk. The custom driver can be implemented like nvmxip_qspi in
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addition to the platform custom settings.
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The nvmxip_qspi driver belongs to UCLASS_NVMXIP.
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The driver implemented by drivers/mtd/nvmxip/nvmxip_qspi.c
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For example, if we have two NVMXIP devices described in the DT
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The devices hierarchy is as follows:
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::
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=> dm tree
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Class Index Probed Driver Name
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-----------------------------------------------------------
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...
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nvmxip 0 [ + ] nvmxip_qspi |-- nvmxip-qspi1@08000000
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blk 3 [ + ] nvmxip-blk | `-- nvmxip-qspi1@08000000.blk#1
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nvmxip 1 [ + ] nvmxip_qspi |-- nvmxip-qspi2@08200000
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blk 4 [ + ] nvmxip-blk | `-- nvmxip-qspi2@08200000.blk#2
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The implementation is generic and can be used by different platforms.
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Supported hardware
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--------------------------------
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@ -43,6 +69,23 @@ config NVMXIP
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handles the read operation. This driver is HW agnostic and can support
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multiple flash devices at the same time.
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config NVMXIP_QSPI
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This option allows the emulation of a block storage device on top of a QSPI XIP flash.
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Any platform that needs to emulate one or multiple QSPI XIP flash devices can turn this
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option on to enable the functionality. NVMXIP config is selected automatically.
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Platforms that need to add custom treatments before accessing to the flash, can
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write their own driver (same as nvmxip_qspi in addition to the custom settings).
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Device Tree nodes
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--------------------
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Multiple QSPI XIP flash devices can be used at the same time by describing them through DT
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nodes.
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Please refer to the documentation of the DT binding at:
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doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
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Contributors
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------------
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* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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56
doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
Normal file
56
doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
Normal file
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@ -0,0 +1,56 @@
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Specifying NVMXIP information for devices
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======================================
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QSPI XIP flash device nodes
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---------------------------
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Each flash device should have its own node.
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Each node must specify the following fields:
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1)
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compatible = "nvmxip,qspi";
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This allows to bind the flash device with the nvmxip_qspi driver
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If a platform has its own driver, please provide your own compatible
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string.
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2)
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reg = <0x0 0x08000000 0x0 0x00200000>;
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The start address and size of the flash device. The values give here are an
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example (when the cell size is 2).
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When cell size is 1, the reg field looks like this:
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reg = <0x08000000 0x00200000>;
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3)
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lba_shift = <9>;
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The number of bit shifts used to calculate the size in bytes of one block.
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In this example the block size is 1 << 9 = 2 ^ 9 = 512 bytes
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4)
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lba = <4096>;
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The number of blocks.
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Example of multiple flash devices
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----------------------------------------------------
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nvmxip-qspi1@08000000 {
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compatible = "nvmxip,qspi";
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reg = <0x0 0x08000000 0x0 0x00200000>;
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lba_shift = <9>;
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lba = <4096>;
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};
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nvmxip-qspi2@08200000 {
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compatible = "nvmxip,qspi";
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reg = <0x0 0x08200000 0x0 0x00100000>;
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lba_shift = <9>;
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lba = <2048>;
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};
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@ -11,3 +11,9 @@ config NVMXIP
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This option allows the emulation of a block storage device
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on top of a direct access non volatile memory XIP flash devices.
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This support provides the read operation.
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config NVMXIP_QSPI
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bool "QSPI XIP support"
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select NVMXIP
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help
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This option allows the emulation of a block storage device on top of a QSPI XIP flash
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@ -5,3 +5,4 @@
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# Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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obj-y += nvmxip-uclass.o nvmxip.o
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obj-$(CONFIG_NVMXIP_QSPI) += nvmxip_qspi.o
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70
drivers/mtd/nvmxip/nvmxip_qspi.c
Normal file
70
drivers/mtd/nvmxip/nvmxip_qspi.c
Normal file
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@ -0,0 +1,70 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
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*
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* Authors:
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* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdt_support.h>
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#include <linux/errno.h>
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#include "nvmxip.h"
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#include <asm/global_data.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define NVMXIP_QSPI_DRV_NAME "nvmxip_qspi"
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/**
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* nvmxip_qspi_of_to_plat() -read from DT
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* @dev: the NVMXIP device
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*
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* Read from the DT the NVMXIP information.
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*
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* Return:
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*
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* 0 on success. Otherwise, failure
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*/
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static int nvmxip_qspi_of_to_plat(struct udevice *dev)
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{
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struct nvmxip_plat *plat = dev_get_plat(dev);
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int ret;
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plat->phys_base = (phys_addr_t)dev_read_addr(dev);
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if (plat->phys_base == FDT_ADDR_T_NONE) {
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log_err("[%s]: can not get base address from device tree\n", dev->name);
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return -EINVAL;
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}
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ret = dev_read_u32(dev, "lba_shift", &plat->lba_shift);
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if (ret) {
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log_err("[%s]: can not get lba_shift from device tree\n", dev->name);
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return -EINVAL;
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}
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ret = dev_read_u32(dev, "lba", (u32 *)&plat->lba);
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if (ret) {
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log_err("[%s]: can not get lba from device tree\n", dev->name);
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return -EINVAL;
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}
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log_debug("[%s]: XIP device base addr: 0x%llx , lba_shift: %d , lbas: %lu\n",
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dev->name, plat->phys_base, plat->lba_shift, plat->lba);
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return 0;
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}
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static const struct udevice_id nvmxip_qspi_ids[] = {
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{ .compatible = "nvmxip,qspi" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(nvmxip_qspi) = {
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.name = NVMXIP_QSPI_DRV_NAME,
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.id = UCLASS_NVMXIP,
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.of_match = nvmxip_qspi_ids,
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.of_to_plat = nvmxip_qspi_of_to_plat,
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.plat_auto = sizeof(struct nvmxip_plat),
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};
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