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xilinx: Add CONFIG_DM_ETH_PHY config

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Enable CONFIG_DM_ETH_PHY to utilize shared MDIO bus support on all xilinx
platforms.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/965981eb324d13a98aad8bd88eb8b50bc5147a7e.1652181968.git.michal.simek@amd.com
This commit is contained in:
T Karthik Reddy 2022-05-10 13:26:11 +02:00 committed by Michal Simek
parent 8faeb023e9
commit a110caa206
4 changed files with 4 additions and 0 deletions
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1
configs/microblaze-generic_defconfig
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@ -76,6 +76,7 @@ CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
CONFIG_XILINX_AXIEMAC=y
CONFIG_XILINX_EMACLITE=y
CONFIG_SYS_NS16550=y

1
configs/xilinx_versal_virt_defconfig
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@ -92,6 +92,7 @@ CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI_DP83867=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_XILINX_AXIEMAC=y
CONFIG_XILINX_AXIMRMAC=y

1
configs/xilinx_zynq_virt_defconfig
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@ -111,6 +111,7 @@ CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_XILINX=y
CONFIG_DM_ETH_PHY=y
CONFIG_MII=y
CONFIG_ZYNQ_GEM=y
CONFIG_ARM_DCC=y

1
configs/xilinx_zynqmp_virt_defconfig
View File

@ -160,6 +160,7 @@ CONFIG_PHY_TI_DP83867=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_XILINX_GMII2RGMII=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH_PHY=y
CONFIG_XILINX_AXIEMAC=y
CONFIG_ZYNQ_GEM=y
CONFIG_DM_REGULATOR=y