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clk: treewide: switch to clock dump from clk_ops

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Switch to using new dump operation in clock provider drivers instead of
overriding soc_clk_dump.

Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-8-ivprusov@sberdevices.ru
This commit is contained in:
Igor Prusov 2023-11-09 13:55:15 +03:00 committed by Sean Anderson
parent 258c100238
commit bc3e313ff6
11 changed files with 108 additions and 128 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
arch/mips/mach-pic32/cpu.c
View File

@ -143,26 +143,3 @@ const char *get_core_name(void)
return str;
}
#endif
#ifdef CONFIG_CMD_CLK
int soc_clk_dump(void)
{
int i;
printf("PLL Speed: %lu MHz\n",
CLK_MHZ(rate(PLLCLK)));
printf("CPU Speed: %lu MHz\n", CLK_MHZ(rate(PB7CLK)));
printf("MPLL Speed: %lu MHz\n", CLK_MHZ(rate(MPLL)));
for (i = PB1CLK; i <= PB7CLK; i++)
printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1,
CLK_MHZ(rate(i)));
for (i = REF1CLK; i <= REF5CLK; i++)
printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1,
CLK_MHZ(rate(i)));
return 0;
}
#endif

13
drivers/clk/aspeed/clk_ast2600.c
View File

@ -1109,6 +1109,7 @@ struct aspeed_clks {
const char *name;
};
#if IS_ENABLED(CONFIG_CMD_CLK)
static struct aspeed_clks aspeed_clk_names[] = {
{ ASPEED_CLK_HPLL, "hpll" },
{ ASPEED_CLK_MPLL, "mpll" },
@ -1123,18 +1124,12 @@ static struct aspeed_clks aspeed_clk_names[] = {
{ ASPEED_CLK_HUARTX, "huxclk" },
};
int soc_clk_dump(void)
static void ast2600_clk_dump(struct udevice *dev)
{
struct udevice *dev;
struct clk clk;
unsigned long rate;
int i, ret;
ret = uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(aspeed_scu),
&dev);
if (ret)
return ret;
printf("Clk\t\tHz\n");
for (i = 0; i < ARRAY_SIZE(aspeed_clk_names); i++) {
@ -1167,11 +1162,15 @@ int soc_clk_dump(void)
return 0;
}
#endif
struct clk_ops ast2600_clk_ops = {
.get_rate = ast2600_clk_get_rate,
.set_rate = ast2600_clk_set_rate,
.enable = ast2600_clk_enable,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = ast2600_clk_dump,
#endif
};
static int ast2600_clk_probe(struct udevice *dev)

12
drivers/clk/clk_k210.c
View File

@ -1277,16 +1277,10 @@ static void show_clks(struct k210_clk_priv *priv, int id, int depth)
}
}
int soc_clk_dump(void)
static void k210_clk_dump(struct udevice *dev)
{
int ret;
struct udevice *dev;
struct k210_clk_priv *priv;
ret = uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(k210_clk),
&dev);
if (ret)
return ret;
priv = dev_get_priv(dev);
puts(" Rate Enabled Name\n");
@ -1294,7 +1288,6 @@ int soc_clk_dump(void)
printf(" %-9lu %-7c %*s%s\n", clk_get_rate(&priv->in0), 'y', 0, "",
priv->in0.dev->name);
show_clks(priv, K210_CLK_IN0, 1);
return 0;
}
#endif
@ -1305,6 +1298,9 @@ static const struct clk_ops k210_clk_ops = {
.set_parent = k210_clk_set_parent,
.enable = k210_clk_enable,
.disable = k210_clk_disable,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = k210_clk_dump,
#endif
};
static int k210_clk_probe(struct udevice *dev)

37
drivers/clk/clk_pic32.c
View File

@ -20,6 +20,8 @@
DECLARE_GLOBAL_DATA_PTR;
#define CLK_MHZ(x) ((x) / 1000000)
/* Primary oscillator */
#define SYS_POSC_CLK_HZ 24000000
@ -385,9 +387,44 @@ static ulong pic32_set_rate(struct clk *clk, ulong rate)
return rate;
}
#if IS_ENABLED(CONFIG_CMD_CLK)
static void pic32_dump(struct udevice *dev)
{
int i;
struct clk clk;
clk.dev = dev;
clk.id = PLLCLK;
printf("PLL Speed: %lu MHz\n",
CLK_MHZ(pic32_get_rate(&clk)));
clk.id = PB7CLK;
printf("CPU Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate(&clk)));
clk.id = MPLL;
printf("MPLL Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate(&clk)));
for (i = PB1CLK; i <= PB7CLK; i++) {
clk.id = i;
printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1,
CLK_MHZ(pic32_get_rate(&clk)));
}
for (i = REF1CLK; i <= REF5CLK; i++) {
clk.id = i;
printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1,
CLK_MHZ(pic32_get_rate(&clk)));
}
}
#endif
static struct clk_ops pic32_pic32_clk_ops = {
.set_rate = pic32_set_rate,
.get_rate = pic32_get_rate,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = pic32_dump,
#endif
};
static int pic32_clk_probe(struct udevice *dev)

9
drivers/clk/clk_versal.c
View File

@ -555,7 +555,8 @@ static int versal_clock_get_rate(u32 clk_id, u64 *clk_rate)
return 0;
}
int soc_clk_dump(void)
#if IS_ENABLED(CONFIG_CMD_CLK)
static void versal_clk_dump(struct udevice __always_unused *dev)
{
u64 clk_rate = 0;
u32 type, ret, i = 0;
@ -575,9 +576,8 @@ int soc_clk_dump(void)
printf("clk: %s freq:%lld\n",
clock[i].clk_name, clk_rate);
}
return 0;
}
#endif
static void versal_get_clock_info(void)
{
@ -769,6 +769,9 @@ static struct clk_ops versal_clk_ops = {
.set_rate = versal_clk_set_rate,
.get_rate = versal_clk_get_rate,
.enable = versal_clk_enable,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = versal_clk_dump,
#endif
};
static const struct udevice_id versal_clk_ids[] = {

28
drivers/clk/clk_zynq.c
View File

@ -454,6 +454,7 @@ static int dummy_enable(struct clk *clk)
return 0;
}
#if IS_ENABLED(CONFIG_CMD_CLK)
static const char * const clk_names[clk_max] = {
"armpll", "ddrpll", "iopll",
"cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
@ -468,22 +469,10 @@ static const char * const clk_names[clk_max] = {
"smc_aper", "swdt", "dbg_trc", "dbg_apb"
};
/**
* soc_clk_dump() - Print clock frequencies
* Returns zero on success
*
* Implementation for the clk dump command.
*/
int soc_clk_dump(void)
static void zynq_clk_dump(struct udevice *dev)
{
struct udevice *dev;
int i, ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_DRIVER_GET(zynq_clk), &dev);
if (ret)
return ret;
printf("clk\t\tfrequency\n");
for (i = 0; i < clk_max; i++) {
const char *name = clk_names[i];
@ -494,8 +483,11 @@ int soc_clk_dump(void)
clk.id = i;
ret = clk_request(dev, &clk);
if (ret < 0)
return ret;
if (ret < 0) {
printf("%s clk_request() failed: %d\n",
__func__, ret);
break;
}
rate = clk_get_rate(&clk);
@ -508,9 +500,8 @@ int soc_clk_dump(void)
printf("%10s%20lu\n", name, rate);
}
}
return 0;
}
#endif
static struct clk_ops zynq_clk_ops = {
.get_rate = zynq_clk_get_rate,
@ -518,6 +509,9 @@ static struct clk_ops zynq_clk_ops = {
.set_rate = zynq_clk_set_rate,
#endif
.enable = dummy_enable,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = zynq_clk_dump,
#endif
};
static int zynq_clk_probe(struct udevice *dev)

22
drivers/clk/clk_zynqmp.c
View File

@ -735,16 +735,11 @@ static ulong zynqmp_clk_set_rate(struct clk *clk, ulong rate)
}
}
int soc_clk_dump(void)
#if IS_ENABLED(CONFIG_CMD_CLK)
static void zynqmp_clk_dump(struct udevice *dev)
{
struct udevice *dev;
int i, ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_DRIVER_GET(zynqmp_clk), &dev);
if (ret)
return ret;
printf("clk\t\tfrequency\n");
for (i = 0; i < clk_max; i++) {
const char *name = clk_names[i];
@ -754,8 +749,11 @@ int soc_clk_dump(void)
clk.id = i;
ret = clk_request(dev, &clk);
if (ret < 0)
return ret;
if (ret < 0) {
printf("%s clk_request() failed: %d\n",
__func__, ret);
break;
}
rate = clk_get_rate(&clk);
@ -769,9 +767,8 @@ int soc_clk_dump(void)
printf("%10s%20lu\n", name, rate);
}
}
return 0;
}
#endif
static int zynqmp_get_freq_by_name(char *name, struct udevice *dev, ulong *freq)
{
@ -872,6 +869,9 @@ static struct clk_ops zynqmp_clk_ops = {
.set_rate = zynqmp_clk_set_rate,
.get_rate = zynqmp_clk_get_rate,
.enable = zynqmp_clk_enable,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = zynqmp_clk_dump,
#endif
};
static const struct udevice_id zynqmp_clk_ids[] = {

13
drivers/clk/imx/clk-imx8.c
View File

@ -43,18 +43,12 @@ static int imx8_clk_enable(struct clk *clk)
}
#if IS_ENABLED(CONFIG_CMD_CLK)
int soc_clk_dump(void)
static void imx8_clk_dump(struct udevice *dev)
{
struct udevice *dev;
struct clk clk;
unsigned long rate;
int i, ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_DRIVER_GET(imx8_clk), &dev);
if (ret)
return ret;
printf("Clk\t\tHz\n");
for (i = 0; i < num_clks; i++) {
@ -84,8 +78,6 @@ int soc_clk_dump(void)
printf("%s(%3lu):\t%lu\n",
imx8_clk_names[i].name, imx8_clk_names[i].id, rate);
}
return 0;
}
#endif
@ -94,6 +86,9 @@ static struct clk_ops imx8_clk_ops = {
.get_rate = imx8_clk_get_rate,
.enable = imx8_clk_enable,
.disable = imx8_clk_disable,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = imx8_clk_dump,
#endif
};
static int imx8_clk_probe(struct udevice *dev)

28
drivers/clk/meson/a1.c
View File

@ -636,6 +636,7 @@ static const struct udevice_id meson_clk_ids[] = {
{ }
};
#if IS_ENABLED(CONFIG_CMD_CLK)
static const char *meson_clk_get_name(struct clk *clk, int id)
{
const struct meson_clk_info *info;
@ -645,7 +646,7 @@ static const char *meson_clk_get_name(struct clk *clk, int id)
return IS_ERR(info) ? "unknown" : info->name;
}
static int meson_clk_dump(struct clk *clk)
static int meson_clk_dump_single(struct clk *clk)
{
const struct meson_clk_info *info;
struct meson_clk *priv;
@ -680,7 +681,7 @@ static int meson_clk_dump(struct clk *clk)
return 0;
}
static int meson_clk_dump_dev(struct udevice *dev)
static void meson_clk_dump(struct udevice *dev)
{
int i;
struct meson_clk_data *data;
@ -693,29 +694,13 @@ static int meson_clk_dump_dev(struct udevice *dev)
data = (struct meson_clk_data *)dev_get_driver_data(dev);
for (i = 0; i < data->num_clocks; i++) {
meson_clk_dump(&(struct clk){
meson_clk_dump_single(&(struct clk){
.dev = dev,
.id = i
});
}
return 0;
}
int soc_clk_dump(void)
{
struct udevice *dev;
int i = 0;
while (!uclass_get_device(UCLASS_CLK, i++, &dev)) {
if (dev->driver == DM_DRIVER_GET(meson_clk)) {
meson_clk_dump_dev(dev);
printf("\n");
}
}
return 0;
}
#endif
static struct clk_ops meson_clk_ops = {
.disable = meson_clk_disable,
@ -723,6 +708,9 @@ static struct clk_ops meson_clk_ops = {
.get_rate = meson_clk_get_rate,
.set_rate = meson_clk_set_rate,
.set_parent = meson_clk_set_parent,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = meson_clk_dump,
#endif
};
U_BOOT_DRIVER(meson_clk) = {

20
drivers/clk/mvebu/armada-37xx-periph.c
View File

@ -488,33 +488,36 @@ static int armada_37xx_periph_clk_dump(struct udevice *dev)
static int clk_dump(const char *name, int (*func)(struct udevice *))
{
struct udevice *dev;
int ret;
if (uclass_get_device_by_name(UCLASS_CLK, name, &dev)) {
printf("Cannot find device %s\n", name);
return -ENODEV;
}
return func(dev);
ret = func(dev);
if (ret)
printf("Dump failed for %s: %d\n", name, ret);
return ret;
}
int armada_37xx_tbg_clk_dump(struct udevice *);
int soc_clk_dump(void)
static void armada37xx_clk_dump(struct udevice __always_unused *dev)
{
printf(" xtal at %u000000 Hz\n\n", get_ref_clk());
if (clk_dump("tbg@13200", armada_37xx_tbg_clk_dump))
return 1;
return;
if (clk_dump("nb-periph-clk@13000",
armada_37xx_periph_clk_dump))
return 1;
return;
if (clk_dump("sb-periph-clk@18000",
armada_37xx_periph_clk_dump))
return 1;
return 0;
return;
}
#endif
@ -605,6 +608,9 @@ static const struct clk_ops armada_37xx_periph_clk_ops = {
.set_parent = armada_37xx_periph_clk_set_parent,
.enable = armada_37xx_periph_clk_enable,
.disable = armada_37xx_periph_clk_disable,
#if IS_ENABLED(CONFIG_CMD_CLK)
.dump = armada37xx_clk_dump,
#endif
};
static const struct udevice_id armada_37xx_periph_clk_ids[] = {

31
drivers/clk/stm32/clk-stm32mp1.c
View File

@ -2225,10 +2225,13 @@ static void stm32mp1_osc_init(struct udevice *dev)
}
}
static void __maybe_unused stm32mp1_clk_dump(struct stm32mp1_clk_priv *priv)
static void __maybe_unused stm32mp1_clk_dump(struct udevice *dev)
{
char buf[32];
int i, s, p;
struct stm32mp1_clk_priv *priv;
priv = dev_get_priv(dev);
printf("Clocks:\n");
for (i = 0; i < _PARENT_NB; i++) {
@ -2252,27 +2255,6 @@ static void __maybe_unused stm32mp1_clk_dump(struct stm32mp1_clk_priv *priv)
}
}
#ifdef CONFIG_CMD_CLK
int soc_clk_dump(void)
{
struct udevice *dev;
struct stm32mp1_clk_priv *priv;
int ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_DRIVER_GET(stm32mp1_clock),
&dev);
if (ret)
return ret;
priv = dev_get_priv(dev);
stm32mp1_clk_dump(priv);
return 0;
}
#endif
static int stm32mp1_clk_probe(struct udevice *dev)
{
int result = 0;
@ -2302,7 +2284,7 @@ static int stm32mp1_clk_probe(struct udevice *dev)
#if defined(VERBOSE_DEBUG)
/* display debug information for probe after relocation */
if (gd->flags & GD_FLG_RELOC)
stm32mp1_clk_dump(priv);
stm32mp1_clk_dump(dev);
#endif
gd->cpu_clk = stm32mp1_clk_get(priv, _CK_MPU);
@ -2333,6 +2315,9 @@ static const struct clk_ops stm32mp1_clk_ops = {
.disable = stm32mp1_clk_disable,
.get_rate = stm32mp1_clk_get_rate,
.set_rate = stm32mp1_clk_set_rate,
#if IS_ENABLED(CONFIG_CMD_CLK) && !IS_ENABLED(CONFIG_SPL_BUILD)
.dump = stm32mp1_clk_dump,
#endif
};
U_BOOT_DRIVER(stm32mp1_clock) = {