Embedded_Projects/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

treewide: Remove clk_free

Browse Source 
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
This commit is contained in:
Sean Anderson 2023-12-16 14:38:42 -05:00
parent 82719d3f40
commit c9309f40a6
95 changed files with 71 additions and 430 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-rockchip/rk3288/rk3288.c
View File

@ -184,8 +184,6 @@ static int do_clock(struct cmd_tbl *cmdtp, int flag, int argc,
rate = clk_get_rate(&clk);
printf("%s: %lu\n", clks[i].name, rate);
clk_free(&clk);
}
return 0;

2
arch/arm/mach-socfpga/clock_manager_agilex.c
View File

@ -37,8 +37,6 @@ static ulong cm_get_rate_dm(u32 id)
rate = clk_get_rate(&clk);
clk_free(&clk);
if ((rate == (unsigned long)-ENOSYS) ||
(rate == (unsigned long)-ENXIO) ||
(rate == (unsigned long)-EIO)) {

7
arch/arm/mach-socfpga/clock_manager_arria10.c
View File

@ -962,7 +962,6 @@ static u32 cm_get_rate_dm(char *name)
struct uclass *uc;
struct udevice *dev = NULL;
struct clk clk = { 0 };
ulong rate;
int ret;
/* Device addresses start at 1 */
@ -982,11 +981,7 @@ static u32 cm_get_rate_dm(char *name)
if (ret)
return 0;
rate = clk_get_rate(&clk);
clk_free(&clk);
return rate;
return clk_get_rate(&clk);
}
static u32 cm_get_rate_dm_khz(char *name)

2
arch/arm/mach-socfpga/clock_manager_n5x.c
View File

@ -36,8 +36,6 @@ static ulong cm_get_rate_dm(u32 id)
rate = clk_get_rate(&clk);
clk_free(&clk);
if ((rate == (unsigned long)-ENXIO) ||
(rate == (unsigned long)-EIO)) {
debug("%s id %u: clk_get_rate err: %ld\n",

2
arch/arm/mach-zynq/clk.c
View File

@ -44,8 +44,6 @@ int set_cpu_clk_info(void)
gd->bd->bi_arm_freq = rate;
gd->cpu_clk = clk_get_rate(&clk);
}
clk_free(&clk);
}
gd->bd->bi_dsp_freq = 0;

7
arch/mips/mach-pic32/cpu.c
View File

@ -30,7 +30,6 @@ static ulong rate(int id)
int ret;
struct udevice *dev;
struct clk clk;
ulong rate;
ret = uclass_get_device(UCLASS_CLK, 0, &dev);
if (ret) {
@ -43,11 +42,7 @@ static ulong rate(int id)
if (ret < 0)
return ret;
rate = clk_get_rate(&clk);
clk_free(&clk);
return rate;
return clk_get_rate(&clk);
}
static ulong clk_get_cpu_rate(void)

2
board/microchip/pic32mzda/pic32mzda.c
View File

@ -36,8 +36,6 @@ int checkboard(void)
rate = clk_get_rate(&clk);
printf("CPU Speed: %lu MHz\n", rate / 1000000);
clk_free(&clk);
return 0;
}
#endif

1
board/sipeed/maix/maix.c
View File

@ -32,7 +32,6 @@ static int sram_init(void)
continue;
ret = clk_enable(&clk);
clk_free(&clk);
if (ret)
return ret;
}

2
board/synopsys/hsdk/clk-lib.c
View File

@ -56,8 +56,6 @@ int soc_clk_ctl(const char *name, ulong *rate, enum clk_ctl_ops ctl)
priv_rate = clk_get_rate(&clk);
clk_free(&clk);
mhz_rate = ceil(priv_rate, HZ_IN_MHZ);
if (ctl & CLK_MHZ)

2
drivers/clk/aspeed/clk_ast2600.c
View File

@ -1143,8 +1143,6 @@ static void ast2600_clk_dump(struct udevice *dev)
ret = clk_get_rate(&clk);
rate = ret;
clk_free(&clk);
if (ret == -EINVAL) {
printf("clk ID %lu not supported yet\n",
aspeed_clk_names[i].id);

14
drivers/clk/at91/compat.c
View File

@ -516,7 +516,6 @@ static ulong periph_get_rate(struct clk *clk)
{
struct udevice *dev;
struct clk clk_dev;
ulong clk_rate;
int ret;
dev = dev_get_parent(clk->dev);
@ -525,11 +524,7 @@ static ulong periph_get_rate(struct clk *clk)
if (ret)
return ret;
clk_rate = clk_get_rate(&clk_dev);
clk_free(&clk_dev);
return clk_rate;
return clk_get_rate(&clk_dev);
}
static struct clk_ops periph_clk_ops = {
@ -762,7 +757,6 @@ static ulong generic_clk_get_rate(struct clk *clk)
struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk parent;
ulong clk_rate;
u32 tmp, gckdiv;
u8 clock_source, parent_index;
int ret;
@ -778,11 +772,7 @@ static ulong generic_clk_get_rate(struct clk *clk)
if (ret)
return 0;
clk_rate = clk_get_rate(&parent) / (gckdiv + 1);
clk_free(&parent);
return clk_rate;
return clk_get_rate(&parent) / (gckdiv + 1);
}
static ulong generic_clk_set_rate(struct clk *clk, ulong rate)

26
drivers/clk/clk-uclass.c
View File

@ -437,8 +437,6 @@ int clk_release_all(struct clk *clk, unsigned int count)
ret = clk_disable(&clk[i]);
if (ret && ret != -ENOSYS)
return ret;
clk_free(&clk[i]);
}
return 0;
@ -772,22 +770,12 @@ bool clk_is_match(const struct clk *p, const struct clk *q)
return false;
}
static void devm_clk_release(struct udevice *dev, void *res)
{
clk_free(res);
}
static int devm_clk_match(struct udevice *dev, void *res, void *data)
{
return res == data;
}
struct clk *devm_clk_get(struct udevice *dev, const char *id)
{
int rc;
struct clk *clk;
clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
if (unlikely(!clk))
return ERR_PTR(-ENOMEM);
@ -795,21 +783,9 @@ struct clk *devm_clk_get(struct udevice *dev, const char *id)
if (rc)
return ERR_PTR(rc);
devres_add(dev, clk);
return clk;
}
void devm_clk_put(struct udevice *dev, struct clk *clk)
{
int rc;
if (!clk)
return;
rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
WARN_ON(rc);
}
int clk_uclass_post_probe(struct udevice *dev)
{
/*

1
drivers/clk/clk-xlnx-clock-wizard.c
View File

@ -137,7 +137,6 @@ static int clk_wzrd_probe(struct udevice *dev)
ret = clk_enable(&clk_in1);
if (ret) {
dev_err(dev, "failed to enable clock\n");
clk_free(&clk_in1);
return ret;
}

12
drivers/clk/clk_versaclock.c
View File

@ -1000,26 +1000,18 @@ int versaclock_probe(struct udevice *dev)
return 0;
free_out:
for (n = 1; n < vc5->chip_info->clk_out_cnt; n++) {
clk_free(&vc5->clk_out[n].hw);
for (n = 1; n < vc5->chip_info->clk_out_cnt; n++)
free(out_name[n]);
}
free_selb:
clk_free(&vc5->clk_out[0].hw);
free(outsel_name);
free_fod:
for (n = 0; n < vc5->chip_info->clk_fod_cnt; n++) {
clk_free(&vc5->clk_fod[n].hw);
for (n = 0; n < vc5->chip_info->clk_fod_cnt; n++)
free(fod_name[n]);
}
free_pll:
clk_free(&vc5->clk_pll.hw);
free(pll_name);
free_pfd:
clk_free(&vc5->clk_pfd);
free(pfd_name);
free_mux:
clk_free(&vc5->clk_mux);
free(mux_name);
return ret;

2
drivers/clk/clk_zynq.c
View File

@ -491,8 +491,6 @@ static void zynq_clk_dump(struct udevice *dev)
rate = clk_get_rate(&clk);
clk_free(&clk);
if ((rate == (unsigned long)-ENOSYS) ||
(rate == (unsigned long)-ENXIO))
printf("%10s%20s\n", name, "unknown");

2
drivers/clk/clk_zynqmp.c
View File

@ -757,8 +757,6 @@ static void zynqmp_clk_dump(struct udevice *dev)
rate = clk_get_rate(&clk);
clk_free(&clk);
if ((rate == (unsigned long)-ENOSYS) ||
(rate == (unsigned long)-ENXIO) ||
(rate == (unsigned long)-EIO))

2
drivers/clk/imx/clk-imx8.c
View File

@ -62,8 +62,6 @@ static void imx8_clk_dump(struct udevice *dev)
ret = clk_get_rate(&clk);
rate = ret;
clk_free(&clk);
if (ret == -EINVAL) {
printf("clk ID %lu not supported yet\n",
imx8_clk_names[i].id);

2
drivers/clk/mvebu/armada-37xx-periph.c
View File

@ -454,7 +454,6 @@ static int armada_37xx_periph_clk_set_parent(struct clk *clk,
if (parent->dev != check_parent.dev)
ret = -EINVAL;
clk_free(&check_parent);
if (ret < 0)
return ret;
@ -596,7 +595,6 @@ static int armada_37xx_periph_clk_probe(struct udevice *dev)
}
priv->parents[i] = clk_get_rate(&clk);
clk_free(&clk);
}
return 0;

2
drivers/cpu/riscv_cpu.c
View File

@ -45,7 +45,6 @@ static int riscv_cpu_get_info(const struct udevice *dev, struct cpu_info *info)
ret = clk_get_rate(&clk);
if (!IS_ERR_VALUE(ret))
info->cpu_freq = ret;
clk_free(&clk);
}
if (!info->cpu_freq)
@ -145,7 +144,6 @@ static int riscv_cpu_probe(struct udevice *dev)
return 0;
ret = clk_enable(&clk);
clk_free(&clk);
if (ret == -ENOSYS || ret == -ENOTSUPP)
return 0;
else

2
drivers/dma/bcm6348-iudma.c
View File

@ -596,8 +596,6 @@ static int bcm6348_iudma_probe(struct udevice *dev)
pr_err("error enabling clock %d\n", i);
return ret;
}
clk_free(&clk);
}
/* try to perform resets */

2
drivers/gpio/at91_gpio.c
View File

@ -603,8 +603,6 @@ static int at91_gpio_probe(struct udevice *dev)
if (ret)
return ret;
clk_free(&clk);
#if CONFIG_IS_ENABLED(OF_CONTROL)
plat->base_addr = dev_read_addr(dev);
#endif

2
drivers/gpio/atmel_pio4.c
View File

@ -310,8 +310,6 @@ static int atmel_pio4_probe(struct udevice *dev)
if (ret)
return ret;
clk_free(&clk);
addr_base = dev_read_addr(dev);
if (addr_base == FDT_ADDR_T_NONE)
return -EINVAL;

1
drivers/gpio/gpio-rcar.c
View File

@ -165,7 +165,6 @@ static int rcar_gpio_probe(struct udevice *dev)
}
ret = clk_enable(&clk);
clk_free(&clk);
if (ret) {
dev_err(dev, "Failed to enable GPIO bank clock\n");
return ret;

6
drivers/hwspinlock/stm32_hwspinlock.c
View File

@ -69,11 +69,7 @@ static int stm32mp1_hwspinlock_probe(struct udevice *dev)
if (ret)
return ret;
ret = clk_enable(&clk);
if (ret)
clk_free(&clk);
return ret;
return clk_enable(&clk);
}
static const struct hwspinlock_ops stm32mp1_hwspinlock_ops = {

2
drivers/i2c/at91_i2c.c
View File

@ -201,8 +201,6 @@ static int at91_i2c_enable_clk(struct udevice *dev)
bus->bus_clk_rate = clk_rate;
clk_free(&clk);
return 0;
}

2
drivers/i2c/designware_i2c.c
View File

@ -770,7 +770,6 @@ int designware_i2c_of_to_plat(struct udevice *bus)
ret = clk_enable(&priv->clk);
if (ret && ret != -ENOSYS && ret != -ENOTSUPP) {
clk_free(&priv->clk);
dev_err(bus, "failed to enable clock\n");
return ret;
}
@ -803,7 +802,6 @@ int designware_i2c_remove(struct udevice *dev)
#if CONFIG_IS_ENABLED(CLK)
clk_disable(&priv->clk);
clk_free(&priv->clk);
#endif
return reset_release_bulk(&priv->resets);

2
drivers/i2c/i2c-microchip.c
View File

@ -183,8 +183,6 @@ static int mpfs_i2c_init(struct mpfs_i2c_bus *bus, struct udevice *dev)
if (!clk_rate)
return -EINVAL;
clk_free(&bus->i2c_clk);
divisor = clk_rate / bus->clk_rate;
ctrl = readl(bus->base + MPFS_I2C_CTRL);

1
drivers/i2c/npcm_i2c.c
View File

@ -570,7 +570,6 @@ static int npcm_i2c_probe(struct udevice *dev)
printf("%s: fail to get rate\n", __func__);
return -EINVAL;
}
clk_free(&clk);
bus->num = dev->seq_;
bus->reg = dev_read_addr_ptr(dev);

2
drivers/i2c/ocores_i2c.c
View File

@ -396,8 +396,6 @@ static int ocores_i2c_enable_clk(struct udevice *dev)
bus->ip_clk_khz = clk_rate / 1000;
clk_free(&bus->clk);
return 0;
}

4
drivers/i2c/stm32f7_i2c.c
View File

@ -890,7 +890,7 @@ static int stm32_i2c_probe(struct udevice *dev)
ret = clk_enable(&i2c_priv->clk);
if (ret)
goto clk_free;
return ret;
ret = reset_get_by_index(dev, 0, &reset_ctl);
if (ret)
@ -904,8 +904,6 @@ static int stm32_i2c_probe(struct udevice *dev)
clk_disable:
clk_disable(&i2c_priv->clk);
clk_free:
clk_free(&i2c_priv->clk);
return ret;
}

7
drivers/mailbox/stm32-ipcc.c
View File

@ -134,18 +134,13 @@ static int stm32_ipcc_probe(struct udevice *dev)
ret = clk_enable(&clk);
if (ret)
goto clk_free;
return ret;
/* get channel number */
ipcc->n_chans = readl(ipcc->reg_base + IPCC_HWCFGR);
ipcc->n_chans &= IPCFGR_CHAN_MASK;
return 0;
clk_free:
clk_free(&clk);
return ret;
}
static const struct udevice_id stm32_ipcc_ids[] = {

1
drivers/misc/ls2_sfp.c
View File

@ -249,7 +249,6 @@ static int ls2_sfp_probe(struct udevice *dev)
}
rate = clk_get_rate(&clk);
clk_free(&clk);
if (!rate || IS_ERR_VALUE(rate)) {
ret = rate ? rate : -ENOENT;
dev_dbg(dev, "could not get clock rate (err %d)\n",

1
drivers/mmc/arm_pl180_mmci.c
View File

@ -447,7 +447,6 @@ static int arm_pl180_mmc_probe(struct udevice *dev)
ret = clk_enable(&clk);
if (ret) {
clk_free(&clk);
dev_err(dev, "failed to enable clock\n");
return ret;
}

4
drivers/mmc/aspeed_sdhci.c
View File

@ -35,7 +35,7 @@ static int aspeed_sdhci_probe(struct udevice *dev)
ret = clk_enable(&clk);
if (ret) {
debug("%s: clock enable failed %d\n", __func__, ret);
goto free;
return ret;
}
host->name = dev->name;
@ -66,8 +66,6 @@ static int aspeed_sdhci_probe(struct udevice *dev)
err:
clk_disable(&clk);
free:
clk_free(&clk);
return ret;
}

2
drivers/mmc/atmel_sdhci.c
View File

@ -147,8 +147,6 @@ static int atmel_sdhci_probe(struct udevice *dev)
host->ops = &atmel_sdhci_ops;
upriv->mmc = host->mmc;
clk_free(&clk);
ret = sdhci_probe(dev);
if (ret)
return ret;

19
drivers/mmc/gen_atmel_mci.c
View File

@ -559,27 +559,20 @@ static int atmel_mci_enable_clk(struct udevice *dev)
int ret = 0;
ret = clk_get_by_index(dev, 0, &clk);
if (ret) {
ret = -EINVAL;
goto failed;
}
if (ret)
return -EINVAL;
ret = clk_enable(&clk);
if (ret)
goto failed;
return ret;
clk_rate = clk_get_rate(&clk);
if (!clk_rate) {
ret = -EINVAL;
goto failed;
}
if (!clk_rate)
return -EINVAL;
priv->bus_clk_rate = clk_rate;
failed:
clk_free(&clk);
return ret;
return 0;
}
static int atmel_mci_probe(struct udevice *dev)

1
drivers/mmc/msm_sdhci.c
View File

@ -81,7 +81,6 @@ static int msm_sdc_clk_init(struct udevice *dev)
return ret;
ret = clk_set_rate(&clk, clk_rate);
clk_free(&clk);
if (ret < 0)
return ret;

1
drivers/mmc/pic32_sdhci.c
View File

@ -32,7 +32,6 @@ static int pic32_sdhci_probe(struct udevice *dev)
return ret;
clk_rate = clk_get_rate(&clk);
clk_free(&clk);
if (IS_ERR_VALUE(clk_rate))
return clk_rate;

21
drivers/mmc/renesas-sdhi.c
View File

@ -979,19 +979,19 @@ static int rzg2l_sdhi_setup(struct udevice *dev)
ret = clk_get_by_name(dev, "cd", &imclk2);
if (ret < 0) {
dev_err(dev, "failed to get imclk2 (chip detect clk)\n");
goto err_get_imclk2;
return ret;
}
ret = clk_get_by_name(dev, "aclk", &aclk);
if (ret < 0) {
dev_err(dev, "failed to get aclk\n");
goto err_get_aclk;
return ret;
}
ret = clk_enable(&imclk2);
if (ret < 0) {
dev_err(dev, "failed to enable imclk2 (chip detect clk)\n");
goto err_imclk2;
return ret;
}
ret = clk_enable(&aclk);
@ -1026,11 +1026,6 @@ err_get_reset:
clk_disable(&aclk);
err_aclk:
clk_disable(&imclk2);
err_imclk2:
clk_free(&aclk);
err_get_aclk:
clk_free(&imclk2);
err_get_imclk2:
return ret;
}
@ -1071,7 +1066,7 @@ static int renesas_sdhi_probe(struct udevice *dev)
ret = clk_set_rate(&priv->clkh, 800000000);
if (ret < 0) {
dev_err(dev, "failed to set rate for SDnH clock (%d)\n", ret);
goto err_clk;
return ret;
}
}
@ -1079,13 +1074,13 @@ static int renesas_sdhi_probe(struct udevice *dev)
ret = clk_set_rate(&priv->clk, 200000000);
if (ret < 0) {
dev_err(dev, "failed to set rate for SDn clock (%d)\n", ret);
goto err_clkh;
return ret;
}
ret = clk_enable(&priv->clk);
if (ret) {
dev_err(dev, "failed to enable SDn clock (%d)\n", ret);
goto err_clkh;
return ret;
}
if (device_is_compatible(dev, "renesas,sdhi-r9a07g044"))
@ -1107,10 +1102,6 @@ static int renesas_sdhi_probe(struct udevice *dev)
err_tmio_probe:
clk_disable(&priv->clk);
err_clkh:
clk_free(&priv->clkh);
err_clk:
clk_free(&priv->clk);
return ret;
}

8
drivers/mmc/snps_dw_mmc.c
View File

@ -46,7 +46,7 @@ static int snps_dwmmc_clk_setup(struct udevice *dev)
ret = clk_enable(&clk_ciu);
if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
goto clk_err_ciu;
goto clk_err;
host->bus_hz = clk_get_rate(&clk_ciu);
if (host->bus_hz < CLOCK_MIN) {
@ -60,16 +60,12 @@ static int snps_dwmmc_clk_setup(struct udevice *dev)
ret = clk_enable(&clk_biu);
if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
goto clk_err_biu;
goto clk_err_ciu_dis;
return 0;
clk_err_biu:
clk_free(&clk_biu);
clk_err_ciu_dis:
clk_disable(&clk_ciu);
clk_err_ciu:
clk_free(&clk_ciu);
clk_err:
dev_err(dev, "failed to setup clocks, ret %d\n", ret);

1
drivers/mmc/socfpga_dw_mmc.c
View File

@ -99,7 +99,6 @@ static int socfpga_dwmmc_get_clk_rate(struct udevice *dev)
host->bus_hz = clk_get_rate(&clk);
clk_free(&clk);
#else
/* Fixed clock divide by 4 which due to the SDMMC wrapper */
host->bus_hz = cm_get_mmc_controller_clk_hz();

4
drivers/mmc/stm32_sdmmc2.c
View File

@ -766,10 +766,8 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
int ret;
ret = clk_enable(&plat->clk);
if (ret) {
clk_free(&plat->clk);
if (ret)
return ret;
}
upriv->mmc = &plat->mmc;

1
drivers/mmc/uniphier-sd.c
View File

@ -64,7 +64,6 @@ static int uniphier_sd_probe(struct udevice *dev)
ret = clk_set_rate(&priv->clk, ULONG_MAX);
if (ret < 0) {
dev_err(dev, "failed to set rate for host clock\n");
clk_free(&priv->clk);
return ret;
}

4
drivers/mtd/nand/raw/atmel/nand-controller.c
View File

@ -1999,10 +1999,8 @@ atmel_hsmc_nand_controller_remove(struct atmel_nand_controller *nc)
hsmc_nc = container_of(nc, struct atmel_hsmc_nand_controller, base);
if (hsmc_nc->clk) {
if (hsmc_nc->clk)
clk_disable_unprepare(hsmc_nc->clk);
devm_clk_put(nc->dev, hsmc_nc->clk);
}
return 0;
}

1
drivers/mtd/renesas_rpc_hf.c
View File

@ -370,7 +370,6 @@ static int rpc_hf_probe(struct udevice *dev)
}
ret = clk_enable(&clk);
clk_free(&clk);
if (ret) {
dev_err(dev, "Failed to enable RPC clock\n");
return ret;

2
drivers/net/bcm6348-eth.c
View File

@ -457,8 +457,6 @@ static int bcm6348_eth_probe(struct udevice *dev)
pr_err("%s: error enabling clock %d\n", __func__, i);
return ret;
}
clk_free(&clk);
}
/* try to perform resets */

2
drivers/net/bcm6368-eth.c
View File

@ -546,8 +546,6 @@ static int bcm6368_eth_probe(struct udevice *dev)
pr_err("%s: error enabling clock %d\n", __func__, i);
return ret;
}
clk_free(&clk);
}
/* try to perform resets */

1
drivers/net/designware.c
View File

@ -702,7 +702,6 @@ int designware_eth_probe(struct udevice *dev)
err = clk_enable(&priv->clocks[i]);
if (err && err != -ENOSYS && err != -ENOTSUPP) {
pr_err("failed to enable clock %d\n", i);
clk_free(&priv->clocks[i]);
goto clk_err;
}
priv->clock_count++;

43
drivers/net/dwc_eth_qos.c
View File

@ -1382,38 +1382,30 @@ static int eqos_probe_resources_tegra186(struct udevice *dev)
ret = clk_get_by_name(dev, "master_bus", &eqos->clk_master_bus);
if (ret) {
pr_err("clk_get_by_name(master_bus) failed: %d", ret);
goto err_free_clk_slave_bus;
goto err_free_gpio_phy_reset;
}
ret = clk_get_by_name(dev, "rx", &eqos->clk_rx);
if (ret) {
pr_err("clk_get_by_name(rx) failed: %d", ret);
goto err_free_clk_master_bus;
goto err_free_gpio_phy_reset;
}
ret = clk_get_by_name(dev, "ptp_ref", &eqos->clk_ptp_ref);
if (ret) {
pr_err("clk_get_by_name(ptp_ref) failed: %d", ret);
goto err_free_clk_rx;
goto err_free_gpio_phy_reset;
}
ret = clk_get_by_name(dev, "tx", &eqos->clk_tx);
if (ret) {
pr_err("clk_get_by_name(tx) failed: %d", ret);
goto err_free_clk_ptp_ref;
goto err_free_gpio_phy_reset;
}
debug("%s: OK\n", __func__);
return 0;
err_free_clk_ptp_ref:
clk_free(&eqos->clk_ptp_ref);
err_free_clk_rx:
clk_free(&eqos->clk_rx);
err_free_clk_master_bus:
clk_free(&eqos->clk_master_bus);
err_free_clk_slave_bus:
clk_free(&eqos->clk_slave_bus);
err_free_gpio_phy_reset:
dm_gpio_free(dev, &eqos->phy_reset_gpio);
err_free_reset_eqos:
@ -1451,13 +1443,13 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx);
if (ret) {
pr_err("clk_get_by_name(rx) failed: %d", ret);
goto err_free_clk_master_bus;
goto err_probe;
}
ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx);
if (ret) {
pr_err("clk_get_by_name(tx) failed: %d", ret);
goto err_free_clk_rx;
goto err_probe;
}
/* Get ETH_CLK clocks (optional) */
@ -1468,10 +1460,6 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
debug("%s: OK\n", __func__);
return 0;
err_free_clk_rx:
clk_free(&eqos->clk_rx);
err_free_clk_master_bus:
clk_free(&eqos->clk_master_bus);
err_probe:
debug("%s: returns %d\n", __func__, ret);
@ -1489,13 +1477,6 @@ static int eqos_remove_resources_tegra186(struct udevice *dev)
debug("%s(dev=%p):\n", __func__, dev);
#ifdef CONFIG_CLK
clk_free(&eqos->clk_tx);
clk_free(&eqos->clk_ptp_ref);
clk_free(&eqos->clk_rx);
clk_free(&eqos->clk_slave_bus);
clk_free(&eqos->clk_master_bus);
#endif
dm_gpio_free(dev, &eqos->phy_reset_gpio);
reset_free(&eqos->reset_ctl);
@ -1505,19 +1486,7 @@ static int eqos_remove_resources_tegra186(struct udevice *dev)
static int eqos_remove_resources_stm32(struct udevice *dev)
{
struct eqos_priv * __maybe_unused eqos = dev_get_priv(dev);
debug("%s(dev=%p):\n", __func__, dev);
#ifdef CONFIG_CLK
clk_free(&eqos->clk_tx);
clk_free(&eqos->clk_rx);
clk_free(&eqos->clk_master_bus);
if (clk_valid(&eqos->clk_ck))
clk_free(&eqos->clk_ck);
#endif
debug("%s: OK\n", __func__);
return 0;
}

21
drivers/net/dwc_eth_qos_imx.c
View File

@ -70,30 +70,24 @@ static int eqos_probe_resources_imx(struct udevice *dev)
ret = clk_get_by_name(dev, "ptp_ref", &eqos->clk_ptp_ref);
if (ret) {
dev_dbg(dev, "clk_get_by_name(ptp_ref) failed: %d", ret);
goto err_free_clk_master_bus;
goto err_probe;
}
ret = clk_get_by_name(dev, "tx", &eqos->clk_tx);
if (ret) {
dev_dbg(dev, "clk_get_by_name(tx) failed: %d", ret);
goto err_free_clk_ptp_ref;
goto err_probe;
}
ret = clk_get_by_name(dev, "pclk", &eqos->clk_ck);
if (ret) {
dev_dbg(dev, "clk_get_by_name(pclk) failed: %d", ret);
goto err_free_clk_tx;
goto err_probe;
}
debug("%s: OK\n", __func__);
return 0;
err_free_clk_tx:
clk_free(&eqos->clk_tx);
err_free_clk_ptp_ref:
clk_free(&eqos->clk_ptp_ref);
err_free_clk_master_bus:
clk_free(&eqos->clk_master_bus);
err_probe:
debug("%s: returns %d\n", __func__, ret);
@ -102,16 +96,7 @@ err_probe:
static int eqos_remove_resources_imx(struct udevice *dev)
{
struct eqos_priv *eqos = dev_get_priv(dev);
debug("%s(dev=%p):\n", __func__, dev);
clk_free(&eqos->clk_ck);
clk_free(&eqos->clk_tx);
clk_free(&eqos->clk_ptp_ref);
clk_free(&eqos->clk_master_bus);
debug("%s: OK\n", __func__);
return 0;
}

1
drivers/net/dwc_eth_qos_qcom.c
View File

@ -575,7 +575,6 @@ static int eqos_remove_resources_qcom(struct udevice *dev)
debug("%s(dev=%p):\n", __func__, dev);
clk_free(&eqos->clk_tx);
dm_gpio_free(dev, &eqos->phy_reset_gpio);
reset_free(&eqos->reset_ctl);

6
drivers/net/dwc_eth_qos_rockchip.c
View File

@ -372,7 +372,7 @@ static int eqos_probe_resources_rk(struct udevice *dev)
ret = clk_get_by_name(dev, "clk_mac_speed", &eqos->clk_tx);
if (ret) {
dev_dbg(dev, "clk_get_by_name(clk_mac_speed) failed: %d", ret);
goto err_free_clk_master_bus;
goto err_release_resets;
}
}
@ -393,8 +393,6 @@ static int eqos_probe_resources_rk(struct udevice *dev)
return 0;
err_free_clk_master_bus:
clk_free(&eqos->clk_master_bus);
err_release_resets:
reset_release_bulk(&data->resets);
err_free:
@ -412,8 +410,6 @@ static int eqos_remove_resources_rk(struct udevice *dev)
if (dm_gpio_is_valid(&eqos->phy_reset_gpio))
dm_gpio_free(dev, &eqos->phy_reset_gpio);
clk_free(&eqos->clk_tx);
clk_free(&eqos->clk_master_bus);
reset_release_bulk(&data->resets);
free(data);

5
drivers/net/sni_ave.c
View File

@ -777,7 +777,7 @@ static int ave_of_to_plat(struct udevice *dev)
if (ret) {
dev_err(dev, "Failed to get clocks property: %d\n",
ret);
goto out_clk_free;
return ret;
}
priv->nclks++;
}
@ -823,9 +823,6 @@ static int ave_of_to_plat(struct udevice *dev)
out_reset_free:
while (--nr >= 0)
reset_free(&priv->rst[nr]);
out_clk_free:
while (--nc >= 0)
clk_free(&priv->clk[nc]);
return ret;
}

1
drivers/net/ti/am65-cpsw-nuss.c
View File

@ -948,7 +948,6 @@ static int am65_cpsw_probe_nuss(struct udevice *dev)
cpsw_common->bus_freq);
out:
clk_free(&cpsw_common->fclk);
power_domain_free(&cpsw_common->pwrdmn);
return ret;
}

2
drivers/phy/bcm6318-usbh-phy.c
View File

@ -98,8 +98,6 @@ static int bcm6318_usbh_probe(struct udevice *dev)
if (ret < 0)
return ret;
clk_free(&clk);
/* enable power domain */
ret = power_domain_get(dev, &pwr_dom);
if (ret < 0)

2
drivers/phy/bcm6348-usbh-phy.c
View File

@ -62,8 +62,6 @@ static int bcm6348_usbh_probe(struct udevice *dev)
if (ret < 0)
return ret;
clk_free(&clk);
/* perform reset */
ret = reset_get_by_index(dev, 0, &rst_ctl);
if (ret < 0)

4
drivers/phy/bcm6368-usbh-phy.c
View File

@ -137,8 +137,6 @@ static int bcm6368_usbh_probe(struct udevice *dev)
if (ret < 0)
return ret;
clk_free(&clk);
#if defined(CONFIG_POWER_DOMAIN)
/* enable power domain */
ret = power_domain_get(dev, &pwr_dom);
@ -173,8 +171,6 @@ static int bcm6368_usbh_probe(struct udevice *dev)
ret = clk_enable(&clk);
if (ret < 0)
return ret;
clk_free(&clk);
}
mdelay(100);

1
drivers/phy/meson-axg-mipi-dphy.c
View File

@ -369,7 +369,6 @@ int meson_axg_mipi_dphy_probe(struct udevice *dev)
ret = clk_enable(&priv->clk);
if (ret && ret != -ENOSYS && ret != -ENOTSUPP) {
pr_err("failed to enable PHY clock\n");
clk_free(&priv->clk);
return ret;
}
#endif

1
drivers/phy/meson-g12a-usb3-pcie.c
View File

@ -398,7 +398,6 @@ int meson_g12a_usb3_pcie_phy_probe(struct udevice *dev)
ret = clk_enable(&priv->clk);
if (ret && ret != -ENOENT && ret != -ENOTSUPP) {
pr_err("failed to enable PHY clock\n");
clk_free(&priv->clk);
return ret;
}
#endif

1
drivers/phy/meson-gxl-usb2.c
View File

@ -203,7 +203,6 @@ int meson_gxl_usb2_phy_probe(struct udevice *dev)
ret = clk_enable(&priv->clk);
if (ret && ret != -ENOSYS && ret != -ENOTSUPP) {
pr_err("failed to enable PHY clock\n");
clk_free(&priv->clk);
return ret;
}
#endif

1
drivers/phy/phy-rcar-gen2.c
View File

@ -172,7 +172,6 @@ static int rcar_gen2_phy_remove(struct udevice *dev)
struct rcar_gen2_phy *priv = dev_get_priv(dev);
clk_disable(&priv->clk);
clk_free(&priv->clk);
return 0;
}

1
drivers/phy/phy-rcar-gen3.c
View File

@ -142,7 +142,6 @@ static int rcar_gen3_phy_remove(struct udevice *dev)
struct rcar_gen3_phy *priv = dev_get_priv(dev);
clk_disable(&priv->clk);
clk_free(&priv->clk);
return 0;
}

20
drivers/pinctrl/pinctrl-k210.c
View File

@ -691,23 +691,19 @@ static int k210_pc_probe(struct udevice *dev)
ret = clk_enable(&priv->clk);
if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
goto err;
return ret;
ret = dev_read_phandle_with_args(dev, "canaan,k210-sysctl-power",
NULL, 1, 0, &args);
if (ret)
goto err;
return ret;
if (args.args_count != 1) {
ret = -EINVAL;
goto err;
}
if (args.args_count != 1)
return -EINVAL;
priv->sysctl = syscon_node_to_regmap(args.node);
if (IS_ERR(priv->sysctl)) {
ret = PTR_ERR(priv->sysctl);
goto err;
}
if (IS_ERR(priv->sysctl))
return PTR_ERR(priv->sysctl);
priv->power_offset = args.args[0];
@ -728,10 +724,6 @@ static int k210_pc_probe(struct udevice *dev)
}
return 0;
err:
clk_free(&priv->clk);
return ret;
}
static const struct udevice_id k210_pc_ids[] = {

4
drivers/power/domain/imx8mp-hsiomix.c
View File

@ -111,7 +111,7 @@ static int imx8mp_hsiomix_probe(struct udevice *dev)
ret = power_domain_get_by_name(dev, &priv->pd_bus, "bus");
if (ret < 0)
goto err_pd_bus;
return ret;
ret = power_domain_get_by_name(dev, &priv->pd_usb, "usb");
if (ret < 0)
@ -133,8 +133,6 @@ err_pd_usb_phy1:
power_domain_free(&priv->pd_usb);
err_pd_usb:
power_domain_free(&priv->pd_bus);
err_pd_bus:
clk_free(&priv->clk_usb);
return ret;
}

16
drivers/rtc/stm32_rtc.c
View File

@ -223,10 +223,8 @@ static int stm32_rtc_init(struct udevice *dev)
return ret;
ret = clk_enable(&clk);
if (ret) {
clk_free(&clk);
if (ret)
return ret;
}
rate = clk_get_rate(&clk);
@ -275,10 +273,8 @@ static int stm32_rtc_init(struct udevice *dev)
unlock:
stm32_rtc_lock(dev);
if (ret) {
if (ret)
clk_disable(&clk);
clk_free(&clk);
}
return ret;
}
@ -298,17 +294,13 @@ static int stm32_rtc_probe(struct udevice *dev)
return ret;
ret = clk_enable(&clk);
if (ret) {
clk_free(&clk);
if (ret)
return ret;
}
ret = stm32_rtc_init(dev);
if (ret) {
if (ret)
clk_disable(&clk);
clk_free(&clk);
}
return ret;
}

2
drivers/serial/atmel_usart.c
View File

@ -253,8 +253,6 @@ static int atmel_serial_enable_clk(struct udevice *dev)
priv->usart_clk_rate = clk_rate;
clk_free(&clk);
return 0;
}
#endif

1
drivers/serial/serial_bcm6345.c
View File

@ -239,7 +239,6 @@ static int bcm6345_serial_probe(struct udevice *dev)
if (ret < 0)
return ret;
priv->uartclk = clk_get_rate(&clk);
clk_free(&clk);
/* initialize serial */
return bcm6345_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);

1
drivers/serial/serial_msm.c
View File

@ -185,7 +185,6 @@ static int msm_uart_clk_init(struct udevice *dev)
return ret;
ret = clk_set_rate(&clk, clk_rate);
clk_free(&clk);
if (ret < 0)
return ret;

1
drivers/serial/serial_pic32.c
View File

@ -155,7 +155,6 @@ static int pic32_uart_probe(struct udevice *dev)
if (ret < 0)
return ret;
priv->uartclk = clk_get_rate(&clk);
clk_free(&clk);
/* initialize serial */
return pic32_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);

1
drivers/spi/atcspi200_spi.c
View File

@ -362,7 +362,6 @@ static int atcspi200_spi_get_clk(struct udevice *bus)
return -EINVAL;
ns->clock = clk_rate;
clk_free(&clk);
return 0;
}

14
drivers/spi/atmel-quadspi.c
View File

@ -877,7 +877,6 @@ static int atmel_qspi_set_gclk(struct udevice *bus, uint hz)
ret = clk_enable(&gclk);
if (ret)
dev_err(bus, "Failed to enable QSPI generic clock\n");
clk_free(&gclk);
return ret;
}
@ -1000,7 +999,7 @@ static int atmel_qspi_enable_clk(struct udevice *dev)
ret = clk_enable(&pclk);
if (ret) {
dev_err(dev, "Failed to enable QSPI peripheral clock\n");
goto free_pclk;
return ret;
}
if (aq->caps->has_qspick) {
@ -1008,32 +1007,27 @@ static int atmel_qspi_enable_clk(struct udevice *dev)
ret = clk_get_by_name(dev, "qspick", &qspick);
if (ret) {
dev_err(dev, "Missing QSPI peripheral clock\n");
goto free_pclk;
return ret;
}
ret = clk_enable(&qspick);
if (ret)
dev_err(dev, "Failed to enable QSPI system clock\n");
clk_free(&qspick);
} else if (aq->caps->has_gclk) {
ret = clk_get_by_name(dev, "gclk", &gclk);
if (ret) {
dev_err(dev, "Missing QSPI generic clock\n");
goto free_pclk;
return ret;
}
ret = clk_enable(&gclk);
if (ret)
dev_err(dev, "Failed to enable QSPI system clock\n");
clk_free(&gclk);
}
aq->bus_clk_rate = clk_get_rate(&pclk);
if (!aq->bus_clk_rate)
ret = -EINVAL;
free_pclk:
clk_free(&pclk);
return -EINVAL;
return ret;
}

2
drivers/spi/atmel_spi.c
View File

@ -338,8 +338,6 @@ static int atmel_spi_enable_clk(struct udevice *bus)
priv->bus_clk_rate = clk_rate;
clk_free(&clk);
return 0;
}

4
drivers/spi/bcm63xx_hsspi.c
View File

@ -581,8 +581,6 @@ static int bcm63xx_hsspi_probe(struct udevice *dev)
if (ret < 0 && ret != -ENOSYS)
return ret;
clk_free(&clk);
/* get clock rate */
ret = clk_get_by_name(dev, "pll", &clk);
if (ret < 0 && ret != -ENOSYS)
@ -590,8 +588,6 @@ static int bcm63xx_hsspi_probe(struct udevice *dev)
priv->clk_rate = clk_get_rate(&clk);
clk_free(&clk);
/* perform reset */
ret = reset_get_by_index(dev, 0, &rst_ctl);
if (ret >= 0) {

2
drivers/spi/bcm63xx_spi.c
View File

@ -391,8 +391,6 @@ static int bcm63xx_spi_probe(struct udevice *dev)
if (ret < 0)
return ret;
clk_free(&clk);
/* perform reset */
ret = reset_get_by_index(dev, 0, &rst_ctl);
if (ret < 0)

4
drivers/spi/bcmbca_hsspi.c
View File

@ -375,8 +375,6 @@ static int bcmbca_hsspi_probe(struct udevice *dev)
if (ret < 0 && ret != -ENOSYS)
return ret;
clk_free(&clk);
/* get clock rate */
ret = clk_get_by_name(dev, "pll", &clk);
if (ret < 0 && ret != -ENOSYS)
@ -384,8 +382,6 @@ static int bcmbca_hsspi_probe(struct udevice *dev)
priv->clk_rate = clk_get_rate(&clk);
clk_free(&clk);
/* initialize hardware */
writel(0, priv->regs + SPI_IR_MASK_REG);

1
drivers/spi/cadence_qspi.c
View File

@ -236,7 +236,6 @@ static int cadence_spi_probe(struct udevice *bus)
#endif
} else {
priv->ref_clk_hz = clk_get_rate(&clk);
clk_free(&clk);
if (IS_ERR_VALUE(priv->ref_clk_hz))
return priv->ref_clk_hz;
}

5
drivers/spi/designware_spi.c
View File

@ -319,7 +319,6 @@ __weak int dw_spi_get_clk(struct udevice *bus, ulong *rate)
err_rate:
clk_disable(&priv->clk);
clk_free(&priv->clk);
return -EINVAL;
}
@ -743,10 +742,6 @@ static int dw_spi_remove(struct udevice *bus)
ret = clk_disable(&priv->clk);
if (ret)
return ret;
clk_free(&priv->clk);
if (ret)
return ret;
#endif
return 0;
}

10
drivers/spi/meson_spifc_a1.c
View File

@ -343,15 +343,6 @@ static int amlogic_spifc_a1_probe(struct udevice *dev)
return 0;
}
static int amlogic_spifc_a1_remove(struct udevice *dev)
{
struct amlogic_spifc_a1 *spifc = dev_get_priv(dev);
clk_free(&spifc->clk);
return 0;
}
static const struct udevice_id meson_spifc_ids[] = {
{ .compatible = "amlogic,a1-spifc", },
{ }
@ -379,6 +370,5 @@ U_BOOT_DRIVER(meson_spifc_a1) = {
.of_match = meson_spifc_ids,
.ops = &amlogic_spifc_a1_ops,
.probe = amlogic_spifc_a1_probe,
.remove = amlogic_spifc_a1_remove,
.priv_auto = sizeof(struct amlogic_spifc_a1),
};

10
drivers/spi/mvebu_a3700_spi.c
View File

@ -296,15 +296,6 @@ static int mvebu_spi_of_to_plat(struct udevice *bus)
return 0;
}
static int mvebu_spi_remove(struct udevice *bus)
{
struct mvebu_spi_plat *plat = dev_get_plat(bus);
clk_free(&plat->clk);
return 0;
}
static const struct dm_spi_ops mvebu_spi_ops = {
.xfer = mvebu_spi_xfer,
.set_speed = mvebu_spi_set_speed,
@ -328,5 +319,4 @@ U_BOOT_DRIVER(mvebu_spi) = {
.of_to_plat = mvebu_spi_of_to_plat,
.plat_auto = sizeof(struct mvebu_spi_plat),
.probe = mvebu_spi_probe,
.remove = mvebu_spi_remove,
};

1
drivers/spi/spi-aspeed-smc.c
View File

@ -1148,7 +1148,6 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
}
plat->hclk_rate = clk_get_rate(&hclk);
clk_free(&hclk);
dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
(u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);

19
drivers/spi/stm32_spi.c
View File

@ -526,22 +526,16 @@ static int stm32_spi_of_to_plat(struct udevice *dev)
ret = reset_get_by_index(dev, 0, &plat->rst_ctl);
if (ret < 0)
goto clk_err;
return ret;
ret = gpio_request_list_by_name(dev, "cs-gpios", plat->cs_gpios,
ARRAY_SIZE(plat->cs_gpios), 0);
if (ret < 0) {
dev_err(dev, "Can't get %s cs gpios: %d", dev->name, ret);
ret = -ENOENT;
goto clk_err;
return -ENOENT;
}
return 0;
clk_err:
clk_free(&plat->clk);
return ret;
}
static int stm32_spi_probe(struct udevice *dev)
@ -610,7 +604,6 @@ static int stm32_spi_probe(struct udevice *dev)
clk_err:
clk_disable(&plat->clk);
clk_free(&plat->clk);
return ret;
};
@ -630,13 +623,7 @@ static int stm32_spi_remove(struct udevice *dev)
reset_free(&plat->rst_ctl);
ret = clk_disable(&plat->clk);
if (ret < 0)
return ret;
clk_free(&plat->clk);
return ret;
return clk_disable(&plat->clk);
};
static const struct dm_spi_ops stm32_spi_ops = {

2
drivers/timer/dw-apb-timer.c
View File

@ -74,8 +74,6 @@ static int dw_apb_timer_probe(struct udevice *dev)
return ret;
uc_priv->clock_rate = clk_get_rate(&clk);
clk_free(&clk);
}
/* init timer */

2
drivers/timer/ostm_timer.c
View File

@ -49,8 +49,6 @@ static int ostm_probe(struct udevice *dev)
return ret;
uc_priv->clock_rate = clk_get_rate(&clk);
clk_free(&clk);
#else
uc_priv->clock_rate = get_board_sys_clk() / 2;
#endif

4
drivers/usb/dwc3/dwc3-meson-g12a.c
View File

@ -361,10 +361,8 @@ static int dwc3_meson_g12a_clk_init(struct dwc3_meson_g12a *priv)
#if CONFIG_IS_ENABLED(CLK)
ret = clk_enable(&priv->clk);
if (ret) {
clk_free(&priv->clk);
if (ret)
return ret;
}
#endif
return 0;

4
drivers/usb/dwc3/dwc3-meson-gxl.c
View File

@ -284,10 +284,8 @@ static int dwc3_meson_gxl_clk_init(struct dwc3_meson_gxl *priv)
#if CONFIG_IS_ENABLED(CLK)
ret = clk_enable(&priv->clk);
if (ret) {
clk_free(&priv->clk);
if (ret)
return ret;
}
#endif
return 0;

8
drivers/usb/host/ehci-atmel.c
View File

@ -70,13 +70,7 @@ static int ehci_atmel_enable_clk(struct udevice *dev)
if (ret)
return -EINVAL;
ret = clk_enable(&clk);
if (ret)
return ret;
clk_free(&clk);
return 0;
return clk_enable(&clk);
}
static int ehci_atmel_probe(struct udevice *dev)

1
drivers/usb/host/ohci-da8xx.c
View File

@ -115,7 +115,6 @@ static int ohci_da8xx_probe(struct udevice *dev)
err = clk_enable(&priv->clocks[i]);
if (err) {
dev_err(dev, "failed to enable clock %d\n", i);
clk_free(&priv->clocks[i]);
goto clk_err;
}
priv->clock_count++;

5
drivers/usb/host/xhci-rcar.c
View File

@ -90,7 +90,7 @@ static int xhci_rcar_probe(struct udevice *dev)
ret = clk_enable(&plat->clk);
if (ret) {
dev_err(dev, "Failed to enable USB3 clock\n");
goto err_clk;
return ret;
}
ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
@ -114,8 +114,6 @@ static int xhci_rcar_probe(struct udevice *dev)
err_fw:
clk_disable(&plat->clk);
err_clk:
clk_free(&plat->clk);
return ret;
}
@ -127,7 +125,6 @@ static int xhci_rcar_deregister(struct udevice *dev)
ret = xhci_deregister(dev);
clk_disable(&plat->clk);
clk_free(&plat->clk);
return ret;
}

2
drivers/video/atmel_hlcdfb.c
View File

@ -62,8 +62,6 @@ static int at91_hlcdc_enable_clk(struct udevice *dev)
priv->clk_rate = clk_rate;
clk_free(&clk);
return 0;
}

11
drivers/video/mali_dp.c
View File

@ -360,25 +360,18 @@ static int malidp_probe(struct udevice *dev)
err = malidp_setup_mode(priv, &timings);
if (err)
goto fail_timings;
return err;
malidp_setup_layer(priv, &timings, MALIDP_LAYER_LV1,
(phys_addr_t)uc_plat->base);
err = malidp_leave_config(priv);
if (err)
goto fail_timings;
return err;
malidp_set_configvalid(priv);
return 0;
fail_timings:
clk_free(&priv->aclk);
fail_aclk:
clk_free(&priv->pxlclk);
return err;
}
static int malidp_bind(struct udevice *dev)

4
drivers/video/rockchip/rk3288_hdmi.c
View File

@ -67,10 +67,8 @@ static int rk3288_clk_config(struct udevice *dev)
* monitor wants
*/
ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
if (ret >= 0) {
if (ret >= 0)
ret = clk_set_rate(&clk, 384000000);
clk_free(&clk);
}
if (ret < 0) {
debug("%s: Failed to set clock in source device '%s': ret=%d\n",
__func__, uc_plat->src_dev->name, ret);

8
drivers/video/rockchip/rk_edp.c
View File

@ -1095,20 +1095,16 @@ static int rk_edp_probe(struct udevice *dev)
if (edp_data->chip_type == RK3288_DP) {
ret = clk_get_by_index(dev, 1, &clk);
if (ret >= 0) {
if (ret >= 0)
ret = clk_set_rate(&clk, 0);
clk_free(&clk);
}
if (ret) {
debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret);
return ret;
}
}
ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
if (ret >= 0) {
if (ret >= 0)
ret = clk_set_rate(&clk, 192000000);
clk_free(&clk);
}
if (ret < 0) {
debug("%s: Failed to set clock in source device '%s': ret=%d\n",
__func__, uc_plat->src_dev->name, ret);

18
drivers/watchdog/designware_wdt.c
View File

@ -124,13 +124,11 @@ static int designware_wdt_probe(struct udevice *dev)
ret = clk_enable(&clk);
if (ret)
goto err;
return ret;
priv->clk_khz = clk_get_rate(&clk) / 1000;
if (!priv->clk_khz) {
ret = -EINVAL;
goto err;
}
if (!priv->clk_khz)
return -EINVAL;
#else
priv->clk_khz = CFG_DW_WDT_CLOCK_KHZ;
#endif
@ -139,21 +137,15 @@ static int designware_wdt_probe(struct udevice *dev)
ofnode_read_prop(dev_ofnode(dev), "resets", &ret)) {
ret = reset_get_bulk(dev, &priv->resets);
if (ret)
goto err;
return ret;
ret = reset_deassert_bulk(&priv->resets);
if (ret)
goto err;
return ret;
}
/* reset to disable the watchdog */
return designware_wdt_stop(dev);
err:
#if CONFIG_IS_ENABLED(CLK)
clk_free(&clk);
#endif
return ret;
}
static const struct wdt_ops designware_wdt_ops = {

4
drivers/watchdog/meson_gxbb_wdt.c
View File

@ -98,10 +98,8 @@ static int amlogic_wdt_probe(struct udevice *dev)
return ret;
ret = clk_enable(&clk);
if (ret) {
clk_free(&clk);
if (ret)
return ret;
}
/* Setup with 1ms timebase */
writel(((clk_get_rate(&clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |

21
include/clk.h
View File

@ -247,19 +247,6 @@ static inline struct clk *devm_clk_get_optional(struct udevice *dev,
*/
int clk_release_all(struct clk *clk, unsigned int count);
/**
* devm_clk_put - "free" a managed clock source
* @dev: device used to acquire the clock
* @clk: clock source acquired with devm_clk_get()
*
* Note: drivers must ensure that all clk_enable calls made on this
* clock source are balanced by clk_disable calls prior to calling
* this function.
*
* clk_put should not be called from within interrupt context.
*/
void devm_clk_put(struct udevice *dev, struct clk *clk);
#else
static inline int clk_get_by_phandle(struct udevice *dev, const
@ -313,10 +300,6 @@ static inline int clk_release_all(struct clk *clk, unsigned int count)
{
return -ENOSYS;
}
static inline void devm_clk_put(struct udevice *dev, struct clk *clk)
{
}
#endif
/**
@ -424,10 +407,6 @@ static inline int clk_release_bulk(struct clk_bulk *bulk)
return clk_release_all(bulk->clks, bulk->count);
}
static inline void clk_free(struct clk *clk)
{
}
#if CONFIG_IS_ENABLED(CLK)
/**
* clk_request() - Request a clock by provider-specific ID.