From d4f5c72896b6b47cae276f49081a801491be6838 Mon Sep 17 00:00:00 2001 From: Date: Fri, 12 Aug 2005 21:16:13 +0200 Subject: [PATCH] FRAM memory access optimization. --- common/cmd_eeprom.c | 51 +++++++++++++++++++++++++++++++++++++---- common/cmd_i2c.c | 6 +++++ include/configs/o2dnt.h | 1 + 3 files changed, 54 insertions(+), 4 deletions(-) diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c index 80b8ccc1e8..2d4c9f6c42 100644 --- a/common/cmd_eeprom.c +++ b/common/cmd_eeprom.c @@ -22,6 +22,21 @@ * */ +/* + * Support for read and write access to EEPROM like memory devices. This + * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM). + * FRAM devices read and write data at bus speed. In particular, there is no + * write delay. Also, there is no limit imposed on the numer of bytes that can + * be transferred with a single read or write. + * + * Use the following configuration options to ensure no unneeded performance + * degradation (typical for EEPROM) is incured for FRAM memory: + * + * #define CFG_I2C_FRAM + * #undef CFG_EEPROM_PAGE_WRITE_DELAY_MS + * + */ + #include #include #include @@ -122,7 +137,11 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt * because the next page may be in a different device. */ while (offset < end) { - unsigned alen, len, maxlen; + unsigned alen, len; +#if !defined(CFG_I2C_FRAM) + unsigned maxlen; +#endif + #if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X) uchar addr[2]; @@ -144,12 +163,21 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt addr[0] |= dev_addr; /* insert device address */ + len = end - offset; + + /* + * For a FRAM device there is no limit on the number of the + * bytes that can be ccessed with the single read or write + * operation. + */ +#if !defined(CFG_I2C_FRAM) maxlen = 0x100 - blk_off; if (maxlen > I2C_RXTX_LEN) maxlen = I2C_RXTX_LEN; - len = end - offset; if (len > maxlen) len = maxlen; +#endif + #ifdef CONFIG_SPI spi_read (addr, alen, buffer, len); #else @@ -159,6 +187,7 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt buffer += len; offset += len; } + return rcode; } @@ -191,7 +220,11 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn */ while (offset < end) { - unsigned alen, len, maxlen; + unsigned alen, len; +#if !defined(CFG_I2C_FRAM) + unsigned maxlen; +#endif + #if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X) uchar addr[2]; @@ -213,6 +246,15 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn addr[0] |= dev_addr; /* insert device address */ + len = end - offset; + + /* + * For a FRAM device there is no limit on the number of the + * bytes that can be ccessed with the single read or write + * operation. + */ +#if !defined(CFG_I2C_FRAM) + #if defined(CFG_EEPROM_PAGE_WRITE_BITS) #define EEPROM_PAGE_SIZE (1 << CFG_EEPROM_PAGE_WRITE_BITS) @@ -225,9 +267,10 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn if (maxlen > I2C_RXTX_LEN) maxlen = I2C_RXTX_LEN; - len = end - offset; if (len > maxlen) len = maxlen; +#endif + #ifdef CONFIG_SPI spi_write (addr, alen, buffer, len); #else diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 9c02ceb153..2e44c7fde1 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -295,7 +295,13 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) * chip doesn't respond. This apparently isn't a * universal feature so we don't take advantage of it. */ +/* + * No write delay with FRAM devices. + */ +#if !defined(CFG_I2C_FRAM) udelay(11000); +#endif + #if 0 for(timeout = 0; timeout < 10; timeout++) { udelay(2000); diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h index 12a732d9f1..2d44cea404 100644 --- a/include/configs/o2dnt.h +++ b/include/configs/o2dnt.h @@ -158,6 +158,7 @@ * 0x50 ... 0x57 each 256 bytes in size * */ +#define CFG_I2C_FRAM #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ #define CFG_I2C_EEPROM_ADDR_LEN 1 #define CFG_EEPROM_PAGE_WRITE_BITS 3