Commit Graph

18 Commits

Author SHA1 Message Date
Pegorer Massimo
6d79d8a743 configs: rockchip: drop useless DEBUG_UART_SKIP_INIT
DEBUG_UART_SKIP_INIT feature is implemented only by s5p (DEBUG_UART_S5P)
and pl01x (DEBUG_UART_PL010 or DEBUG_UART_PL011) serial drivers, but all
ARCH_ROCKCHIP configs rely on default DEBUG_UART_NS16550. The ns16550
serial driver does not depends on DEBUG_UART_SKIP_INIT, so drop it from
rockchip configs.

Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:39:01 +08:00
Tom Rini
fcb5117da8 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 09:58:06 -05:00
Tom Rini
9591b63531 Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NS16550_MIN_FUNCTIONS
   CONFIG_SYS_NS16550_MEM32
   CONFIG_SYS_NS16550_PORT_MAPPED
   CONFIG_SYS_NS16550_REG_SIZE
   CONFIG_SYS_NS16550_SERIAL

To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that
platforms can enable the legacy driver here for SPL.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:07 -05:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Simon Glass
b86986c7b3 video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO
Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
b95125e480 treewide: Stop enabling CONFIG_LCD
This option is not used anymore since the LCD implementation is being
removed. Stop enabling it on various boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Michael Trimarchi
dc1c02cb59 configs: rockchip: Drop TPL_MAX_SIZE definition
The max size is defined at architectural level. On the same commit
I have checked mostly all the other architecture and look like they are

Fixes: commit ca8a329a1b ("Convert CONFIG_SPL_PAD_TO et al to Kconfig")
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-09-29 10:10:39 -04:00
Tom Rini
1247c35c80 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-23 15:24:14 -04:00
Tom Rini
0fc5c499db configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25 17:19:18 -04:00
Tom Rini
41e47b420d configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:13:29 -04:00
Tom Rini
6600b355c7 Convert CONFIG_SPL_BSS_START_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BSS_START_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
f113d7d303 Convert CONFIG_SPL_STACK to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_STACK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:27 -04:00
Tom Rini
eaf6ea6a1d Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:19 -04:00
Tom Rini
9b5f9aeb3b Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BSS_MAX_SIZE
   CONFIG_SPL_MAX_FOOTPRINT

Note that the da850evm platforms were violating the "only use one" rule
here, and so now hard-code their BSS limit.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:10 -04:00
Tom Rini
ca8a329a1b Convert CONFIG_SPL_PAD_TO et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_PAD_TO
   CONFIG_SPL_MAX_SIZE
   CONFIG_TPL_PAD_TO
   CONFIG_TPL_MAX_SIZE

Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the
existing places.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:06 -04:00
Peng Fan
abf8d9632f configs: set CONFIG_COUNTER_FREQUENCY
Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in
config header file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: Re-run migration]
2022-04-21 15:15:51 -04:00
Tom Rini
d46e86d25c configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 13:36:51 -04:00
Jagan Teki
0ade02526b engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 14:56:58 +08:00