Commit Graph

19 Commits

Author SHA1 Message Date
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Michal Simek
a99a06cbbd fpga: xilinx: spartan3: Setup NULL fpga_op without driver
Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-21 10:25:02 +01:00
Michal Simek
14cfc4f373 fpga: xilinx: Simplify load/dump/info function handling
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13 09:13:59 +02:00
Michal Simek
2df9d5c431 fpga: xilinx: Fix the rest of CamelCases
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13 09:13:49 +02:00
Michal Simek
f8c1be9816 fpga: xilinx: Avoid CamelCase for in Xilinx_desc
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13 09:12:53 +02:00
Michal Simek
2a6e3869f2 fpga: spartan3: Avoid CamelCase
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13 09:12:52 +02:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Stefano Babic
28cdc1c8e2 fpga: add definition for Xilinx Spartan-6 XC6SLX4
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-01-05 16:18:30 +01:00
Wolfgang Denk
e6a857da74 fpga: constify to fix build warning
Fix compiler warning:

cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
from incompatible pointer type

Adding the needed 'const' here entails a whole bunch of additonal
changes all over the FPGA code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Cc: Murray Jensen <Murray.Jensen@csiro.au>
Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
2011-08-01 15:19:40 +02:00
Wolfgang Wegner
b0bc8b70ff add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fns
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
2010-11-30 21:59:21 +01:00
Wolfgang Wegner
89083346d0 add block write function to spartan3 slave serial load
Using seperate function calls for each bit-bang of slave serial
load can be painfully slow. This patch adds the possibility to
supply a block write function that loads the complete block of
data in one call (like it can already be done with Altera FPGAs).
On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load
time from around 15 seconds to around 3 seconds

Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
2010-03-24 11:08:43 -05:00
Peter Tyser
6385b28116 fpga: Remove relocation fixups
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups.  Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 10:17:56 +02:00
Laurent Pinchart
a07faf7b9a Fix Spartan-3 definitions.
A few Spartan-3 definitions erroneously use Spartan-3E size
constants. This patch fixes them.

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
2008-09-22 22:07:20 +02:00
Laurent Pinchart
28113e1f0d Remove duplicate Spartan-3E definition.
Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-09-22 22:03:33 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Matthias Fuchs
3bff4ffa33 Add new Xilinx Spartan FPGA types
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-01-09 13:36:28 +01:00
Matthias Fuchs
21d39d598c Add pre and post configuration callbacks for Spartan FPGAs
This patch adds a post configuration callback for Spartan2/3 FPGAs.
pre and post configuration callback are now optional and
not called when the function pointer is set to NULL.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-01-09 13:35:52 +01:00
Bruce Adler
923efd2864 add image size and descriptors for Spartan 3E FPGA chips
Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)

Signed-off by: Bruce Adler <bruce.adler@ccpu.com>
2007-08-11 00:34:03 +02:00
Wolfgang Denk
875c78934e Add Xilinx Spartan3 family FPGA support
Patch by Kurt Stremerch, 14 February 2005
2005-09-25 16:44:21 +02:00