e7ea0a2ba3
Add basic support for the HPE GXP SoC. Reset the EHCI controller at boot. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
76 lines
1.5 KiB
C
76 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* GXP timer driver
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*
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* (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
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* Author: Nick Hawkins <nick.hawkins@hpe.com>
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* Author: Jean-Marie Verdun <verdun@hpe.com>
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*/
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#include <linux/sizes.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <dm/uclass.h>
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#include <ram.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define ECHI_CMD 0xcefe0010
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int board_init(void)
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{
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writel(0x00080002, ECHI_CMD);
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return 0;
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}
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int dram_init(void)
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{
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if (IS_ENABLED(CONFIG_TARGET_GXP)) {
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if (IS_ENABLED(CONFIG_GXP_ECC)) {
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/* 0x0f800000 */
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gd->ram_size = SZ_128M + SZ_64M + SZ_32M + SZ_16M + SZ_8M;
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} else {
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/* 0x1f000000 */
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gd->ram_size = SZ_256M + SZ_128M + SZ_64M + SZ_32M + SZ_16M;
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}
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if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) {
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if (IS_ENABLED(CONFIG_GXP_ECC)) {
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/* 0x0c000000 */
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gd->ram_size = SZ_128M + SZ_64M;
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} else {
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/* 0x18000000 */
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gd->ram_size = SZ_256M + SZ_128M;
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}
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}
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if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) {
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if (IS_ENABLED(CONFIG_GXP_ECC)) {
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/* 0x0e000000 */
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gd->ram_size = SZ_128M + SZ_64M + SZ_32M;
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} else {
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/* 0x1c000000 */
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gd->ram_size = SZ_256M + SZ_128M + SZ_64M;
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}
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}
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}
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if (IS_ENABLED(CONFIG_TARGET_GXP2)) {
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/* 0x1b200000 */
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gd->ram_size = SZ_256M + SZ_128M + SZ_32M + SZ_16M + SZ_2M;
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if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) {
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/* 0x14000000 */
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gd->ram_size = SZ_256M + SZ_64M;
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}
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if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) {
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/* 0x18000000 */
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gd->ram_size = SZ_256M + SZ_128M;
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}
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}
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return 0;
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}
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