82e26e0d68
We like to put the SPL first so it is clear that it relates to SPL. Rename various malloc-related options which have crept in, to stick to this convention. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
113 lines
2.8 KiB
Plaintext
113 lines
2.8 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_IMX8M=y
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CONFIG_TEXT_BASE=0x40200000
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CONFIG_SYS_MALLOC_LEN=0x2000000
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CONFIG_SPL_GPIO=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ENV_SIZE=0x1000
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CONFIG_ENV_OFFSET=0x400000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="imx8mp-icore-mx8mp-edimm2.2"
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CONFIG_SPL_TEXT_BASE=0x920000
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CONFIG_TARGET_IMX8MP_ICORE_MX8MP=y
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CONFIG_SYS_MONITOR_LEN=524288
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL_STACK=0x960000
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CONFIG_SPL=y
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CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
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CONFIG_SYS_LOAD_ADDR=0x40480000
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CONFIG_FIT=y
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CONFIG_FIT_EXTERNAL_OFFSET=0x3000
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_OF_SYSTEM_SETUP=y
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CONFIG_DEFAULT_FDT_FILE="imx8mp-icore-mx8mp-edimm2.2.dtb"
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_SPL_MAX_SIZE=0x26000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x98fc00
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CONFIG_SPL_BSS_MAX_SIZE=0x400
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_SYS_MALLOC=y
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CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
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CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
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CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
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CONFIG_SPL_I2C=y
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CONFIG_SPL_POWER=y
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CONFIG_SPL_WATCHDOG=y
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CONFIG_SYS_PROMPT="u-boot=> "
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CONFIG_SYS_MAXARGS=64
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CONFIG_SYS_CBSIZE=2048
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CONFIG_SYS_PBSIZE=2074
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CONFIG_SYS_BOOTM_LEN=0x2000000
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# CONFIG_CMD_EXPORTENV is not set
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# CONFIG_CMD_IMPORTENV is not set
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# CONFIG_CMD_CRC32 is not set
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CONFIG_CMD_CLK=y
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_DEV=1
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="eth1"
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM=y
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CONFIG_CLK_COMPOSITE_CCF=y
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CONFIG_CLK_IMX8MP=y
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CONFIG_MXC_GPIO=y
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CONFIG_DM_PCA953X=y
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CONFIG_DM_I2C=y
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# CONFIG_SPL_DM_I2C is not set
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_DWC_ETH_QOS=y
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CONFIG_DWC_ETH_QOS_IMX=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX8M=y
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CONFIG_SPL_POWER_LEGACY=y
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CONFIG_POWER_PCA9450=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_SPL_POWER_I2C=y
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CONFIG_DM_SERIAL=y
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CONFIG_MXC_UART=y
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CONFIG_SYSRESET=y
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CONFIG_SPL_SYSRESET=y
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CONFIG_SYSRESET_PSCI=y
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CONFIG_SYSRESET_WATCHDOG=y
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CONFIG_IMX_WATCHDOG=y
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