f606c9a895
The watchdog timer is part of the sl28cpld management controller. The watchdog timer usually supervises the bootloader boot-up and if it bites the failsafe bootloader will be activated. Apart from that it supports the usual board level reset and one SMARC speciality: driving the WDT_TIMEOUT# signal. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
110 lines
2.4 KiB
C
110 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Watchdog driver for the sl28cpld
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*
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* Copyright (c) 2021 Michael Walle <michael@walle.cc>
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*/
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#include <common.h>
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#include <dm.h>
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#include <wdt.h>
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#include <sl28cpld.h>
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#include <div64.h>
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#define SL28CPLD_WDT_CTRL 0x00
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#define WDT_CTRL_EN0 BIT(0)
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#define WDT_CTRL_EN1 BIT(1)
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#define WDT_CTRL_EN_MASK GENMASK(1, 0)
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#define WDT_CTRL_LOCK BIT(2)
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#define WDT_CTRL_ASSERT_SYS_RESET BIT(6)
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#define WDT_CTRL_ASSERT_WDT_TIMEOUT BIT(7)
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#define SL28CPLD_WDT_TIMEOUT 0x01
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#define SL28CPLD_WDT_KICK 0x02
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#define WDT_KICK_VALUE 0x6b
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static int sl28cpld_wdt_reset(struct udevice *dev)
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{
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return sl28cpld_write(dev, SL28CPLD_WDT_KICK, WDT_KICK_VALUE);
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}
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static int sl28cpld_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
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{
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int ret, val;
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val = sl28cpld_read(dev, SL28CPLD_WDT_CTRL);
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if (val < 0)
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return val;
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/* (1) disable watchdog */
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val &= ~WDT_CTRL_EN_MASK;
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ret = sl28cpld_write(dev, SL28CPLD_WDT_CTRL, val);
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if (ret)
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return ret;
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/* (2) set timeout */
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ret = sl28cpld_write(dev, SL28CPLD_WDT_TIMEOUT, lldiv(timeout, 1000));
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if (ret)
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return ret;
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/* (3) kick it, will reset timer to the timeout value */
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ret = sl28cpld_wdt_reset(dev);
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if (ret)
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return ret;
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/* (4) enable either recovery or normal one */
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if (flags & BIT(0))
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val |= WDT_CTRL_EN1;
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else
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val |= WDT_CTRL_EN0;
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if (flags & BIT(1))
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val |= WDT_CTRL_LOCK;
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if (flags & BIT(2))
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val &= ~WDT_CTRL_ASSERT_SYS_RESET;
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else
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val |= WDT_CTRL_ASSERT_SYS_RESET;
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if (flags & BIT(3))
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val |= WDT_CTRL_ASSERT_WDT_TIMEOUT;
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else
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val &= ~WDT_CTRL_ASSERT_WDT_TIMEOUT;
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return sl28cpld_write(dev, SL28CPLD_WDT_CTRL, val);
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}
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static int sl28cpld_wdt_stop(struct udevice *dev)
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{
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int val;
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val = sl28cpld_read(dev, SL28CPLD_WDT_CTRL);
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if (val < 0)
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return val;
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return sl28cpld_write(dev, SL28CPLD_WDT_CTRL, val & ~WDT_CTRL_EN_MASK);
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}
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static int sl28cpld_wdt_expire_now(struct udevice *dev, ulong flags)
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{
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return sl28cpld_wdt_start(dev, 0, flags);
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}
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static const struct wdt_ops sl28cpld_wdt_ops = {
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.start = sl28cpld_wdt_start,
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.reset = sl28cpld_wdt_reset,
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.stop = sl28cpld_wdt_stop,
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.expire_now = sl28cpld_wdt_expire_now,
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};
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static const struct udevice_id sl28cpld_wdt_ids[] = {
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{ .compatible = "kontron,sl28cpld-wdt", },
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{}
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};
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U_BOOT_DRIVER(sl28cpld_wdt) = {
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.name = "sl28cpld-wdt",
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.id = UCLASS_WDT,
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.of_match = sl28cpld_wdt_ids,
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.ops = &sl28cpld_wdt_ops,
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};
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