386fca6896
This patch is to enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
11 lines
351 B
Makefile
11 lines
351 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2018-2021 Marek Vasut <marex@denx.de>
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#
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obj-$(CONFIG_TARGET_SOCFPGA_AGILEX) += clk-agilex.o
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obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clk-arria10.o
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obj-$(CONFIG_TARGET_SOCFPGA_N5X) += clk-n5x.o
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obj-$(CONFIG_TARGET_SOCFPGA_N5X) += clk-mem-n5x.o
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obj-$(CONFIG_TARGET_SOCFPGA_AGILEX5) += clk-agilex5.o
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