09844d0de5
For some gate clocks and fixed clocks without a parent, calling clk_register will print an useless error message indicating that parent is missing. Fix that by gaurding log_xxx() with an if-statement. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Suggested-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20230807-clk-fix-v2-1-0b688e21fb4e@outlook.com
144 lines
2.8 KiB
C
144 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 DENX Software Engineering
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* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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*/
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#define LOG_CATEGORY UCLASS_CLK
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#include <common.h>
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#include <clk.h>
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#include <clk-uclass.h>
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#include <log.h>
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#include <dm/device.h>
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#include <dm/uclass.h>
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#include <dm/lists.h>
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#include <dm/device-internal.h>
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int clk_register(struct clk *clk, const char *drv_name,
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const char *name, const char *parent_name)
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{
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struct udevice *parent = NULL;
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struct driver *drv;
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int ret;
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if (parent_name) {
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ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent);
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if (ret) {
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log_err("%s: failed to get %s device (parent of %s)\n",
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__func__, parent_name, name);
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} else {
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log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
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parent->name, parent);
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}
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}
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drv = lists_driver_lookup_name(drv_name);
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if (!drv) {
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log_err("%s: %s is not a valid driver name\n",
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__func__, drv_name);
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return -ENOENT;
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}
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ret = device_bind(parent, drv, name, NULL, ofnode_null(), &clk->dev);
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if (ret) {
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log_err("%s: CLK: %s driver bind error [%d]!\n", __func__, name,
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ret);
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return ret;
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}
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clk->enable_count = 0;
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/* Store back pointer to clk from udevice */
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/* FIXME: This is not allowed...should be allocated by driver model */
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dev_set_uclass_priv(clk->dev, clk);
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return 0;
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}
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ulong clk_generic_get_rate(struct clk *clk)
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{
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return clk_get_parent_rate(clk);
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}
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const char *clk_hw_get_name(const struct clk *hw)
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{
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assert(hw);
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assert(hw->dev);
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return hw->dev->name;
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}
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bool clk_dev_binded(struct clk *clk)
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{
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if (clk->dev && (dev_get_flags(clk->dev) & DM_FLAG_BOUND))
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return true;
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return false;
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}
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/* Helper functions for clock ops */
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ulong ccf_clk_get_rate(struct clk *clk)
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{
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struct clk *c;
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int err = clk_get_by_id(clk->id, &c);
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if (err)
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return err;
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return clk_get_rate(c);
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}
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ulong ccf_clk_set_rate(struct clk *clk, unsigned long rate)
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{
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struct clk *c;
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int err = clk_get_by_id(clk->id, &c);
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if (err)
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return err;
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return clk_set_rate(c, rate);
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}
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int ccf_clk_set_parent(struct clk *clk, struct clk *parent)
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{
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struct clk *c, *p;
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int err = clk_get_by_id(clk->id, &c);
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if (err)
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return err;
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err = clk_get_by_id(parent->id, &p);
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if (err)
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return err;
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return clk_set_parent(c, p);
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}
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static int ccf_clk_endisable(struct clk *clk, bool enable)
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{
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struct clk *c;
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int err = clk_get_by_id(clk->id, &c);
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if (err)
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return err;
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return enable ? clk_enable(c) : clk_disable(c);
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}
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int ccf_clk_enable(struct clk *clk)
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{
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return ccf_clk_endisable(clk, true);
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}
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int ccf_clk_disable(struct clk *clk)
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{
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return ccf_clk_endisable(clk, false);
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}
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const struct clk_ops ccf_clk_ops = {
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.set_rate = ccf_clk_set_rate,
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.get_rate = ccf_clk_get_rate,
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.set_parent = ccf_clk_set_parent,
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.enable = ccf_clk_enable,
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.disable = ccf_clk_disable,
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};
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