b7e0750d88
Move arm twd timer driver from zynq to generic location. DM timer drivers are designed differently to original driver. Timer is counting up and not down. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220805061629.1207-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
109 lines
2.7 KiB
C
109 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017-2022 Weidmüller Interface GmbH & Co. KG
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* Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
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*
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* Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved.
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*
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* (C) Copyright 2008
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* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
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*
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* (C) Copyright 2004
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* Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
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*
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* (C) Copyright 2002-2004
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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*
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* (C) Copyright 2003
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* Texas Instruments <www.ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <timer.h>
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#include <linux/bitops.h>
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#include <asm/io.h>
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#define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */
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#define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */
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#define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */
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#define TIMER_LOAD_VAL 0xFFFFFFFF
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struct arm_twd_timer_regs {
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u32 load; /* Timer Load Register */
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u32 counter; /* Timer Counter Register */
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u32 control; /* Timer Control Register */
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};
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struct arm_twd_timer_priv {
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struct arm_twd_timer_regs *base;
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};
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static u64 arm_twd_timer_get_count(struct udevice *dev)
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{
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struct arm_twd_timer_priv *priv = dev_get_priv(dev);
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struct arm_twd_timer_regs *regs = priv->base;
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u32 count = TIMER_LOAD_VAL - readl(®s->counter);
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return timer_conv_64(count);
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}
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static int arm_twd_timer_probe(struct udevice *dev)
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{
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struct arm_twd_timer_priv *priv = dev_get_priv(dev);
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struct arm_twd_timer_regs *regs;
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fdt_addr_t addr;
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addr = dev_read_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->base = (struct arm_twd_timer_regs *)addr;
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regs = priv->base;
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/* Load the timer counter register */
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writel(0xFFFFFFFF, ®s->load);
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/*
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* Start the A9Timer device
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* Enable Auto reload mode, Clear prescaler control bits
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* Set prescaler value, Enable the decrementer
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*/
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clrsetbits_le32(®s->control, SCUTIMER_CONTROL_PRESCALER_MASK,
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SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
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SCUTIMER_CONTROL_ENABLE_MASK);
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return 0;
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}
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static const struct timer_ops arm_twd_timer_ops = {
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.get_count = arm_twd_timer_get_count,
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};
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static const struct udevice_id arm_twd_timer_ids[] = {
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{ .compatible = "arm,cortex-a9-twd-timer" },
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{}
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};
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U_BOOT_DRIVER(arm_twd_timer) = {
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.name = "arm_twd_timer",
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.id = UCLASS_TIMER,
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.of_match = arm_twd_timer_ids,
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.priv_auto = sizeof(struct arm_twd_timer_priv),
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.probe = arm_twd_timer_probe,
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.ops = &arm_twd_timer_ops,
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};
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