83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
115 lines
3.1 KiB
C
115 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*/
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#ifndef _SMSC_SIO1007_H_
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#define _SMSC_SIO1007_H_
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/*
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* The I/O base address of SIO1007 at power-up is determined by the SYSOPT0
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* and SYSOPT1 pins at the deasserting edge of PCIRST#. The combination of
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* SYSOPT0 and SYSOPT1 determines one of the following addresses.
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*/
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#define SIO1007_IOPORT0 0x002e
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#define SIO1007_IOPORT1 0x004e
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#define SIO1007_IOPORT2 0x162e
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#define SIO1007_IOPORT3 0x164e
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/* SIO1007 registers */
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#define DEV_POWER_CTRL 0x02
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#define UART1_POWER_ON (1 << 3)
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#define UART2_POWER_ON (1 << 7)
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#define UART1_IOBASE 0x24
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#define UART2_IOBASE 0x25
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#define UART_IRQ 0x28
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#define RTR_IOBASE_HIGH 0x21
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#define RTR_IOBASE_LOW 0x30
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#define GPIO0_DIR 0x31
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#define GPIO1_DIR 0x35
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#define GPIO_DIR_INPUT 0
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#define GPIO_DIR_OUTPUT 1
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#define GPIO0_POL 0x32
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#define GPIO1_POL 0x36
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#define GPIO_POL_NO_INVERT 0
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#define GPIO_POL_INVERT 1
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#define GPIO0_TYPE 0x33
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#define GPIO1_TYPE 0x37
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#define GPIO_TYPE_PUSH_PULL 0
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#define GPIO_TYPE_OPEN_DRAIN 1
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#define DEV_ACTIVATE 0x3a
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#define RTR_EN (1 << 1)
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/* Runtime register offset */
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#define GPIO0_DATA 0xc
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#define GPIO1_DATA 0xe
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/* Number of serial ports supported */
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#define SIO1007_UART_NUM 2
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/* Number of gpio pins supported */
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#define GPIO_NUM_PER_GROUP 8
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#define GPIO_GROUP_NUM 2
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#define SIO1007_GPIO_NUM (GPIO_NUM_PER_GROUP * GPIO_GROUP_NUM)
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/**
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* Configure the I/O port address of the specified serial device and
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* enable the serial device.
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*
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* @port: SIO1007 I/O port address
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* @num: serial device number (0 or 1)
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* @iobase: processor I/O port address to assign to this serial device
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* @irq: processor IRQ number to assign to this serial device
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*/
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void sio1007_enable_serial(int port, int num, int iobase, int irq);
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/**
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* Configure the I/O port address of the runtime register block and
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* enable the address decoding.
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*
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* @port: SIO1007 I/O port address
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* @iobase: processor I/O port address to assign to the runtime registers
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*/
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void sio1007_enable_runtime(int port, int iobase);
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/**
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* Configure the direction/polority/type of a specified GPIO pin
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*
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* @port: SIO1007 I/O port address
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* @gpio: GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
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* @dir: GPIO_DIR_INPUT or GPIO_DIR_OUTPUT
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* @pol: GPIO_POL_NO_INVERT or GPIO_POL_INVERT
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* @type: GPIO_TYPE_PUSH_PULL or GPIO_TYPE_OPEN_DRAIN
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*/
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void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type);
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/**
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* Get a GPIO pin value.
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* This will work whether the GPIO is an input or an output.
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*
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* @port: runtime register block I/O port address
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* @gpio: GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
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* @return: 0 if low, 1 if high, -EINVAL if gpio number is invalid
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*/
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int sio1007_gpio_get_value(int port, int gpio);
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/**
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* Set a GPIO pin value.
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* This will only work when the GPIO is configured as an output.
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*
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* @port: runtime register block I/O port address
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* @gpio: GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
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* @val: 0 if low, 1 if high
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*/
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void sio1007_gpio_set_value(int port, int gpio, int val);
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#endif /* _SMSC_SIO1007_H_ */
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