83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
127 lines
2.9 KiB
C
127 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de)
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*
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* based on AT91RM9200 datasheet revision I (36. Ethernet MAC (EMAC))
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*/
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#ifndef AT91_H
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#define AT91_H
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typedef struct at91_emac {
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u32 ctl;
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u32 cfg;
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u32 sr;
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u32 tar;
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u32 tcr;
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u32 tsr;
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u32 rbqp;
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u32 reserved0;
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u32 rsr;
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u32 isr;
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u32 ier;
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u32 idr;
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u32 imr;
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u32 man;
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u32 reserved1[2];
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u32 fra;
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u32 scol;
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u32 mocl;
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u32 ok;
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u32 seqe;
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u32 ale;
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u32 dte;
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u32 lcol;
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u32 ecol;
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u32 cse;
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u32 tue;
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u32 cde;
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u32 elr;
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u32 rjb;
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u32 usf;
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u32 sqee;
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u32 drfc;
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u32 reserved2[3];
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u32 hsh;
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u32 hsl;
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u32 sa1l;
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u32 sa1h;
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u32 sa2l;
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u32 sa2h;
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u32 sa3l;
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u32 sa3h;
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u32 sa4l;
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u32 sa4h;
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} at91_emac_t;
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#define AT91_EMAC_CTL_LB 0x0001
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#define AT91_EMAC_CTL_LBL 0x0002
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#define AT91_EMAC_CTL_RE 0x0004
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#define AT91_EMAC_CTL_TE 0x0008
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#define AT91_EMAC_CTL_MPE 0x0010
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#define AT91_EMAC_CTL_CSR 0x0020
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#define AT91_EMAC_CTL_ISR 0x0040
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#define AT91_EMAC_CTL_WES 0x0080
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#define AT91_EMAC_CTL_BP 0x1000
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#define AT91_EMAC_CFG_SPD 0x0001
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#define AT91_EMAC_CFG_FD 0x0002
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#define AT91_EMAC_CFG_BR 0x0004
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#define AT91_EMAC_CFG_CAF 0x0010
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#define AT91_EMAC_CFG_NBC 0x0020
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#define AT91_EMAC_CFG_MTI 0x0040
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#define AT91_EMAC_CFG_UNI 0x0080
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#define AT91_EMAC_CFG_BIG 0x0100
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#define AT91_EMAC_CFG_EAE 0x0200
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#define AT91_EMAC_CFG_CLK_MASK 0xFFFFF3FF
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#define AT91_EMAC_CFG_MCLK_8 0x0000
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#define AT91_EMAC_CFG_MCLK_16 0x0400
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#define AT91_EMAC_CFG_MCLK_32 0x0800
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#define AT91_EMAC_CFG_MCLK_64 0x0C00
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#define AT91_EMAC_CFG_RTY 0x1000
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#define AT91_EMAC_CFG_RMII 0x2000
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#define AT91_EMAC_SR_LINK 0x0001
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#define AT91_EMAC_SR_MDIO 0x0002
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#define AT91_EMAC_SR_IDLE 0x0004
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#define AT91_EMAC_TCR_LEN(x) (x & 0x7FF)
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#define AT91_EMAC_TCR_NCRC 0x8000
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#define AT91_EMAC_TSR_OVR 0x0001
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#define AT91_EMAC_TSR_COL 0x0002
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#define AT91_EMAC_TSR_RLE 0x0004
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#define AT91_EMAC_TSR_TXIDLE 0x0008
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#define AT91_EMAC_TSR_BNQ 0x0010
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#define AT91_EMAC_TSR_COMP 0x0020
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#define AT91_EMAC_TSR_UND 0x0040
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#define AT91_EMAC_RSR_BNA 0x0001
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#define AT91_EMAC_RSR_REC 0x0002
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#define AT91_EMAC_RSR_OVR 0x0004
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/* ISR, IER, IDR, IMR use the same bits */
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#define AT91_EMAC_IxR_DONE 0x0001
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#define AT91_EMAC_IxR_RCOM 0x0002
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#define AT91_EMAC_IxR_RBNA 0x0004
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#define AT91_EMAC_IxR_TOVR 0x0008
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#define AT91_EMAC_IxR_TUND 0x0010
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#define AT91_EMAC_IxR_RTRY 0x0020
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#define AT91_EMAC_IxR_TBRE 0x0040
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#define AT91_EMAC_IxR_TCOM 0x0080
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#define AT91_EMAC_IxR_TIDLE 0x0100
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#define AT91_EMAC_IxR_LINK 0x0200
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#define AT91_EMAC_IxR_ROVR 0x0400
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#define AT91_EMAC_IxR_HRESP 0x0800
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#define AT91_EMAC_MAN_DATA_MASK 0xFFFF
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#define AT91_EMAC_MAN_CODE_802_3 0x00020000
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#define AT91_EMAC_MAN_REGA(reg) ((reg & 0x1F) << 18)
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#define AT91_EMAC_MAN_PHYA(phy) ((phy & 0x1F) << 23)
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#define AT91_EMAC_MAN_RW_R 0x20000000
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#define AT91_EMAC_MAN_RW_W 0x10000000
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#define AT91_EMAC_MAN_HIGH 0x40000000
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#define AT91_EMAC_MAN_LOW 0x80000000
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#endif
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