83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
142 lines
3.1 KiB
C
142 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2007
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*/
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#ifndef __ASM_ARM_ARCH_CLK_H__
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#define __ASM_ARM_ARCH_CLK_H__
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/global_data.h>
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#define GCK_CSS_SLOW_CLK 0
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#define GCK_CSS_MAIN_CLK 1
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#define GCK_CSS_PLLA_CLK 2
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#define GCK_CSS_UPLL_CLK 3
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#define GCK_CSS_MCK_CLK 4
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#define GCK_CSS_AUDIO_CLK 5
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#define AT91_UTMI_PLL_CLK_FREQ 480000000
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static inline unsigned long get_cpu_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->arch.cpu_clk_rate_hz;
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}
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static inline unsigned long get_main_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->arch.main_clk_rate_hz;
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}
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static inline unsigned long get_mck_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->arch.mck_rate_hz;
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}
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static inline unsigned long get_plla_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->arch.plla_rate_hz;
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}
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static inline unsigned long get_pllb_clk_rate(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->arch.pllb_rate_hz;
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}
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static inline u32 get_pllb_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->arch.at91_pllb_usb_init;
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}
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#ifdef CPU_HAS_H32MXDIV
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static inline unsigned int get_h32mxdiv(void)
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{
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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return readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV;
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}
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#else
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static inline unsigned int get_h32mxdiv(void)
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{
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return 0;
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}
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#endif
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static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
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{
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if (get_h32mxdiv())
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return get_mck_clk_rate() / 2;
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else
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return get_mck_clk_rate();
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}
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static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
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{
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if (get_h32mxdiv())
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return get_mck_clk_rate() / 2;
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else
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return get_mck_clk_rate();
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}
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static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
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{
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return get_mck_clk_rate();
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}
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static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
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{
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if (get_h32mxdiv())
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return get_mck_clk_rate() / 2;
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else
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return get_mck_clk_rate();
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}
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static inline unsigned long get_twi_clk_rate(unsigned int dev_id)
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{
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if (get_h32mxdiv())
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return get_mck_clk_rate() / 2;
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else
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return get_mck_clk_rate();
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}
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static inline unsigned long get_mci_clk_rate(void)
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{
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if (get_h32mxdiv())
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return get_mck_clk_rate() / 2;
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else
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return get_mck_clk_rate();
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}
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static inline unsigned long get_pit_clk_rate(void)
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{
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if (get_h32mxdiv())
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return get_mck_clk_rate() / 2;
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else
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return get_mck_clk_rate();
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}
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int at91_clock_init(unsigned long main_clock);
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void at91_periph_clk_enable(int id);
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void at91_periph_clk_disable(int id);
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int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div);
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u32 at91_get_periph_generated_clk(u32 id);
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void at91_system_clk_enable(int sys_clk);
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void at91_system_clk_disable(int sys_clk);
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int at91_upll_clk_enable(void);
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int at91_upll_clk_disable(void);
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void at91_usb_clk_init(u32 value);
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int at91_pllb_clk_enable(u32 pllbr);
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int at91_pllb_clk_disable(void);
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void at91_pllicpr_init(u32 icpr);
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#endif /* __ASM_ARM_ARCH_CLK_H__ */
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