u-boot/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
Vladimir Oltean 681adaa466 arm: dts: ls1028a-qds: declare in-band autoneg for Ethernet ports
The commit in the Fixes: tag below broke traffic through switch ports
where the SERDES protocol requires in-band autoneg and this requirement
isn't described in the device tree: SGMII, QSGMII, USXGMII (with
2500Base-X, in-band autoneg isn't supported).

The LS1028A-QDS boards are not yet ready for syncing their device trees
with Linux, since Ethernet is missing there (but has been submitted):
https://lore.kernel.org/lkml/20211112223457.10599-11-leoyang.li@nxp.com/

When agreement is reached for the Ethernet support in Linux, there will
be a sync for these boards as well. For now, just enable in-band autoneg
to fix the breakage.

Fixes: e3789a7262 ("net: dsa: felix: configure the in-band autoneg property based on OF node info")
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30

77 lines
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// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* NXP LS1028A-QDS device tree fragment for RCW 9999
*
* Copyright 2019-2021 NXP
*/
/*
* This setup is using SCH-24801 cards with VSC8234 quad SGMII PHY.
* LS1028A QDS boards with lane B rework require two cards for the 4 switch
* ports, QDS boards without the lane B rework only require one card.
*
* Switch ports are routed as follows:
* Port 0 goes to 1st port of VSC8234 quad card in slot 1,
* Port 1:
* - if the QDS has had lane B rework, it is 1st port in slot 2,
* - otherwise it is 2nd port in slot 1.
* Port 2:
* - if DIP SW5[1] = 0 it is 3rd port in slot 1,
* - otherwise it is 1st port in slot 3.
* Port 3:
* - if DIP SW5[2-3] = 00b it is 4th port in slot 1,
* - if DIP SW5[2-3] = 01b it is 2nd port in slot 3,
* - if DIP SW5[2-3] = 11b it is 1st port in slot 4.
*
* The following DTS assumes QDS lane B rework and DIP SW5[1-3] = 000b. Two
* SCH-24801 cards are required in slots 1 and 2.
*/
&slot1 {
#include "fsl-sch-24801.dtsi"
};
&slot2 {
#include "fsl-sch-24801.dtsi"
};
&enetc_port2 {
status = "okay";
};
&mscc_felix {
status = "okay";
};
&mscc_felix_port0 {
status = "okay";
managed = "in-band-status";
phy-mode = "sgmii";
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
};
&mscc_felix_port1 {
status = "okay";
managed = "in-band-status";
phy-mode = "sgmii";
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@1c}>;
};
&mscc_felix_port2 {
status = "okay";
managed = "in-band-status";
phy-mode = "sgmii";
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
};
&mscc_felix_port3 {
status = "okay";
managed = "in-band-status";
phy-mode = "sgmii";
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
};
&mscc_felix_port4 {
ethernet = <&enetc_port2>;
status = "okay";
};