1332a781e1
Xilinx is using standard mtd partition layout for quite a long time. It is used for testing purpose on evaluation boards. Also #address/size-cells shouldn't be present without nodes which should use them that's why move them from zynq-7000.dtsi to nand/nor nodes directly. The patch was tested on zc706 and zedboard(with also increasing max frequency and rx bus width). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4c3348981bba32d3892194420d78fe8621c47534.1698837725.git.michal.simek@amd.com
100 lines
1.4 KiB
Plaintext
100 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Xilinx ZC770 XM012 board DTS
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*
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* Copyright (C) 2013-2018 Xilinx, Inc.
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*/
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/dts-v1/;
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#include "zynq-7000.dtsi"
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/ {
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model = "Xilinx ZC770 XM012 board";
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compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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serial0 = &uart1;
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spi0 = &spi1;
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};
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chosen {
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bootargs = "";
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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};
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&can1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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eeprom0: eeprom@52 {
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compatible = "atmel,24c02";
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reg = <0x52>;
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};
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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eeprom1: eeprom@52 {
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compatible = "atmel,24c02";
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reg = <0x52>;
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};
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};
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&nor0 {
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status = "okay";
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bank-width = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "nor-fsbl-uboot";
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reg = <0x0 0x100000>;
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};
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partition@100000 {
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label = "nor-linux";
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reg = <0x100000 0x500000>;
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};
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partition@600000 {
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label = "nor-device-tree";
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reg = <0x600000 0x20000>;
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};
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partition@620000 {
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label = "nor-rootfs";
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reg = <0x620000 0x5e0000>;
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};
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partition@c00000 {
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label = "nor-bitstream";
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reg = <0xc00000 0x400000>;
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};
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};
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};
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&smcc {
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status = "okay";
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};
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&spi1 {
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status = "okay";
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num-cs = <4>;
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is-decoded-cs = <0>;
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};
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&uart1 {
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bootph-all;
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status = "okay";
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};
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