afdfcb11f9
Renesas RZ/N1 devices contain BootROM code that loads a custom SPKG image from QSPI, NAND or USB DFU. Support this format in mkimage tool. SPKGs can optionally be signed, however creation of signed SPKG is not currently supported. Example of how to use it: tools/mkimage -n board/schneider/rzn1-snarc/spkgimage.cfg \ -T spkgimage -a 0x20040000 -e 0x20040000 \ -d u-boot.bin u-boot.bin.spkg The config file (spkgimage.cfg in this example) contains additional parameters such as NAND ECC settings. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
88 lines
2.8 KiB
C
88 lines
2.8 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Renesas RZ/N1 Package Table format
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* (C) 2015-2016 Renesas Electronics Europe, LTD
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* All rights reserved.
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*
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* Converted to mkimage plug-in
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* (C) Copyright 2022 Schneider Electric
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*/
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#ifndef _SPKGIMAGE_H_
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#define _SPKGIMAGE_H_
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#ifdef __GNUC__
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#define __packed __attribute((packed))
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#else
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#define __packed
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#endif
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#define SPKG_HEADER_MARKER {'R', 'Z', 'N', '1'}
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#define SPKG_HEADER_SIZE 24
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#define SPKG_HEADER_COUNT 8
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#define SPKG_BLP_SIZE 264
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#define SPKG_CRC_SIZE 4
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/**
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* struct spkg_hdr - SPKG header
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* @marker: magic pattern "RZN1"
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* @version: header version (currently 1)
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* @ecc: ECC enable and block size.
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* @ecc_scheme: ECC algorithm selction
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* @ecc_bytes: ECC bytes per block
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* @payload_length: length of the payload (including CRC)
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* @load_address: address in memory where payload should be loaded
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* @execution_offset: offset from @load_address where execution starts
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* @crc: 32-bit CRC of the above header fields
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*
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* SPKG header format is defined by Renesas. It is documented in the Reneasas
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* RZ/N1 User Manual, Chapter 7.4 ("SPKG format").
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*
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* The BootROM searches this header in order to find and validate the boot
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* payload. It is therefore mandatory to wrap the payload in this header.
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*
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* The ECC-related fields @ecc @ecc_scheme @ecc_bytes are used only when
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* booting from NAND flash, and they are only used while fetching the payload.
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* These values are used to initialize the ECC controller. To avoid using
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* non-portable bitfields, struct spkg_hdr uses uint8_t for these fields, so
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* the user must shift the values into the correct spot.
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*
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* The payload will be loaded into memory at @payload_address.
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* Execution then jumps to @payload_address + @execution_offset.
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* The LSB of @execution_offset selects between ARM and Thumb mode,
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* as per the usual ARM interworking convention.
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*/
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struct spkg_hdr {
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uint8_t marker[4]; /* aka magic */
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uint8_t version;
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uint8_t ecc;
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uint8_t ecc_scheme;
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uint8_t ecc_bytes;
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uint32_t payload_length; /* only HIGHER 24 bits */
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uint32_t load_address;
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uint32_t execution_offset;
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uint32_t crc; /* of this header */
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} __packed;
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/**
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* struct spkg_file - complete SPKG image
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*
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* A SPKG image consists of 8 identical copies of struct spkg_hdr, each one
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* occupying 24 bytes, for a total of 192 bytes.
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*
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* This is followed by the payload (the u-boot binary), and a 32-bit CRC.
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*
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* Optionally, the payload can be being with security header ("BLp_header").
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* This feature is not currently supported in mkimage.
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*
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* The payload is typically padded with 0xFF bytes so as to bring the total
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* image size to a multiple of the flash erase size (often 64kB).
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*/
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struct spkg_file {
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struct spkg_hdr header[SPKG_HEADER_COUNT];
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uint8_t payload[0];
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/* then the CRC */
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} __packed;
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#endif
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