08cfa971a7
The sysreset uclass unconditionally provides a definition of the
reset_cpu() function. So does the exynos soc code. Fix the build with
SYSRESET enabled by omitting the function from the soc code in that
case. The code still needs to be kept around for use in SPL.
This commit was inspired by commit 6e19dc84c1 ("sunxi: Avoid duplicate
reset_cpu with SYSRESET enabled").
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
40 lines
912 B
C
40 lines
912 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2010 Samsung Electronics.
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* Minkyu Kang <mk7.kang@samsung.com>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <asm/cache.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/arch/cpu.h>
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#ifdef CONFIG_TARGET_ESPRESSO7420
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/*
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* Exynos7420 uses CPU0 of Cluster-1 as boot CPU. Due to this, branch_if_master
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* fails to identify as the boot CPU as the master CPU. As temporary workaround,
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* setup the slave CPU boot address as "_main".
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*/
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extern void _main(void);
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void *secondary_boot_addr = (void *)_main;
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#endif /* CONFIG_TARGET_ESPRESSO7420 */
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#if !CONFIG_IS_ENABLED(SYSRESET)
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void reset_cpu(void)
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{
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#ifdef CONFIG_CPU_V7A
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writel(0x1, samsung_get_base_swreset());
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#endif
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}
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#endif
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#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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dcache_enable();
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}
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#endif
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