The LPCXpresso family of boards provides a powerful and flexible development system for NXP®'s Cortex-M MCUs The LPCXpresso family of boards provides a powerful and flexible development system for NXP®'s Cortex-M MCUs. The lpcxpresso54102 board has been developed by NXP to enable evaluation of and prototyping with the LPC54100 family of MCUs and its low power features make it as easy as possible to get started with your project. LPCXpresso™ is a low-cost development platform available from NXP supporting NXP's ARM-based microcontrollers. The platform is comprised of a simplified Eclipse-based IDE and low-cost target boards which include an attached JTAG debugger. LPCXpresso is an end-to-end solution enabling embedded engineers to develop their applications from initial evaluation to final production. The LPC5410x are ARM Cortex-M4 based microcontrollers for embedded applications. The LPC5410x are ARM Cortex-M4 based microcontrollers for embedded applications. These devices include an ARM Cortex-M0+ coprocessor, up to 104 KB of on-chip SRAM, up to 512 KB on-chip flash, five general-purpose timers, one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), 3 USART, 2 SPI, and 3 I2C interface, and one 12-bit 5.0 Msamples/sec ADC. The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point unit is integrated in the core. The ARM Cortex-M0+ coprocessor is an energy-efficient and easy-to-use 32-bit core which is code and tool-compatible with the Cortex-M4 core. The Cortex-M0+ coprocessor offers up to 100 MHz performance with a simple instruction set and reduced code size.