96 lines
3.0 KiB
C
96 lines
3.0 KiB
C
/*
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** ###################################################################
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** Processors: LPC54102J256BD64_cm0plus
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** LPC54102J256UK49_cm0plus
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** LPC54102J512BD64_cm0plus
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** LPC54102J512UK49_cm0plus
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**
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** Compilers: Keil ARM C/C++ Compiler
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** IAR ANSI C/C++ Compiler for ARM
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** MCUXpresso Compiler
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**
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** Reference manual: LPC5410x User manual Rev. 2.4 25 May 2016
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** Version: rev. 1.0, 2016-04-29
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** Build: b180802
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**
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** Abstract:
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** Provides a system configuration function and a global variable that
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** contains the system frequency. It configures the device and initializes
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** the oscillator (PLL) that is part of the microcontroller device.
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**
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2018 NXP
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**
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 1.0 (2016-04-29)
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** Initial version.
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**
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** ###################################################################
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*/
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/*!
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* @file LPC54102_cm0plus
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* @version 1.0
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* @date 2016-04-29
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* @brief Device specific configuration file for LPC54102_cm0plus
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* (implementation file)
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*
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* Provides a system configuration function and a global variable that contains
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* the system frequency. It configures the device and initializes the oscillator
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* (PLL) that is part of the microcontroller device.
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*/
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#include <stdint.h>
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#include "fsl_device_registers.h"
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/* ----------------------------------------------------------------------------
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-- Core clock
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---------------------------------------------------------------------------- */
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uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
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/* ----------------------------------------------------------------------------
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-- SystemInit()
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---------------------------------------------------------------------------- */
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void SystemInit (void) {
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#if defined(__CODE_RED)
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extern void(*const g_pfnVectors[]) (void);
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SCB->VTOR = (uint32_t) &g_pfnVectors;
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#else
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extern void *__Vectors;
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SCB->VTOR = (uint32_t) &__Vectors;
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#endif
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/* Optionally enable RAM banks that may be off by default at reset */
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#if !defined (DONT_ENABLE_DISABLED_RAMBANKS)
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SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL_SRAM2_MASK;
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#endif
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SystemInitHook();
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}
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/* ----------------------------------------------------------------------------
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-- SystemCoreClockUpdate()
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---------------------------------------------------------------------------- */
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void SystemCoreClockUpdate (void) {
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}
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/* ----------------------------------------------------------------------------
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-- SystemInitHook()
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---------------------------------------------------------------------------- */
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__attribute__ ((weak)) void SystemInitHook (void) {
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/* Void implementation of the weak function. */
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}
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