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1156 lines
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 <span id="projectnumber">Rev 2.11.0</span>
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<a href="#define-members">Macros</a> |
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<a href="#var-members">Variables</a> </div>
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<div class="title">SPI Driver<div class="ingroups"><a class="el" href="a00185.html">SPI: Serial Peripheral Interface Driver</a></div></div> </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
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<p>This section describes the programming interface of the SPI DMA driver. </p>
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<table class="memberdecls">
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Files</h2></td></tr>
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<tr class="memitem:a00111"><td class="memItemLeft" align="right" valign="top">file  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00111.html">fsl_spi.h</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
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<tr class="memitem:a00308"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a00308">spi_delay_config_t</a></td></tr>
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<tr class="memdesc:a00308"><td class="mdescLeft"> </td><td class="mdescRight">SPI delay time configure structure. <a href="a00043.html#a00308">More...</a><br/></td></tr>
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<tr class="separator:a00308"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00310"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a00310">spi_master_config_t</a></td></tr>
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<tr class="memdesc:a00310"><td class="mdescLeft"> </td><td class="mdescRight">SPI master user configure structure. <a href="a00043.html#a00310">More...</a><br/></td></tr>
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<tr class="separator:a00310"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00312"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a00312">spi_slave_config_t</a></td></tr>
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<tr class="memdesc:a00312"><td class="mdescLeft"> </td><td class="mdescRight">SPI slave user configure structure. <a href="a00043.html#a00312">More...</a><br/></td></tr>
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<tr class="separator:a00312"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00313"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a00313">spi_transfer_t</a></td></tr>
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<tr class="memdesc:a00313"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer structure. <a href="a00043.html#a00313">More...</a><br/></td></tr>
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<tr class="separator:a00313"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00309"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a00309">spi_half_duplex_transfer_t</a></td></tr>
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<tr class="memdesc:a00309"><td class="mdescLeft"> </td><td class="mdescRight">SPI half-duplex(master only) transfer structure. <a href="a00043.html#a00309">More...</a><br/></td></tr>
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<tr class="separator:a00309"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00307"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a00307">spi_config_t</a></td></tr>
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<tr class="memdesc:a00307"><td class="mdescLeft"> </td><td class="mdescRight">Internal configuration structure used in 'spi' and 'spi_dma' driver. <a href="a00043.html#a00307">More...</a><br/></td></tr>
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<tr class="separator:a00307"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00228"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a00228">spi_master_handle_t</a></td></tr>
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<tr class="memdesc:a00228"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer handle structure. <a href="a00043.html#a00228">More...</a><br/></td></tr>
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<tr class="separator:a00228"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga1541129ba8262e1649592b5109e2074c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga1541129ba8262e1649592b5109e2074c">SPI_DUMMYDATA</a>   (0xFFU)</td></tr>
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<tr class="memdesc:ga1541129ba8262e1649592b5109e2074c"><td class="mdescLeft"> </td><td class="mdescRight">SPI dummy transfer data, the data is sent while txBuff is NULL. <a href="#ga1541129ba8262e1649592b5109e2074c">More...</a><br/></td></tr>
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<tr class="separator:ga1541129ba8262e1649592b5109e2074c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa4717c15ca9604c505a5e5c60df29ebe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gaa4717c15ca9604c505a5e5c60df29ebe">SPI_RETRY_TIMES</a>   0U /* Define to zero means keep waiting until the flag is assert/deassert. */</td></tr>
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<tr class="memdesc:gaa4717c15ca9604c505a5e5c60df29ebe"><td class="mdescLeft"> </td><td class="mdescRight">Retry times for waiting flag. <a href="#gaa4717c15ca9604c505a5e5c60df29ebe">More...</a><br/></td></tr>
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<tr class="separator:gaa4717c15ca9604c505a5e5c60df29ebe"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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Typedefs</h2></td></tr>
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<tr class="memitem:gad267cfee3a876b2860217ff94f03f574"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad267cfee3a876b2860217ff94f03f574"></a>
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typedef spi_master_handle_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a></td></tr>
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<tr class="memdesc:gad267cfee3a876b2860217ff94f03f574"><td class="mdescLeft"> </td><td class="mdescRight">Slave handle type. <br/></td></tr>
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<tr class="separator:gad267cfee3a876b2860217ff94f03f574"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9bd140aeb645efab6c7552b3994e01a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae9bd140aeb645efab6c7552b3994e01a"></a>
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typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gae9bd140aeb645efab6c7552b3994e01a">spi_master_callback_t</a> )(SPI_Type *base, spi_master_handle_t *handle, <a class="el" href="a00178.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> status, void *userData)</td></tr>
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<tr class="memdesc:gae9bd140aeb645efab6c7552b3994e01a"><td class="mdescLeft"> </td><td class="mdescRight">SPI master callback for finished transmit. <br/></td></tr>
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<tr class="separator:gae9bd140aeb645efab6c7552b3994e01a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga86b45b85e036adc762eed5bcd2a0491d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86b45b85e036adc762eed5bcd2a0491d"></a>
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typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga86b45b85e036adc762eed5bcd2a0491d">spi_slave_callback_t</a> )(SPI_Type *base, <a class="el" href="a00043.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a> *handle, <a class="el" href="a00178.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> status, void *userData)</td></tr>
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<tr class="memdesc:ga86b45b85e036adc762eed5bcd2a0491d"><td class="mdescLeft"> </td><td class="mdescRight">SPI slave callback for finished transmit. <br/></td></tr>
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<tr class="separator:ga86b45b85e036adc762eed5bcd2a0491d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c61065c015d5b1c3247cf979238d434"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga2c61065c015d5b1c3247cf979238d434">flexcomm_spi_master_irq_handler_t</a> )(SPI_Type *base, spi_master_handle_t *handle)</td></tr>
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<tr class="memdesc:ga2c61065c015d5b1c3247cf979238d434"><td class="mdescLeft"> </td><td class="mdescRight">Typedef for master interrupt handler. <a href="#ga2c61065c015d5b1c3247cf979238d434">More...</a><br/></td></tr>
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<tr class="separator:ga2c61065c015d5b1c3247cf979238d434"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae305531ff5562d2c51423f85032942ae"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gae305531ff5562d2c51423f85032942ae">flexcomm_spi_slave_irq_handler_t</a> )(SPI_Type *base, <a class="el" href="a00043.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a> *handle)</td></tr>
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<tr class="memdesc:gae305531ff5562d2c51423f85032942ae"><td class="mdescLeft"> </td><td class="mdescRight">Typedef for slave interrupt handler. <a href="#gae305531ff5562d2c51423f85032942ae">More...</a><br/></td></tr>
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<tr class="separator:gae305531ff5562d2c51423f85032942ae"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
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Enumerations</h2></td></tr>
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<tr class="memitem:ga632c5d421df2f4ef489e8a56e8545408"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga632c5d421df2f4ef489e8a56e8545408">spi_xfer_option_t</a> { <br/>
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  <a class="el" href="a00043.html#gga632c5d421df2f4ef489e8a56e8545408a368ad1fd03f7af182af9a61c7f4967ed">kSPI_FrameDelay</a> = (SPI_FIFOWR_EOF_MASK),
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<br/>
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  <a class="el" href="a00043.html#gga632c5d421df2f4ef489e8a56e8545408adbcf2b399fc2e5f1ad5c2586117a1ae9">kSPI_FrameAssert</a> = (SPI_FIFOWR_EOT_MASK)
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<br/>
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}</td></tr>
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<tr class="memdesc:ga632c5d421df2f4ef489e8a56e8545408"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer option. <a href="a00043.html#ga632c5d421df2f4ef489e8a56e8545408">More...</a><br/></td></tr>
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<tr class="separator:ga632c5d421df2f4ef489e8a56e8545408"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa68518c16202382c2e1f1c7c66a9d53d"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gaa68518c16202382c2e1f1c7c66a9d53d">spi_shift_direction_t</a> { <br/>
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  <a class="el" href="a00043.html#ggaa68518c16202382c2e1f1c7c66a9d53dae7b997e8cff761aab865cbd42c4c3989">kSPI_MsbFirst</a> = 0U,
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<br/>
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  <a class="el" href="a00043.html#ggaa68518c16202382c2e1f1c7c66a9d53da20ac53684c3e1ad338553cecbfab94a9">kSPI_LsbFirst</a> = 1U
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<br/>
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}</td></tr>
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<tr class="memdesc:gaa68518c16202382c2e1f1c7c66a9d53d"><td class="mdescLeft"> </td><td class="mdescRight">SPI data shifter direction options. <a href="a00043.html#gaa68518c16202382c2e1f1c7c66a9d53d">More...</a><br/></td></tr>
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<tr class="separator:gaa68518c16202382c2e1f1c7c66a9d53d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3e5a7cd043c9596779bc23b34cb3d1f9"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga3e5a7cd043c9596779bc23b34cb3d1f9">spi_clock_polarity_t</a> { <br/>
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  <a class="el" href="a00043.html#gga3e5a7cd043c9596779bc23b34cb3d1f9a031c0ee2693cf1fd621e8b8cba676629">kSPI_ClockPolarityActiveHigh</a> = 0x0U,
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<br/>
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  <a class="el" href="a00043.html#gga3e5a7cd043c9596779bc23b34cb3d1f9acfc8257079c9604086622df6de326aea">kSPI_ClockPolarityActiveLow</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga3e5a7cd043c9596779bc23b34cb3d1f9"><td class="mdescLeft"> </td><td class="mdescRight">SPI clock polarity configuration. <a href="a00043.html#ga3e5a7cd043c9596779bc23b34cb3d1f9">More...</a><br/></td></tr>
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<tr class="separator:ga3e5a7cd043c9596779bc23b34cb3d1f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ad313685ade497f5cbcb71c74a1b4dc"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga9ad313685ade497f5cbcb71c74a1b4dc">spi_clock_phase_t</a> { <br/>
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  <a class="el" href="a00043.html#gga9ad313685ade497f5cbcb71c74a1b4dcad15d61c6fd642f13101edbf401d0c72e">kSPI_ClockPhaseFirstEdge</a> = 0x0U,
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  <a class="el" href="a00043.html#gga9ad313685ade497f5cbcb71c74a1b4dca18a98985c1f7dd56175e4a2724db3675">kSPI_ClockPhaseSecondEdge</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga9ad313685ade497f5cbcb71c74a1b4dc"><td class="mdescLeft"> </td><td class="mdescRight">SPI clock phase configuration. <a href="a00043.html#ga9ad313685ade497f5cbcb71c74a1b4dc">More...</a><br/></td></tr>
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<tr class="separator:ga9ad313685ade497f5cbcb71c74a1b4dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a479127a2051ded7945115657adc162"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga9a479127a2051ded7945115657adc162">spi_txfifo_watermark_t</a> { <br/>
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162ab00ed44c27cc2f5c8be6a37a7e54bbb0">kSPI_TxFifo0</a> = 0,
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162ad84aa8fe681fb1922108dd71035a1e7a">kSPI_TxFifo1</a> = 1,
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162af0f35b4313810fb0a721f6d0c96e361d">kSPI_TxFifo2</a> = 2,
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<br/>
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162a583e03e419cab47b3a257f39a96f9098">kSPI_TxFifo3</a> = 3,
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162add72390240691eb878a8bc236b0ae0f1">kSPI_TxFifo4</a> = 4,
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162a2d97d5d6a34b441ebdd1a5dcf9cd0d49">kSPI_TxFifo5</a> = 5,
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162a50675672a2887ec04a4a2d11c183958b">kSPI_TxFifo6</a> = 6,
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  <a class="el" href="a00043.html#gga9a479127a2051ded7945115657adc162a4f8e84453e704f97a592944ff3dc5c50">kSPI_TxFifo7</a> = 7
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<br/>
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}</td></tr>
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<tr class="memdesc:ga9a479127a2051ded7945115657adc162"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark values <a href="a00043.html#ga9a479127a2051ded7945115657adc162">More...</a><br/></td></tr>
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<tr class="separator:ga9a479127a2051ded7945115657adc162"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79f862820ec2bcbb8184ce9de72949a6"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga79f862820ec2bcbb8184ce9de72949a6">spi_rxfifo_watermark_t</a> { <br/>
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6a2d49ceb52f1bf6c51e2514b35e5d9804">kSPI_RxFifo1</a> = 0,
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<br/>
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6a90eb93fdd80d4baf71ff3d75d4df2454">kSPI_RxFifo2</a> = 1,
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6ab27946413b575e3dd27e0a37c8ccb17b">kSPI_RxFifo3</a> = 2,
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6af6dcb50b13a1d8208d1d977ce79ff662">kSPI_RxFifo4</a> = 3,
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<br/>
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6a2c961e2e2c24014368dfe867d2295f3d">kSPI_RxFifo5</a> = 4,
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<br/>
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6ad8bce70560016fbd76c7e1a9e5a2369f">kSPI_RxFifo6</a> = 5,
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6a24b9a255d74d6a5b47d59b82717586dc">kSPI_RxFifo7</a> = 6,
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  <a class="el" href="a00043.html#gga79f862820ec2bcbb8184ce9de72949a6aba4452e3c770cac6e822a0f85e2b53f3">kSPI_RxFifo8</a> = 7
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<br/>
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}</td></tr>
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<tr class="memdesc:ga79f862820ec2bcbb8184ce9de72949a6"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark values <a href="a00043.html#ga79f862820ec2bcbb8184ce9de72949a6">More...</a><br/></td></tr>
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<tr class="separator:ga79f862820ec2bcbb8184ce9de72949a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafa691c5329a7325ee57c9f06fa295731"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gafa691c5329a7325ee57c9f06fa295731">spi_data_width_t</a> { <br/>
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731a0cb8b30c67c53c6d53712d5bacc818ce">kSPI_Data4Bits</a> = 3,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731a7232b4afb5bd82503252ce608638e6eb">kSPI_Data5Bits</a> = 4,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731a6604fcf5c8bebf904c5b072295027bba">kSPI_Data6Bits</a> = 5,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731a2c62d3d7d92866c97bb513d4e603518e">kSPI_Data7Bits</a> = 6,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731ad6b98474a7f14ae7665b7b6d3355657c">kSPI_Data8Bits</a> = 7,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731a4b864a74545165c2cf2dd74134fdadd1">kSPI_Data9Bits</a> = 8,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731a2b2887663c9d025a4137263fc7984024">kSPI_Data10Bits</a> = 9,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731a91e908a7a4725ab9df05549a2b034dec">kSPI_Data11Bits</a> = 10,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731ad1cfe18fd912c0d25dc32e6ca9fa8f97">kSPI_Data12Bits</a> = 11,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731ad8c2fa2e2f5bf137176dc736cc6a2531">kSPI_Data13Bits</a> = 12,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731ae83435f494d1b9f3ce2f2da0ac03fc38">kSPI_Data14Bits</a> = 13,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731add11012a8887066fad29e23c20d66af8">kSPI_Data15Bits</a> = 14,
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  <a class="el" href="a00043.html#ggafa691c5329a7325ee57c9f06fa295731abbc2566ba4eb2b5e5dc259a7c4f80bcf">kSPI_Data16Bits</a> = 15
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}</td></tr>
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<tr class="memdesc:gafa691c5329a7325ee57c9f06fa295731"><td class="mdescLeft"> </td><td class="mdescRight">Transfer data width. <a href="a00043.html#gafa691c5329a7325ee57c9f06fa295731">More...</a><br/></td></tr>
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<tr class="separator:gafa691c5329a7325ee57c9f06fa295731"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga420a3d3f841957068648585b89fa66d1"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga420a3d3f841957068648585b89fa66d1">spi_ssel_t</a> { <br/>
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  <a class="el" href="a00043.html#gga420a3d3f841957068648585b89fa66d1aba6e24e125d6e2623fdf66179d8d3595">kSPI_Ssel0</a> = 0,
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  <a class="el" href="a00043.html#gga420a3d3f841957068648585b89fa66d1a6a919364d43781f9da7c826c53008863">kSPI_Ssel1</a> = 1,
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  <a class="el" href="a00043.html#gga420a3d3f841957068648585b89fa66d1a42cddec913f2774241d7d962143e1588">kSPI_Ssel2</a> = 2,
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  <a class="el" href="a00043.html#gga420a3d3f841957068648585b89fa66d1a242faca0999052891ca8ed24a116e466">kSPI_Ssel3</a> = 3
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<br/>
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}</td></tr>
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<tr class="memdesc:ga420a3d3f841957068648585b89fa66d1"><td class="mdescLeft"> </td><td class="mdescRight">Slave select. <a href="a00043.html#ga420a3d3f841957068648585b89fa66d1">More...</a><br/></td></tr>
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<tr class="separator:ga420a3d3f841957068648585b89fa66d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafd7e7bd8e060742346806ed8c8f1db4c"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gafd7e7bd8e060742346806ed8c8f1db4c">spi_spol_t</a> </td></tr>
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<tr class="memdesc:gafd7e7bd8e060742346806ed8c8f1db4c"><td class="mdescLeft"> </td><td class="mdescRight">ssel polarity <br/></td></tr>
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<tr class="separator:gafd7e7bd8e060742346806ed8c8f1db4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga61dadd085c1777f559549e05962b2c9e"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00043.html#gga61dadd085c1777f559549e05962b2c9ea703abdf7900047c4d13536480f3463ab">kStatus_SPI_Busy</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 0),
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  <a class="el" href="a00043.html#gga61dadd085c1777f559549e05962b2c9ea4e32c5b06dccaf4b81e2fd1679e1b560">kStatus_SPI_Idle</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 1),
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<br/>
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  <a class="el" href="a00043.html#gga61dadd085c1777f559549e05962b2c9ea2ff91d774e93aed936b87ffaa18aaf9e">kStatus_SPI_Error</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 2),
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<br/>
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  <a class="el" href="a00043.html#gga61dadd085c1777f559549e05962b2c9eab0f4d4de5f92524c9d33524f22a04e03">kStatus_SPI_BaudrateNotSupport</a>,
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<br/>
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  <a class="el" href="a00043.html#gga61dadd085c1777f559549e05962b2c9ea496ced6fffc33d7bbeb01d203dfc4836">kStatus_SPI_Timeout</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 4)
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<br/>
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}</td></tr>
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<tr class="memdesc:ga61dadd085c1777f559549e05962b2c9e"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer status. <a href="a00043.html#ga61dadd085c1777f559549e05962b2c9e">More...</a><br/></td></tr>
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<tr class="separator:ga61dadd085c1777f559549e05962b2c9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaedd690a0f91a0a9eb0fd573b57e31f67"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gaedd690a0f91a0a9eb0fd573b57e31f67">_spi_interrupt_enable</a> { <br/>
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  <a class="el" href="a00043.html#ggaedd690a0f91a0a9eb0fd573b57e31f67a81a10bf611827929fcf8eed0468aea7a">kSPI_RxLvlIrq</a> = SPI_FIFOINTENSET_RXLVL_MASK,
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  <a class="el" href="a00043.html#ggaedd690a0f91a0a9eb0fd573b57e31f67a13d4e9159c4ba5d49adef5e7e5f5b1dd">kSPI_TxLvlIrq</a> = SPI_FIFOINTENSET_TXLVL_MASK
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<br/>
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}</td></tr>
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<tr class="memdesc:gaedd690a0f91a0a9eb0fd573b57e31f67"><td class="mdescLeft"> </td><td class="mdescRight">SPI interrupt sources. <a href="a00043.html#gaedd690a0f91a0a9eb0fd573b57e31f67">More...</a><br/></td></tr>
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<tr class="separator:gaedd690a0f91a0a9eb0fd573b57e31f67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga88b3958a041355f297213b5c407dded2"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga88b3958a041355f297213b5c407dded2">_spi_statusflags</a> { <br/>
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  <a class="el" href="a00043.html#gga88b3958a041355f297213b5c407dded2a243d09d83665d0ab9deefcb8e14ea1ae">kSPI_TxEmptyFlag</a> = SPI_FIFOSTAT_TXEMPTY_MASK,
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  <a class="el" href="a00043.html#gga88b3958a041355f297213b5c407dded2a3892d0ae82fadd910932410fb86b0415">kSPI_TxNotFullFlag</a> = SPI_FIFOSTAT_TXNOTFULL_MASK,
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  <a class="el" href="a00043.html#gga88b3958a041355f297213b5c407dded2a5dffa125a4a171d539f4d1df9abf6e8a">kSPI_RxNotEmptyFlag</a> = SPI_FIFOSTAT_RXNOTEMPTY_MASK,
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  <a class="el" href="a00043.html#gga88b3958a041355f297213b5c407dded2a24187382b09195b069e487ed1e29cbcd">kSPI_RxFullFlag</a> = SPI_FIFOSTAT_RXFULL_MASK
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}</td></tr>
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<tr class="memdesc:ga88b3958a041355f297213b5c407dded2"><td class="mdescLeft"> </td><td class="mdescRight">SPI status flags. <a href="a00043.html#ga88b3958a041355f297213b5c407dded2">More...</a><br/></td></tr>
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<tr class="separator:ga88b3958a041355f297213b5c407dded2"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
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Variables</h2></td></tr>
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<tr class="memitem:ga9d35e904f2864488f65fddcfb5277f44"><td class="memItemLeft" align="right" valign="top">volatile uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ga9d35e904f2864488f65fddcfb5277f44">s_dummyData</a> []</td></tr>
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<tr class="memdesc:ga9d35e904f2864488f65fddcfb5277f44"><td class="mdescLeft"> </td><td class="mdescRight">Global variable for dummy data value setting. <a href="#ga9d35e904f2864488f65fddcfb5277f44">More...</a><br/></td></tr>
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<tr class="separator:ga9d35e904f2864488f65fddcfb5277f44"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Driver version</h2></td></tr>
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<tr class="memitem:gaeb6046de02dffe9248de71332fac246e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#gaeb6046de02dffe9248de71332fac246e">FSL_SPI_DRIVER_VERSION</a>   (<a class="el" href="a00017.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 2, 1))</td></tr>
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<tr class="memdesc:gaeb6046de02dffe9248de71332fac246e"><td class="mdescLeft"> </td><td class="mdescRight">SPI driver version. <a href="#gaeb6046de02dffe9248de71332fac246e">More...</a><br/></td></tr>
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<tr class="separator:gaeb6046de02dffe9248de71332fac246e"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<hr/><h2 class="groupheader">Data Structure Documentation</h2>
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<a name="a00308" id="a00308"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<td class="memname">struct spi_delay_config_t</td>
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</div><div class="memdoc">
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<div class="textblock"><p>Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15. </p>
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</div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a24a2584817f03d1ace0a6cecc718bc09"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a24a2584817f03d1ace0a6cecc718bc09">preDelay</a></td></tr>
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<tr class="memdesc:a24a2584817f03d1ace0a6cecc718bc09"><td class="mdescLeft"> </td><td class="mdescRight">Delay between SSEL assertion and the beginning of transfer. <a href="#a24a2584817f03d1ace0a6cecc718bc09">More...</a><br/></td></tr>
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<tr class="separator:a24a2584817f03d1ace0a6cecc718bc09"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a960b87887e431dabbb5641109cb56d90"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a960b87887e431dabbb5641109cb56d90">postDelay</a></td></tr>
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<tr class="memdesc:a960b87887e431dabbb5641109cb56d90"><td class="mdescLeft"> </td><td class="mdescRight">Delay between the end of transfer and SSEL deassertion. <a href="#a960b87887e431dabbb5641109cb56d90">More...</a><br/></td></tr>
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<tr class="separator:a960b87887e431dabbb5641109cb56d90"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9609e5c510bf5d0c120a403ed40aed42"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a9609e5c510bf5d0c120a403ed40aed42">frameDelay</a></td></tr>
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<tr class="memdesc:a9609e5c510bf5d0c120a403ed40aed42"><td class="mdescLeft"> </td><td class="mdescRight">Delay between frame to frame. <a href="#a9609e5c510bf5d0c120a403ed40aed42">More...</a><br/></td></tr>
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<tr class="separator:a9609e5c510bf5d0c120a403ed40aed42"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7ea0733fc746e2bafe1c0999db7d4804"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a7ea0733fc746e2bafe1c0999db7d4804">transferDelay</a></td></tr>
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<tr class="memdesc:a7ea0733fc746e2bafe1c0999db7d4804"><td class="mdescLeft"> </td><td class="mdescRight">Delay between transfer to transfer. <a href="#a7ea0733fc746e2bafe1c0999db7d4804">More...</a><br/></td></tr>
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<tr class="separator:a7ea0733fc746e2bafe1c0999db7d4804"><td class="memSeparator" colspan="2"> </td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a24a2584817f03d1ace0a6cecc718bc09"></a>
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<td class="memname">uint8_t spi_delay_config_t::preDelay</td>
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</div><div class="memdoc">
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<td class="memname">uint8_t spi_delay_config_t::postDelay</td>
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</div><div class="memdoc">
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<a class="anchor" id="a9609e5c510bf5d0c120a403ed40aed42"></a>
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<td class="memname">uint8_t spi_delay_config_t::frameDelay</td>
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</table>
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</div><div class="memdoc">
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</div>
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<a class="anchor" id="a7ea0733fc746e2bafe1c0999db7d4804"></a>
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<td class="memname">uint8_t spi_delay_config_t::transferDelay</td>
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</div><div class="memdoc">
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<a name="a00310" id="a00310"></a>
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<td class="memname">struct spi_master_config_t</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a384bc00ef4cd5b4e9cb6a4d48ec336bd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a384bc00ef4cd5b4e9cb6a4d48ec336bd"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a384bc00ef4cd5b4e9cb6a4d48ec336bd">enableLoopback</a></td></tr>
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<tr class="memdesc:a384bc00ef4cd5b4e9cb6a4d48ec336bd"><td class="mdescLeft"> </td><td class="mdescRight">Enable loopback for test purpose. <br/></td></tr>
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<tr class="separator:a384bc00ef4cd5b4e9cb6a4d48ec336bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa033bd20cfbb1a14f0fd43f4b31bb27e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aa033bd20cfbb1a14f0fd43f4b31bb27e"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#aa033bd20cfbb1a14f0fd43f4b31bb27e">enableMaster</a></td></tr>
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<tr class="memdesc:aa033bd20cfbb1a14f0fd43f4b31bb27e"><td class="mdescLeft"> </td><td class="mdescRight">Enable SPI at initialization time. <br/></td></tr>
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<tr class="separator:aa033bd20cfbb1a14f0fd43f4b31bb27e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac8d9a8c7a526b96cbe3105d6e06b1cce"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac8d9a8c7a526b96cbe3105d6e06b1cce"></a>
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<a class="el" href="a00043.html#ga3e5a7cd043c9596779bc23b34cb3d1f9">spi_clock_polarity_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ac8d9a8c7a526b96cbe3105d6e06b1cce">polarity</a></td></tr>
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<tr class="memdesc:ac8d9a8c7a526b96cbe3105d6e06b1cce"><td class="mdescLeft"> </td><td class="mdescRight">Clock polarity. <br/></td></tr>
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<tr class="separator:ac8d9a8c7a526b96cbe3105d6e06b1cce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a21b6f74dbeb89a81460cd618b7da042b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a21b6f74dbeb89a81460cd618b7da042b"></a>
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<a class="el" href="a00043.html#ga9ad313685ade497f5cbcb71c74a1b4dc">spi_clock_phase_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a21b6f74dbeb89a81460cd618b7da042b">phase</a></td></tr>
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<tr class="memdesc:a21b6f74dbeb89a81460cd618b7da042b"><td class="mdescLeft"> </td><td class="mdescRight">Clock phase. <br/></td></tr>
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<tr class="separator:a21b6f74dbeb89a81460cd618b7da042b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aace9261acfad8526f3d5b0b59346629a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aace9261acfad8526f3d5b0b59346629a"></a>
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<a class="el" href="a00043.html#gaa68518c16202382c2e1f1c7c66a9d53d">spi_shift_direction_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#aace9261acfad8526f3d5b0b59346629a">direction</a></td></tr>
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<tr class="memdesc:aace9261acfad8526f3d5b0b59346629a"><td class="mdescLeft"> </td><td class="mdescRight">MSB or LSB. <br/></td></tr>
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<tr class="separator:aace9261acfad8526f3d5b0b59346629a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae7695987e044d80983fd98a43812b1ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae7695987e044d80983fd98a43812b1ea"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ae7695987e044d80983fd98a43812b1ea">baudRate_Bps</a></td></tr>
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<tr class="memdesc:ae7695987e044d80983fd98a43812b1ea"><td class="mdescLeft"> </td><td class="mdescRight">Baud Rate for SPI in Hz. <br/></td></tr>
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<tr class="separator:ae7695987e044d80983fd98a43812b1ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abd75f6a0a3d5a102c0f3239df709b3a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="abd75f6a0a3d5a102c0f3239df709b3a5"></a>
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<a class="el" href="a00043.html#gafa691c5329a7325ee57c9f06fa295731">spi_data_width_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#abd75f6a0a3d5a102c0f3239df709b3a5">dataWidth</a></td></tr>
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<tr class="memdesc:abd75f6a0a3d5a102c0f3239df709b3a5"><td class="mdescLeft"> </td><td class="mdescRight">Width of the data. <br/></td></tr>
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<tr class="separator:abd75f6a0a3d5a102c0f3239df709b3a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af1b1d0e86acdcb17ddf8bce7bfbb39b3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af1b1d0e86acdcb17ddf8bce7bfbb39b3"></a>
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<a class="el" href="a00043.html#ga420a3d3f841957068648585b89fa66d1">spi_ssel_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#af1b1d0e86acdcb17ddf8bce7bfbb39b3">sselNum</a></td></tr>
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<tr class="memdesc:af1b1d0e86acdcb17ddf8bce7bfbb39b3"><td class="mdescLeft"> </td><td class="mdescRight">Slave select number. <br/></td></tr>
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<tr class="separator:af1b1d0e86acdcb17ddf8bce7bfbb39b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a56f6eaccdde14024b8799a4f62c78f6e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a56f6eaccdde14024b8799a4f62c78f6e"></a>
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<a class="el" href="a00043.html#gafd7e7bd8e060742346806ed8c8f1db4c">spi_spol_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a56f6eaccdde14024b8799a4f62c78f6e">sselPol</a></td></tr>
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<tr class="memdesc:a56f6eaccdde14024b8799a4f62c78f6e"><td class="mdescLeft"> </td><td class="mdescRight">Configure active CS polarity. <br/></td></tr>
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<tr class="separator:a56f6eaccdde14024b8799a4f62c78f6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acbfa024deb40d4af8746b24c118dd77e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="acbfa024deb40d4af8746b24c118dd77e"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#acbfa024deb40d4af8746b24c118dd77e">txWatermark</a></td></tr>
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<tr class="memdesc:acbfa024deb40d4af8746b24c118dd77e"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark <br/></td></tr>
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<tr class="separator:acbfa024deb40d4af8746b24c118dd77e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8089a2a9d16d41ed4502e251ff4cffec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a8089a2a9d16d41ed4502e251ff4cffec"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a8089a2a9d16d41ed4502e251ff4cffec">rxWatermark</a></td></tr>
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<tr class="memdesc:a8089a2a9d16d41ed4502e251ff4cffec"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark <br/></td></tr>
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<tr class="separator:a8089a2a9d16d41ed4502e251ff4cffec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a787477e7b0ae7833dcbdb1c85fef361c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00043.html#a00308">spi_delay_config_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a787477e7b0ae7833dcbdb1c85fef361c">delayConfig</a></td></tr>
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<tr class="memdesc:a787477e7b0ae7833dcbdb1c85fef361c"><td class="mdescLeft"> </td><td class="mdescRight">Delay configuration. <a href="#a787477e7b0ae7833dcbdb1c85fef361c">More...</a><br/></td></tr>
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<tr class="separator:a787477e7b0ae7833dcbdb1c85fef361c"><td class="memSeparator" colspan="2"> </td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a787477e7b0ae7833dcbdb1c85fef361c"></a>
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<td class="memname"><a class="el" href="a00043.html#a00308">spi_delay_config_t</a> spi_master_config_t::delayConfig</td>
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</div><div class="memdoc">
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</div>
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<a name="a00312" id="a00312"></a>
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<td class="memname">struct spi_slave_config_t</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a9fcd3fae6d886c7dfd0c3fd4cd51e6fe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9fcd3fae6d886c7dfd0c3fd4cd51e6fe"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a9fcd3fae6d886c7dfd0c3fd4cd51e6fe">enableSlave</a></td></tr>
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<tr class="memdesc:a9fcd3fae6d886c7dfd0c3fd4cd51e6fe"><td class="mdescLeft"> </td><td class="mdescRight">Enable SPI at initialization time. <br/></td></tr>
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<tr class="separator:a9fcd3fae6d886c7dfd0c3fd4cd51e6fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a32c240620581fcb133877d4fbda21226"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a32c240620581fcb133877d4fbda21226"></a>
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<a class="el" href="a00043.html#ga3e5a7cd043c9596779bc23b34cb3d1f9">spi_clock_polarity_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a32c240620581fcb133877d4fbda21226">polarity</a></td></tr>
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<tr class="memdesc:a32c240620581fcb133877d4fbda21226"><td class="mdescLeft"> </td><td class="mdescRight">Clock polarity. <br/></td></tr>
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<tr class="separator:a32c240620581fcb133877d4fbda21226"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac6d76d6b354491d5b43756fdf8ef07d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac6d76d6b354491d5b43756fdf8ef07d6"></a>
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<a class="el" href="a00043.html#ga9ad313685ade497f5cbcb71c74a1b4dc">spi_clock_phase_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ac6d76d6b354491d5b43756fdf8ef07d6">phase</a></td></tr>
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<tr class="memdesc:ac6d76d6b354491d5b43756fdf8ef07d6"><td class="mdescLeft"> </td><td class="mdescRight">Clock phase. <br/></td></tr>
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<tr class="separator:ac6d76d6b354491d5b43756fdf8ef07d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad4eb458a0c1a0c0934eec53d71b78ffb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad4eb458a0c1a0c0934eec53d71b78ffb"></a>
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<a class="el" href="a00043.html#gaa68518c16202382c2e1f1c7c66a9d53d">spi_shift_direction_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ad4eb458a0c1a0c0934eec53d71b78ffb">direction</a></td></tr>
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<tr class="memdesc:ad4eb458a0c1a0c0934eec53d71b78ffb"><td class="mdescLeft"> </td><td class="mdescRight">MSB or LSB. <br/></td></tr>
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<tr class="memitem:a52fca395fc7960baf31a25faac7924ef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a52fca395fc7960baf31a25faac7924ef"></a>
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<a class="el" href="a00043.html#gafa691c5329a7325ee57c9f06fa295731">spi_data_width_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a52fca395fc7960baf31a25faac7924ef">dataWidth</a></td></tr>
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<tr class="memdesc:a52fca395fc7960baf31a25faac7924ef"><td class="mdescLeft"> </td><td class="mdescRight">Width of the data. <br/></td></tr>
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<tr class="memitem:a4b0ff89b5c80c79219f79c92cd1606a9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4b0ff89b5c80c79219f79c92cd1606a9"></a>
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<a class="el" href="a00043.html#gafd7e7bd8e060742346806ed8c8f1db4c">spi_spol_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a4b0ff89b5c80c79219f79c92cd1606a9">sselPol</a></td></tr>
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<tr class="memdesc:a4b0ff89b5c80c79219f79c92cd1606a9"><td class="mdescLeft"> </td><td class="mdescRight">Configure active CS polarity. <br/></td></tr>
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<tr class="separator:a4b0ff89b5c80c79219f79c92cd1606a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac1dedde5a4b05f4e56192aadc03813c7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac1dedde5a4b05f4e56192aadc03813c7"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ac1dedde5a4b05f4e56192aadc03813c7">txWatermark</a></td></tr>
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<tr class="memdesc:ac1dedde5a4b05f4e56192aadc03813c7"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark <br/></td></tr>
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<tr class="separator:ac1dedde5a4b05f4e56192aadc03813c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4b2df05f775a1481b39f95a23a43ad4b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4b2df05f775a1481b39f95a23a43ad4b"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a4b2df05f775a1481b39f95a23a43ad4b">rxWatermark</a></td></tr>
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<tr class="memdesc:a4b2df05f775a1481b39f95a23a43ad4b"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark <br/></td></tr>
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<tr class="separator:a4b2df05f775a1481b39f95a23a43ad4b"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="a00313" id="a00313"></a>
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<td class="memname">struct spi_transfer_t</td>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:addc4f20760a1a62c4d20cdf9443f3af3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="addc4f20760a1a62c4d20cdf9443f3af3"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#addc4f20760a1a62c4d20cdf9443f3af3">txData</a></td></tr>
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<tr class="memdesc:addc4f20760a1a62c4d20cdf9443f3af3"><td class="mdescLeft"> </td><td class="mdescRight">Send buffer. <br/></td></tr>
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<tr class="separator:addc4f20760a1a62c4d20cdf9443f3af3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a28b878b99d5ec790b5c8f3bafe140da0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a28b878b99d5ec790b5c8f3bafe140da0"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a28b878b99d5ec790b5c8f3bafe140da0">rxData</a></td></tr>
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<tr class="memdesc:a28b878b99d5ec790b5c8f3bafe140da0"><td class="mdescLeft"> </td><td class="mdescRight">Receive buffer. <br/></td></tr>
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<tr class="separator:a28b878b99d5ec790b5c8f3bafe140da0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a582eea734badd0049c98ea3cf89b3e4b"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a582eea734badd0049c98ea3cf89b3e4b">configFlags</a></td></tr>
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<tr class="memdesc:a582eea734badd0049c98ea3cf89b3e4b"><td class="mdescLeft"> </td><td class="mdescRight">Additional option to control transfer, <a class="el" href="a00043.html#ga632c5d421df2f4ef489e8a56e8545408">spi_xfer_option_t</a>. <a href="#a582eea734badd0049c98ea3cf89b3e4b">More...</a><br/></td></tr>
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<tr class="separator:a582eea734badd0049c98ea3cf89b3e4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae003337c9398e5f5e3189f5b2ba6335b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae003337c9398e5f5e3189f5b2ba6335b"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ae003337c9398e5f5e3189f5b2ba6335b">dataSize</a></td></tr>
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<tr class="memdesc:ae003337c9398e5f5e3189f5b2ba6335b"><td class="mdescLeft"> </td><td class="mdescRight">Transfer bytes. <br/></td></tr>
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<tr class="separator:ae003337c9398e5f5e3189f5b2ba6335b"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a582eea734badd0049c98ea3cf89b3e4b"></a>
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<td class="memname">uint32_t spi_transfer_t::configFlags</td>
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</div><div class="memdoc">
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<a name="a00309" id="a00309"></a>
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<td class="memname">struct spi_half_duplex_transfer_t</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a720d55f285c43087c893c2f48018e0da"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a720d55f285c43087c893c2f48018e0da"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a720d55f285c43087c893c2f48018e0da">txData</a></td></tr>
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<tr class="memdesc:a720d55f285c43087c893c2f48018e0da"><td class="mdescLeft"> </td><td class="mdescRight">Send buffer. <br/></td></tr>
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<tr class="memitem:a93f6fd7e0e297152075af5a3a2c6929c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a93f6fd7e0e297152075af5a3a2c6929c"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a93f6fd7e0e297152075af5a3a2c6929c">rxData</a></td></tr>
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<tr class="memdesc:a93f6fd7e0e297152075af5a3a2c6929c"><td class="mdescLeft"> </td><td class="mdescRight">Receive buffer. <br/></td></tr>
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<tr class="separator:a93f6fd7e0e297152075af5a3a2c6929c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b296a6f72288eb7fa86067e51dc231d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a3b296a6f72288eb7fa86067e51dc231d"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a3b296a6f72288eb7fa86067e51dc231d">txDataSize</a></td></tr>
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<tr class="memdesc:a3b296a6f72288eb7fa86067e51dc231d"><td class="mdescLeft"> </td><td class="mdescRight">Transfer bytes for transmit. <br/></td></tr>
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<tr class="separator:a3b296a6f72288eb7fa86067e51dc231d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe4c4f18c78df9435f464ba94cefd052"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="afe4c4f18c78df9435f464ba94cefd052"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#afe4c4f18c78df9435f464ba94cefd052">rxDataSize</a></td></tr>
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<tr class="memdesc:afe4c4f18c78df9435f464ba94cefd052"><td class="mdescLeft"> </td><td class="mdescRight">Transfer bytes. <br/></td></tr>
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<tr class="separator:afe4c4f18c78df9435f464ba94cefd052"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a98635c2168a95161626ecdc0d22dab4d"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a98635c2168a95161626ecdc0d22dab4d">configFlags</a></td></tr>
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<tr class="memdesc:a98635c2168a95161626ecdc0d22dab4d"><td class="mdescLeft"> </td><td class="mdescRight">Transfer configuration flags, <a class="el" href="a00043.html#ga632c5d421df2f4ef489e8a56e8545408">spi_xfer_option_t</a>. <a href="#a98635c2168a95161626ecdc0d22dab4d">More...</a><br/></td></tr>
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<tr class="separator:a98635c2168a95161626ecdc0d22dab4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a23f645fd24ca70055b770082586b1a59"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a23f645fd24ca70055b770082586b1a59">isPcsAssertInTransfer</a></td></tr>
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<tr class="memdesc:a23f645fd24ca70055b770082586b1a59"><td class="mdescLeft"> </td><td class="mdescRight">If PCS pin keep assert between transmit and receive. <a href="#a23f645fd24ca70055b770082586b1a59">More...</a><br/></td></tr>
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<tr class="separator:a23f645fd24ca70055b770082586b1a59"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1cd036b1eb498f75d8988916dbea3345"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a1cd036b1eb498f75d8988916dbea3345">isTransmitFirst</a></td></tr>
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<tr class="memdesc:a1cd036b1eb498f75d8988916dbea3345"><td class="mdescLeft"> </td><td class="mdescRight">True for transmit first and false for receive first. <a href="#a1cd036b1eb498f75d8988916dbea3345">More...</a><br/></td></tr>
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<tr class="separator:a1cd036b1eb498f75d8988916dbea3345"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a98635c2168a95161626ecdc0d22dab4d"></a>
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<td class="memname">uint32_t spi_half_duplex_transfer_t::configFlags</td>
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</table>
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</div><div class="memdoc">
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</div>
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<a class="anchor" id="a23f645fd24ca70055b770082586b1a59"></a>
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<td class="memname">bool spi_half_duplex_transfer_t::isPcsAssertInTransfer</td>
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</div><div class="memdoc">
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<p>true for assert and false for deassert. </p>
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<a class="anchor" id="a1cd036b1eb498f75d8988916dbea3345"></a>
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<td class="memname">bool spi_half_duplex_transfer_t::isTransmitFirst</td>
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</table>
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</div><div class="memdoc">
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</div>
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<a name="a00307" id="a00307"></a>
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<td class="memname">struct spi_config_t</td>
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</table>
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</div><div class="memdoc">
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<div class="textblock"></div>
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</div>
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<a name="a00228" id="a00228"></a>
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<td class="memname">struct _spi_master_handle</td>
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</div><div class="memdoc">
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<div class="textblock"><p>Master handle type. </p>
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</div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a6cb4626f6b63c70fa21fe2e3338dc915"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6cb4626f6b63c70fa21fe2e3338dc915"></a>
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uint8_t *volatile </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a6cb4626f6b63c70fa21fe2e3338dc915">txData</a></td></tr>
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<tr class="memdesc:a6cb4626f6b63c70fa21fe2e3338dc915"><td class="mdescLeft"> </td><td class="mdescRight">Transfer buffer. <br/></td></tr>
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<tr class="separator:a6cb4626f6b63c70fa21fe2e3338dc915"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69f260bde2e1728233f835a148b2f51b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a69f260bde2e1728233f835a148b2f51b"></a>
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uint8_t *volatile </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a69f260bde2e1728233f835a148b2f51b">rxData</a></td></tr>
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<tr class="memdesc:a69f260bde2e1728233f835a148b2f51b"><td class="mdescLeft"> </td><td class="mdescRight">Receive buffer. <br/></td></tr>
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<tr class="memitem:a62fa101ddfc970e7b6bcba0b2eb6b869"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a62fa101ddfc970e7b6bcba0b2eb6b869"></a>
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volatile size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a62fa101ddfc970e7b6bcba0b2eb6b869">txRemainingBytes</a></td></tr>
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<tr class="memdesc:a62fa101ddfc970e7b6bcba0b2eb6b869"><td class="mdescLeft"> </td><td class="mdescRight">Number of data to be transmitted [in bytes]. <br/></td></tr>
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<tr class="separator:a62fa101ddfc970e7b6bcba0b2eb6b869"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a23b2531ea36b53e42cd6b2a3780d3017"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a23b2531ea36b53e42cd6b2a3780d3017"></a>
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volatile size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a23b2531ea36b53e42cd6b2a3780d3017">rxRemainingBytes</a></td></tr>
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<tr class="memdesc:a23b2531ea36b53e42cd6b2a3780d3017"><td class="mdescLeft"> </td><td class="mdescRight">Number of data to be received [in bytes]. <br/></td></tr>
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<tr class="separator:a23b2531ea36b53e42cd6b2a3780d3017"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0aad3e226d6c3d7a240430c1ae55bdb4"><td class="memItemLeft" align="right" valign="top">volatile int8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a0aad3e226d6c3d7a240430c1ae55bdb4">toReceiveCount</a></td></tr>
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<tr class="memdesc:a0aad3e226d6c3d7a240430c1ae55bdb4"><td class="mdescLeft"> </td><td class="mdescRight">The number of data expected to receive in data width. <a href="#a0aad3e226d6c3d7a240430c1ae55bdb4">More...</a><br/></td></tr>
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<tr class="separator:a0aad3e226d6c3d7a240430c1ae55bdb4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4e19f9299f123f181536c6bd4456e50a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4e19f9299f123f181536c6bd4456e50a"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a4e19f9299f123f181536c6bd4456e50a">totalByteCount</a></td></tr>
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<tr class="memdesc:a4e19f9299f123f181536c6bd4456e50a"><td class="mdescLeft"> </td><td class="mdescRight">A number of transfer bytes. <br/></td></tr>
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<tr class="memitem:ae7933252a37be998d127217f34f6fd16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae7933252a37be998d127217f34f6fd16"></a>
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volatile uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ae7933252a37be998d127217f34f6fd16">state</a></td></tr>
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<tr class="memdesc:ae7933252a37be998d127217f34f6fd16"><td class="mdescLeft"> </td><td class="mdescRight">SPI internal state. <br/></td></tr>
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<tr class="memitem:a445e70d437c917e6af1b4037bdbb6a3f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a445e70d437c917e6af1b4037bdbb6a3f"></a>
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<a class="el" href="a00043.html#gae9bd140aeb645efab6c7552b3994e01a">spi_master_callback_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a445e70d437c917e6af1b4037bdbb6a3f">callback</a></td></tr>
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<tr class="memdesc:a445e70d437c917e6af1b4037bdbb6a3f"><td class="mdescLeft"> </td><td class="mdescRight">SPI callback. <br/></td></tr>
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<tr class="memitem:ab8d01b85149d749ab1c748bb5116b90e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab8d01b85149d749ab1c748bb5116b90e"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#ab8d01b85149d749ab1c748bb5116b90e">userData</a></td></tr>
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<tr class="memdesc:ab8d01b85149d749ab1c748bb5116b90e"><td class="mdescLeft"> </td><td class="mdescRight">Callback parameter. <br/></td></tr>
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<tr class="memitem:a11b51e4d88d3f8d9137a13ce301ed46c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a11b51e4d88d3f8d9137a13ce301ed46c"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a11b51e4d88d3f8d9137a13ce301ed46c">dataWidth</a></td></tr>
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<tr class="memdesc:a11b51e4d88d3f8d9137a13ce301ed46c"><td class="mdescLeft"> </td><td class="mdescRight">Width of the data [Valid values: 1 to 16]. <br/></td></tr>
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<tr class="memitem:a9009d89fcc80d56cfb96bd7953e791c4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9009d89fcc80d56cfb96bd7953e791c4"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a9009d89fcc80d56cfb96bd7953e791c4">sselNum</a></td></tr>
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<tr class="memdesc:a9009d89fcc80d56cfb96bd7953e791c4"><td class="mdescLeft"> </td><td class="mdescRight">Slave select number to be asserted when transferring data [Valid values: 0 to 3]. <br/></td></tr>
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<tr class="memitem:a798a5bb17e5685378c9f81ac945b0135"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a798a5bb17e5685378c9f81ac945b0135"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a798a5bb17e5685378c9f81ac945b0135">configFlags</a></td></tr>
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<tr class="memdesc:a798a5bb17e5685378c9f81ac945b0135"><td class="mdescLeft"> </td><td class="mdescRight">Additional option to control transfer. <br/></td></tr>
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<tr class="memitem:a4b8d8f4690f82e551854398457d969c0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4b8d8f4690f82e551854398457d969c0"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a4b8d8f4690f82e551854398457d969c0">txWatermark</a></td></tr>
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<tr class="memdesc:a4b8d8f4690f82e551854398457d969c0"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark <br/></td></tr>
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<tr class="separator:a4b8d8f4690f82e551854398457d969c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a37f8fc04ea8e7f50ec411c82f4e0240a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a37f8fc04ea8e7f50ec411c82f4e0240a"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00043.html#a37f8fc04ea8e7f50ec411c82f4e0240a">rxWatermark</a></td></tr>
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<tr class="memdesc:a37f8fc04ea8e7f50ec411c82f4e0240a"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark <br/></td></tr>
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<tr class="separator:a37f8fc04ea8e7f50ec411c82f4e0240a"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a0aad3e226d6c3d7a240430c1ae55bdb4"></a>
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<td class="memname">volatile int8_t spi_master_handle_t::toReceiveCount</td>
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</div><div class="memdoc">
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<p>Since the received count and sent count should be the same to complete the transfer, if the sent count is x and the received count is y, toReceiveCount is x-y. </p>
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</div>
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</div>
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</div>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<td class="memname">#define FSL_SPI_DRIVER_VERSION   (<a class="el" href="a00017.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 2, 1))</td>
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</table>
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</div><div class="memdoc">
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<a class="anchor" id="ga1541129ba8262e1649592b5109e2074c"></a>
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<td class="memname">#define SPI_DUMMYDATA   (0xFFU)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<a class="anchor" id="gaa4717c15ca9604c505a5e5c60df29ebe"></a>
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<td class="memname">#define SPI_RETRY_TIMES   0U /* Define to zero means keep waiting until the flag is assert/deassert. */</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<h2 class="groupheader">Typedef Documentation</h2>
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<a class="anchor" id="ga2c61065c015d5b1c3247cf979238d434"></a>
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<td class="memname">typedef void(* flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle)</td>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<a class="anchor" id="gae305531ff5562d2c51423f85032942ae"></a>
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<td class="memname">typedef void(* flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, <a class="el" href="a00043.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a> *handle)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<a class="anchor" id="ga632c5d421df2f4ef489e8a56e8545408"></a>
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<td class="memname">enum <a class="el" href="a00043.html#ga632c5d421df2f4ef489e8a56e8545408">spi_xfer_option_t</a></td>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga632c5d421df2f4ef489e8a56e8545408a368ad1fd03f7af182af9a61c7f4967ed"></a>kSPI_FrameDelay</em> </td><td class="fielddoc">
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<p>A delay may be inserted, defined in the DLY register. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga632c5d421df2f4ef489e8a56e8545408adbcf2b399fc2e5f1ad5c2586117a1ae9"></a>kSPI_FrameAssert</em> </td><td class="fielddoc">
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<p>SSEL will be deasserted at the end of a transfer. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="gaa68518c16202382c2e1f1c7c66a9d53d"></a>
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<td class="memname">enum <a class="el" href="a00043.html#gaa68518c16202382c2e1f1c7c66a9d53d">spi_shift_direction_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaa68518c16202382c2e1f1c7c66a9d53dae7b997e8cff761aab865cbd42c4c3989"></a>kSPI_MsbFirst</em> </td><td class="fielddoc">
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<p>Data transfers start with most significant bit. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaa68518c16202382c2e1f1c7c66a9d53da20ac53684c3e1ad338553cecbfab94a9"></a>kSPI_LsbFirst</em> </td><td class="fielddoc">
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<p>Data transfers start with least significant bit. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga3e5a7cd043c9596779bc23b34cb3d1f9"></a>
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<td class="memname">enum <a class="el" href="a00043.html#ga3e5a7cd043c9596779bc23b34cb3d1f9">spi_clock_polarity_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga3e5a7cd043c9596779bc23b34cb3d1f9a031c0ee2693cf1fd621e8b8cba676629"></a>kSPI_ClockPolarityActiveHigh</em> </td><td class="fielddoc">
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<p>Active-high SPI clock (idles low). </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga3e5a7cd043c9596779bc23b34cb3d1f9acfc8257079c9604086622df6de326aea"></a>kSPI_ClockPolarityActiveLow</em> </td><td class="fielddoc">
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<p>Active-low SPI clock (idles high). </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga9ad313685ade497f5cbcb71c74a1b4dc"></a>
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<tr>
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<td class="memname">enum <a class="el" href="a00043.html#ga9ad313685ade497f5cbcb71c74a1b4dc">spi_clock_phase_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga9ad313685ade497f5cbcb71c74a1b4dcad15d61c6fd642f13101edbf401d0c72e"></a>kSPI_ClockPhaseFirstEdge</em> </td><td class="fielddoc">
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<p>First edge on SCK occurs at the middle of the first cycle of a data transfer. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9ad313685ade497f5cbcb71c74a1b4dca18a98985c1f7dd56175e4a2724db3675"></a>kSPI_ClockPhaseSecondEdge</em> </td><td class="fielddoc">
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<p>First edge on SCK occurs at the start of the first cycle of a data transfer. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga9a479127a2051ded7945115657adc162"></a>
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<td class="memname">enum <a class="el" href="a00043.html#ga9a479127a2051ded7945115657adc162">spi_txfifo_watermark_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162ab00ed44c27cc2f5c8be6a37a7e54bbb0"></a>kSPI_TxFifo0</em> </td><td class="fielddoc">
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<p>SPI tx watermark is empty. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162ad84aa8fe681fb1922108dd71035a1e7a"></a>kSPI_TxFifo1</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 1 item. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162af0f35b4313810fb0a721f6d0c96e361d"></a>kSPI_TxFifo2</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 2 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162a583e03e419cab47b3a257f39a96f9098"></a>kSPI_TxFifo3</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 3 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162add72390240691eb878a8bc236b0ae0f1"></a>kSPI_TxFifo4</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 4 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162a2d97d5d6a34b441ebdd1a5dcf9cd0d49"></a>kSPI_TxFifo5</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 5 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162a50675672a2887ec04a4a2d11c183958b"></a>kSPI_TxFifo6</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 6 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga9a479127a2051ded7945115657adc162a4f8e84453e704f97a592944ff3dc5c50"></a>kSPI_TxFifo7</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 7 items. </p>
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</td></tr>
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</table>
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</div>
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<a class="anchor" id="ga79f862820ec2bcbb8184ce9de72949a6"></a>
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<td class="memname">enum <a class="el" href="a00043.html#ga79f862820ec2bcbb8184ce9de72949a6">spi_rxfifo_watermark_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6a2d49ceb52f1bf6c51e2514b35e5d9804"></a>kSPI_RxFifo1</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 1 item. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6a90eb93fdd80d4baf71ff3d75d4df2454"></a>kSPI_RxFifo2</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 2 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6ab27946413b575e3dd27e0a37c8ccb17b"></a>kSPI_RxFifo3</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 3 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6af6dcb50b13a1d8208d1d977ce79ff662"></a>kSPI_RxFifo4</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 4 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6a2c961e2e2c24014368dfe867d2295f3d"></a>kSPI_RxFifo5</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 5 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6ad8bce70560016fbd76c7e1a9e5a2369f"></a>kSPI_RxFifo6</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 6 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6a24b9a255d74d6a5b47d59b82717586dc"></a>kSPI_RxFifo7</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 7 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga79f862820ec2bcbb8184ce9de72949a6aba4452e3c770cac6e822a0f85e2b53f3"></a>kSPI_RxFifo8</em> </td><td class="fielddoc">
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<p>SPI rx watermark at 8 items. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="gafa691c5329a7325ee57c9f06fa295731"></a>
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<tr>
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<td class="memname">enum <a class="el" href="a00043.html#gafa691c5329a7325ee57c9f06fa295731">spi_data_width_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731a0cb8b30c67c53c6d53712d5bacc818ce"></a>kSPI_Data4Bits</em> </td><td class="fielddoc">
|
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<p>4 bits data width </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731a7232b4afb5bd82503252ce608638e6eb"></a>kSPI_Data5Bits</em> </td><td class="fielddoc">
|
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<p>5 bits data width </p>
|
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731a6604fcf5c8bebf904c5b072295027bba"></a>kSPI_Data6Bits</em> </td><td class="fielddoc">
|
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<p>6 bits data width </p>
|
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731a2c62d3d7d92866c97bb513d4e603518e"></a>kSPI_Data7Bits</em> </td><td class="fielddoc">
|
|
<p>7 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731ad6b98474a7f14ae7665b7b6d3355657c"></a>kSPI_Data8Bits</em> </td><td class="fielddoc">
|
|
<p>8 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731a4b864a74545165c2cf2dd74134fdadd1"></a>kSPI_Data9Bits</em> </td><td class="fielddoc">
|
|
<p>9 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731a2b2887663c9d025a4137263fc7984024"></a>kSPI_Data10Bits</em> </td><td class="fielddoc">
|
|
<p>10 bits data width </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731a91e908a7a4725ab9df05549a2b034dec"></a>kSPI_Data11Bits</em> </td><td class="fielddoc">
|
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<p>11 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731ad1cfe18fd912c0d25dc32e6ca9fa8f97"></a>kSPI_Data12Bits</em> </td><td class="fielddoc">
|
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<p>12 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731ad8c2fa2e2f5bf137176dc736cc6a2531"></a>kSPI_Data13Bits</em> </td><td class="fielddoc">
|
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<p>13 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731ae83435f494d1b9f3ce2f2da0ac03fc38"></a>kSPI_Data14Bits</em> </td><td class="fielddoc">
|
|
<p>14 bits data width </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731add11012a8887066fad29e23c20d66af8"></a>kSPI_Data15Bits</em> </td><td class="fielddoc">
|
|
<p>15 bits data width </p>
|
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</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggafa691c5329a7325ee57c9f06fa295731abbc2566ba4eb2b5e5dc259a7c4f80bcf"></a>kSPI_Data16Bits</em> </td><td class="fielddoc">
|
|
<p>16 bits data width </p>
|
|
</td></tr>
|
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</table>
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</div>
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</div>
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<a class="anchor" id="ga420a3d3f841957068648585b89fa66d1"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00043.html#ga420a3d3f841957068648585b89fa66d1">spi_ssel_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga420a3d3f841957068648585b89fa66d1aba6e24e125d6e2623fdf66179d8d3595"></a>kSPI_Ssel0</em> </td><td class="fielddoc">
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<p>Slave select 0. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga420a3d3f841957068648585b89fa66d1a6a919364d43781f9da7c826c53008863"></a>kSPI_Ssel1</em> </td><td class="fielddoc">
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<p>Slave select 1. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga420a3d3f841957068648585b89fa66d1a42cddec913f2774241d7d962143e1588"></a>kSPI_Ssel2</em> </td><td class="fielddoc">
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<p>Slave select 2. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga420a3d3f841957068648585b89fa66d1a242faca0999052891ca8ed24a116e466"></a>kSPI_Ssel3</em> </td><td class="fielddoc">
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<p>Slave select 3. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga61dadd085c1777f559549e05962b2c9e"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">anonymous enum</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea703abdf7900047c4d13536480f3463ab"></a>kStatus_SPI_Busy</em> </td><td class="fielddoc">
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<p>SPI bus is busy. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea4e32c5b06dccaf4b81e2fd1679e1b560"></a>kStatus_SPI_Idle</em> </td><td class="fielddoc">
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<p>SPI is idle. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea2ff91d774e93aed936b87ffaa18aaf9e"></a>kStatus_SPI_Error</em> </td><td class="fielddoc">
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<p>SPI error. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9eab0f4d4de5f92524c9d33524f22a04e03"></a>kStatus_SPI_BaudrateNotSupport</em> </td><td class="fielddoc">
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<p>Baudrate is not support in current clock source. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea496ced6fffc33d7bbeb01d203dfc4836"></a>kStatus_SPI_Timeout</em> </td><td class="fielddoc">
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<p>SPI timeout polling status flags. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="gaedd690a0f91a0a9eb0fd573b57e31f67"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00043.html#gaedd690a0f91a0a9eb0fd573b57e31f67">_spi_interrupt_enable</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaedd690a0f91a0a9eb0fd573b57e31f67a81a10bf611827929fcf8eed0468aea7a"></a>kSPI_RxLvlIrq</em> </td><td class="fielddoc">
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<p>Rx level interrupt. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaedd690a0f91a0a9eb0fd573b57e31f67a13d4e9159c4ba5d49adef5e7e5f5b1dd"></a>kSPI_TxLvlIrq</em> </td><td class="fielddoc">
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<p>Tx level interrupt. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga88b3958a041355f297213b5c407dded2"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00043.html#ga88b3958a041355f297213b5c407dded2">_spi_statusflags</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a243d09d83665d0ab9deefcb8e14ea1ae"></a>kSPI_TxEmptyFlag</em> </td><td class="fielddoc">
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<p>txFifo is empty </p>
|
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</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a3892d0ae82fadd910932410fb86b0415"></a>kSPI_TxNotFullFlag</em> </td><td class="fielddoc">
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<p>txFifo is not full </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a5dffa125a4a171d539f4d1df9abf6e8a"></a>kSPI_RxNotEmptyFlag</em> </td><td class="fielddoc">
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<p>rxFIFO is not empty </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a24187382b09195b069e487ed1e29cbcd"></a>kSPI_RxFullFlag</em> </td><td class="fielddoc">
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<p>rxFIFO is full </p>
|
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</td></tr>
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</table>
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</div>
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</div>
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<h2 class="groupheader">Variable Documentation</h2>
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<a class="anchor" id="ga9d35e904f2864488f65fddcfb5277f44"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">volatile uint8_t s_dummyData[]</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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</div><!-- contents -->
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