diff --git a/LPC55S69_manifest_v3_9.xml b/LPC55S69_manifest_v3_9.xml
index 3ef7cd2a9..424ba8e19 100644
--- a/LPC55S69_manifest_v3_9.xml
+++ b/LPC55S69_manifest_v3_9.xml
@@ -1,13 +1,13 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<ksdk:manifest xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" id="SDK_2.x_LPC55S69" name="LPC55S69" brief="This is SDK version 2.11.0 manifest file. It describes the content of the LPC55S69 and additional settings for tools that support SDK version 2.11.0" format_version="3.9" api_version="2.0.0" configuration="f30e89ea41e7bad154eb22d8e458836d" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd http://nxp.com/mcuxpresso/sdk/sdk_manifest_v3.9.xsd">
-  <!--Timestamp (UTC): 2022-01-14 23:12:05.332913-->
-  <!--This manifest is generated based on sdk repo commit: 8b51d89d559eab0d6f538a2026d1d5438333b315-->
+<ksdk:manifest xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" id="SDK_2.x_LPC55S69" name="LPC55S69" brief="This is SDK version 2.11.1 manifest file. It describes the content of the LPC55S69 and additional settings for tools that support SDK version 2.11.1" format_version="3.9" api_version="2.0.0" configuration="a975ea70b76dfee1c9520eceb7e0bdf1" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd http://nxp.com/mcuxpresso/sdk/sdk_manifest_v3.9.xsd">
+  <!--Timestamp (UTC): 2022-03-24 13:43:06.497920-->
+  <!--This manifest is generated based on sdk repo commit: ffad758dc1bcbaea4db7161533a769680421b275-->
   <defines>
     <define name="CPU_$|package|" value=""/>
     <define name="CPU_$|package|_$|core|" value=""/>
     <define name="CPU_$|package|_$|core_name|" value=""/>
   </defines>
-  <ksdk id="MCUXpresso2110" name="MCUXpresso2110" version="2.11.0" revision="541 2022-01-14"/>
+  <ksdk id="MCUXpresso2111" name="MCUXpresso2111" version="2.11.1" revision="563 2022-03-24"/>
   <compilers>
     <compiler id="compiler_gcc" name="gcc" type="gcc"/>
   </compilers>
@@ -37,7 +37,7 @@
     </toolchainSetting>
   </toolchainSettings>
   <toolchains>
-    <toolchain id="armgcc" name="GCC_ARM_Embedded" version="10.2.1" full_name="GCC ARM Embedded" compiler="compiler_gcc" type="armgcc" vendor="GCC ARM Embedded" vendor_url="http://launchpad.net/gcc-arm-embedded"/>
+    <toolchain id="armgcc" name="GCC_ARM_Embedded" version="10.3.1" full_name="GCC ARM Embedded" compiler="compiler_gcc" type="armgcc" vendor="GCC ARM Embedded" vendor_url="http://launchpad.net/gcc-arm-embedded"/>
     <toolchain id="mcuxpresso" name="MCUXpresso_IDE" version="11.5.0" full_name="MCUXpresso IDE" compiler="compiler_gcc" type="mcuxpresso" vendor="NXP Semiconductors" vendor_url="http://www.nxp.com">
       <debug>
         <debug_configuration id="com.crt.advproject.config.exe.release" name="Release Configuration" probe="LinkServer">
@@ -957,6 +957,11 @@ ${load}</script>
             <files mask="maestro_playback_v3_9.xml"/>
           </external>
         </example>
+        <example id="lpcxpresso55s69_maestro_record" name="maestro_record" brief="Audio maestro framework demo example." toolchain="armgcc mcuxpresso" compiler="compiler_gcc" category="audio_examples" path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0">
+          <external path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" type="xml">
+            <files mask="maestro_record_v3_9.xml"/>
+          </external>
+        </example>
         <example id="lpcxpresso55s69_maestro_usb_mic" name="maestro_usb_mic" brief="Audio maestro framework USB microphone example." toolchain="armgcc mcuxpresso" compiler="compiler_gcc" category="audio_examples" path="boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0">
           <external path="boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0" type="xml">
             <files mask="maestro_usb_mic_v3_9.xml"/>
@@ -1529,34 +1534,6 @@ ${load}</script>
         </example>
       </examples>
     </board>
-    <board id="lpcxpresso55s69_agm01" name="LPCXPRESSO55S69-AGM01" href="https://www.nxp.com/pip/FRDM-STBC-AGM01" version="1.0.0" package="LPC55S69JBD100" type="kit">
-      <description>LPCXpresso Development Board for LPC55S6x family of MCUs with 9-Axis sensor shield board FRDM-STBC-AGM01 having FXAS21002C Gyroscope &amp; FXOS8700CQ E-compass sensors</description>
-      <image path="boards/lpcxpresso55s69_agm01" type="image">
-        <files mask="lpcxpresso55s69_agm01.png"/>
-      </image>
-      <examples>
-        <example id="lpcxpresso55s69_agm01_fxas21002_fifo_niobe4" name="fxas21002_fifo_niobe4" brief="The FXAS21002 FIFO example application demonstrates the use of the FXAS21002 sensor in Buffered (FIFO) Mode.The example demonstrates configuration of all registers reguired to put the sensor in FIFO Mode and read out samples.The sensor reads samples and are buffered upto the configured Water Mark Level and then a Flag is set.The application consistently checks the Flag and when set, reads out all(count=Water Mark Level) samples." toolchain="armgcc mcuxpresso" compiler="compiler_gcc" category="issdk/sensors" path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo">
-          <external path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" type="xml">
-            <files mask="fxas21002_fifo_niobe4_v3_9.xml"/>
-          </external>
-        </example>
-        <example id="lpcxpresso55s69_agm01_fxas21002_poll_niobe4" name="fxas21002_poll_niobe4" brief="The FXAS21002 Poll example application demonstrates the use of the FXAS21002 sensor in the Poll (Non-Buffered) Mode. The example demonstrates configuration of all registers reguired to put the sensor into Poll Mode and read out a sample." toolchain="armgcc mcuxpresso" compiler="compiler_gcc" category="issdk/sensors" path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll">
-          <external path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" type="xml">
-            <files mask="fxas21002_poll_niobe4_v3_9.xml"/>
-          </external>
-        </example>
-        <example id="lpcxpresso55s69_agm01_fxos8700_fifo_niobe4" name="fxos8700_fifo_niobe4" brief="The FXAS8700 FIFO example application demonstrates the use of the FXAS8700 sensor in Buffered (FIFO) Mode.The example demonstrates configuration of all registers reguired to put the sensor in FIFO Mode and read out samples.The sensor reads samples and are buffered upto the configured Water Mark Level and then a Flag is set.The application consistently checks the Flag and when set, reads out all(count=Water Mark Level) samples." toolchain="armgcc mcuxpresso" compiler="compiler_gcc" category="issdk/sensors" path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo">
-          <external path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" type="xml">
-            <files mask="fxos8700_fifo_niobe4_v3_9.xml"/>
-          </external>
-        </example>
-        <example id="lpcxpresso55s69_agm01_fxos8700_poll_niobe4" name="fxos8700_poll_niobe4" brief="The FXOS8700 Poll example application demonstrates the use of the FXOS8700 sensor in the Poll (Non-Buffered) Mode. The example demonstrates configuration of all registers reguired to put the sensor into Poll Mode and read out a sample." toolchain="armgcc mcuxpresso" compiler="compiler_gcc" category="issdk/sensors" path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll">
-          <external path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" type="xml">
-            <files mask="fxos8700_poll_niobe4_v3_9.xml"/>
-          </external>
-        </example>
-      </examples>
-    </board>
   </boards>
   <devices>
     <device id="LPC55S69" name="LPC55S69" version="1.0.0" full_name="LPC55S69" family="LPC55S6x" platform="LPC">
@@ -1653,39 +1630,6 @@ ${load}</script>
         <include_path relative_path="./" type="c_include"/>
       </include_paths>
     </component>
-    <component id="project_template.lpcxpresso55s69_agm01.LPC55S69" name="lpcxpresso55s69_agm01" brief="Board_project_template lpcxpresso55s69_agm01" version="1.0.0" full_name="Board_project_template lpcxpresso55s69_agm01" devices="LPC55S69" device_cores="cm33_core0_LPC55S69 cm33_core1_LPC55S69" slave_roles="M33SLAVE" category="Board Support/SDK Project Template" user_visible="true" type="project_template" package_base_path="boards/lpcxpresso55s69_agm01/project_template" project_base_path="lpcxpresso55s69_agm01/project_template">
-      <dependencies>
-        <all>
-          <component_dependency value="platform.drivers.flexcomm_usart.LPC55S69"/>
-          <component_dependency value="platform.drivers.flexcomm.LPC55S69"/>
-          <component_dependency value="platform.drivers.lpc_iocon.LPC55S69"/>
-          <component_dependency value="platform.drivers.lpc_gpio.LPC55S69"/>
-          <component_dependency value="platform.drivers.common.LPC55S69"/>
-          <component_dependency value="platform.drivers.clock.LPC55S69"/>
-          <component_dependency value="platform.drivers.power.LPC55S69"/>
-          <component_dependency value="utility.debug_console.LPC55S69"/>
-          <component_dependency value="component.usart_adapter.LPC55S69"/>
-          <component_dependency value="component.serial_manager_uart.LPC55S69"/>
-          <component_dependency value="component.serial_manager.LPC55S69"/>
-          <component_dependency value="platform.devices.LPC55S69_startup.LPC55S69"/>
-        </all>
-      </dependencies>
-      <source relative_path="./" type="src">
-        <files mask="board.c"/>
-        <files mask="clock_config.c"/>
-        <files mask="pin_mux.c"/>
-        <files mask="peripherals.c"/>
-      </source>
-      <source relative_path="./" type="c_include">
-        <files mask="board.h"/>
-        <files mask="clock_config.h"/>
-        <files mask="pin_mux.h"/>
-        <files mask="peripherals.h"/>
-      </source>
-      <include_paths>
-        <include_path relative_path="./" type="c_include"/>
-      </include_paths>
-    </component>
     <component id="CMSIS_DSP_Library.LPC55S69" name="CMSIS_DSP_Library" brief="CMSIS-DSP Library for Cortex-M, SC000, and SC300" version="1.7.0" full_name="CMSIS DSP Library" devices="LPC55S69" user_visible="true" type="CMSIS_driver" package_base_path="CMSIS/DSP" project_base_path="CMSIS/DSP">
       <source relative_path="Include" type="c_include">
         <files mask="arm_common_tables.h"/>
@@ -39141,6 +39085,7 @@ ${load}</script>
       </source>
       <include_paths>
         <include_path relative_path="libraries/coreHTTP/source/include" type="c_include"/>
+        <include_path relative_path="libraries/coreHTTP/source/interface" type="c_include"/>
       </include_paths>
     </component>
     <component id="middleware.freertos-aws_iot.libraries.corehttp.test.LPC55S69" name="AWS IoT coreHTTP test" brief="AWS IoT coreHTTP test" version="202107.00.0" revision="1" full_name="AWS IoT coreHTTP test" devices="LPC55S69" category="AWS IoT/AWS common libraries" user_visible="true" type="middleware" package_base_path="rtos/freertos" project_base_path="freertos">
@@ -44816,6 +44761,15 @@ ${load}</script>
       <source toolchain="armgcc mcuxpresso" relative_path="libs/cm33f/armgcc/release" type="lib" device_cores="cm33_core0_LPC55S69 cm33_core1_LPC55S69">
         <files mask="libwav.a"/>
       </source>
+      <source exclude="true" relative_path="mcu-audio/ogg" type="other">
+        <files mask="COPYING" hidden="true"/>
+      </source>
+      <source exclude="true" relative_path="mcu-audio/opus" type="other">
+        <files mask="COPYING" hidden="true"/>
+      </source>
+      <source exclude="true" relative_path="mcu-audio/opusfile" type="other">
+        <files mask="COPYING" hidden="true"/>
+      </source>
       <source toolchain="armgcc" relative_path="." type="workspace" device_cores="cm33_core0_LPC55S69">
         <files mask="middleware_maestro_framework_LPC55S69_cm33_core0.cmake" hidden="true"/>
       </source>
diff --git a/SW-Content-Register.txt b/SW-Content-Register.txt
index 0f7eb92e1..226509898 100644
--- a/SW-Content-Register.txt
+++ b/SW-Content-Register.txt
@@ -1,5 +1,5 @@
 Release Name: MCUXpresso Software Development Kit (SDK)
-Release Version: 2.11.0
+Release Version: 2.11.1
 Package License: LA_OPT_NXP_Software_License.txt - Additional Distribution License granted, license in Section 2.3 applies
 
 SDK_Peripheral_Driver      Name: SDK Peripheral Driver                       
@@ -270,7 +270,7 @@ fatfs                      Name: FatFs
                            Url: http://elm-chan.org/fsw/ff/00index_e.html    
 
 mbedtls                    Name: Mbed TLS                                    
-                           Version: 2.26.0                                   
+                           Version: 2.27.0                                   
                            Outgoing License: Apache-2.0                      
                            License File: middleware/mbedtls/LICENSE          
                            Format: source code                               
@@ -466,7 +466,11 @@ maestro                    Name: Maestro Audio Framework
                            Format: Source                                    
                            Description: Maestro MCU Audio Framework          
                            Location: middleware/maestro                      
-                           Origin: NXP                                       
+                           Origin: NXP (Proprietary) Ogg (BSD 3-clause) Opus 
+                           (BSD 3-clause) Opusfile (BSD 3-clause)            
+                           Url: https://github.com/xiph/ogg                  
+                           https://github.com/xiph/opus                      
+                           https://github.com/xiph/opusfile                  
 
 EAP                        Name: EAP                                         
                            Version: 3.0.12                                   
@@ -573,7 +577,7 @@ freertos_corehttp          name: FreeRTOS coreHTTP library
                            version: 2.0.1                                    
                            Outgoing License: MIT                             
                            License File:                                     
-                           rtos/freertos/librarires/coreHTTP/LICENSE         
+                           rtos/freertos/libraries/coreHTTP/LICENSE          
                            Format: source code, header files                 
                            Description: C language HTTP client library       
                            designed for embedded platforms                   
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/FreeRTOSConfig.h b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/FreeRTOSConfig.h
index 4f5f17c5e..e98da9a5c 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/FreeRTOSConfig.h
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/FreeRTOSConfig.h
@@ -78,7 +78,7 @@
 #endif
 #define configAPPLICATION_ALLOCATED_HEAP        0
 
-#define configCHECK_FOR_STACK_OVERFLOW          1
+#define configCHECK_FOR_STACK_OVERFLOW          2
 #define configRECORD_STACK_HIGH_ADDRESS         1
 
 /* Hook function related definitions. */
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_data.h b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_data.h
index 381945cba..6e00a9b5b 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_data.h
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_data.h
@@ -11,7 +11,11 @@
 #include <stdint.h>
 #include <streamer_element_properties.h>
 
+#ifdef CPU_LPC55S69JBD100_cm33_core0
+#define EAP_MAX_PRESET 6
+#else
 #define EAP_MAX_PRESET 10
+#endif
 
 typedef struct _app_data
 {
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_definitions.h b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_definitions.h
index 643f4e882..06c82cfd6 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_definitions.h
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/app_definitions.h
@@ -18,11 +18,8 @@
 #define DEMO_I2C                        (I2C4)
 #define DEMO_I2S_MASTER_CLOCK_FREQUENCY (24576000)
 #define DEMO_I2S_TX                     (I2S7)
-#define DEMO_I2S_RX                     (I2S6)
 #define DEMO_DMA                        (DMA0)
 #define DEMO_I2S_TX_CHANNEL             (19)
-#define DEMO_I2S_RX_CHANNEL             (16)
-#define DEMO_I2S_RX_MODE                (kI2S_MasterSlaveNormalSlave)
 #define DEMO_I2S_TX_MODE                (kI2S_MasterSlaveNormalMaster)
 #define DEMO_CHANNEL_NUM                (2)
 /*${macro:end}*/
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/eap_proc.c b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/eap_proc.c
index f681cc9e9..8ca018cec 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/eap_proc.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/eap_proc.c
@@ -50,63 +50,63 @@ typedef struct _eap_preset_t
     LVM_HeadroomParams_t *headroomParams;
 } eap_preset_t;
 
-eap_preset_t eap_presets[EAP_MAX_PRESET] = {{.name           = "AllEffectOff",
-                                             .controlParams  = &ControlParamSet_allEffectOff,
-                                             .instParams     = &InstParams_allEffectOff,
-                                             .headroomParams = &HeadroomParams_allEffectOff},
-                                            {.name = "VoiceEnhancer",
+eap_preset_t eap_presets[] = {{.name           = "AllEffectOff",
+                               .controlParams  = &ControlParamSet_allEffectOff,
+                               .instParams     = &InstParams_allEffectOff,
+                               .headroomParams = &HeadroomParams_allEffectOff},
+                              {.name = "VoiceEnhancer",
 #ifdef CPU_LPC55S69JBD100_cm33_core0
-                                             .controlParams  = &ControlParamSet_voiceEnhancer_lowMIPS,
-                                             .instParams     = &InstParams_voiceEnhancer_lowMIPS,
-                                             .headroomParams = &HeadroomParams_voiceEnhancer_lowMIPS},
+                               .controlParams  = &ControlParamSet_voiceEnhancer_lowMIPS,
+                               .instParams     = &InstParams_voiceEnhancer_lowMIPS,
+                               .headroomParams = &HeadroomParams_voiceEnhancer_lowMIPS},
 #else
                                .controlParams  = &ControlParamSet_voiceEnhancer,
                                .instParams     = &InstParams_voiceEnhancer,
                                .headroomParams = &HeadroomParams_voiceEnhancer},
 #endif
-                                            {.name = "MusicEnhancer",
+                              {.name = "MusicEnhancer",
 #ifdef CPU_LPC55S69JBD100_cm33_core0
-                                             .controlParams  = &ControlParamSet_musicEnhancerRmsLimiter_lowMIPS,
-                                             .instParams     = &InstParams_musicEnhancerRmsLimiter_lowMIPS,
-                                             .headroomParams = &HeadroomParams_musicEnhancerRmsLimiter_lowMIPS},
+                               .controlParams  = &ControlParamSet_musicEnhancerRmsLimiter_lowMIPS,
+                               .instParams     = &InstParams_musicEnhancerRmsLimiter_lowMIPS,
+                               .headroomParams = &HeadroomParams_musicEnhancerRmsLimiter_lowMIPS},
 #else
                                .controlParams  = &ControlParamSet_musicEnhancerRmsLimiter,
                                .instParams     = &InstParams_musicEnhancerRmsLimiter,
                                .headroomParams = &HeadroomParams_musicEnhancerRmsLimiter},
 #endif
-                                            {.name           = "AutoVolumeLeveler",
-                                             .controlParams  = &ControlParamSet_autoVolumeLeveler,
-                                             .instParams     = &InstParams_autoVolumeLeveler,
-                                             .headroomParams = &HeadroomParams_autoVolumeLeveler},
-                                            {.name           = "LoudnessMaximiser",
-                                             .controlParams  = &ControlParamSet_loudnessMaximiser,
-                                             .instParams     = &InstParams_loudnessMaximiser,
-                                             .headroomParams = &HeadroomParams_loudnessMaximiser},
+                              {.name           = "AutoVolumeLeveler",
+                               .controlParams  = &ControlParamSet_autoVolumeLeveler,
+                               .instParams     = &InstParams_autoVolumeLeveler,
+                               .headroomParams = &HeadroomParams_autoVolumeLeveler},
+                              {.name           = "LoudnessMaximiser",
+                               .controlParams  = &ControlParamSet_loudnessMaximiser,
+                               .instParams     = &InstParams_loudnessMaximiser,
+                               .headroomParams = &HeadroomParams_loudnessMaximiser},
 #if (ALGORITHM_CS == 1)
-                                            {.name           = "ConcertSound",
-                                             .controlParams  = &ControlParamSet_concertSound,
-                                             .instParams     = &InstParams_concertSound,
-                                             .headroomParams = &HeadroomParams_concertSound},
+                              {.name           = "ConcertSound",
+                               .controlParams  = &ControlParamSet_concertSound,
+                               .instParams     = &InstParams_concertSound,
+                               .headroomParams = &HeadroomParams_concertSound},
 #endif
 #ifndef CPU_LPC55S69JBD100_cm33_core0
-                                            {.name           = "Custom",
-                                             .controlParams  = &ControlParamSet_custom,
-                                             .instParams     = &InstParams_custom,
-                                             .headroomParams = &HeadroomParams_custom},
+                              {.name           = "Custom",
+                               .controlParams  = &ControlParamSet_custom,
+                               .instParams     = &InstParams_custom,
+                               .headroomParams = &HeadroomParams_custom},
 #endif
-                                            {.name           = "ToneGenerator",
-                                             .controlParams  = &ControlParamSet_toneGenerator,
-                                             .instParams     = &InstParams_toneGenerator,
-                                             .headroomParams = &HeadroomParams_toneGenerator},
+                              {.name           = "ToneGenerator",
+                               .controlParams  = &ControlParamSet_toneGenerator,
+                               .instParams     = &InstParams_toneGenerator,
+                               .headroomParams = &HeadroomParams_toneGenerator},
 #if (ALGORITHM_XO == 1)
-                                            {.name           = "Crossover2WaySpeakers",
-                                             .controlParams  = &ControlParamSet_Crossover2WaySpeaker,
-                                             .instParams     = &InstParams_Crossover2WaySpeaker,
-                                             .headroomParams = &HeadroomParams_Crossover2WaySpeaker},
-                                            {.name           = "CrossoverForSubwoofer",
-                                             .controlParams  = &ControlParamSet_CrossoverForSubwoofer,
-                                             .instParams     = &InstParams_CrossoverForSubwoofer,
-                                             .headroomParams = &HeadroomParams_CrossoverForSubwoofer}
+                              {.name           = "Crossover2WaySpeakers",
+                               .controlParams  = &ControlParamSet_Crossover2WaySpeaker,
+                               .instParams     = &InstParams_Crossover2WaySpeaker,
+                               .headroomParams = &HeadroomParams_Crossover2WaySpeaker},
+                              {.name           = "CrossoverForSubwoofer",
+                               .controlParams  = &ControlParamSet_CrossoverForSubwoofer,
+                               .instParams     = &InstParams_CrossoverForSubwoofer,
+                               .headroomParams = &HeadroomParams_CrossoverForSubwoofer}
 #endif
 };
 
@@ -142,8 +142,10 @@ static LVM_INT16 MallocAlign = 4; /* 4 byte Malloc alignment */
 int EAP_Init(void *arg)
 {
     LVM_ReturnStatus_en LVM_Status; /* Function call status */
-    LVM_UINT16 i;                   /* loop index */
+    LVM_UINT16 i, minIdx;           /* loop index */
     LVM_INT32 temp32;               /* temporary address */
+    LVM_INT16 j;
+    LVM_UINT16 order[LVM_NR_MEMORY_REGIONS];
 
     /******************************************************************************
     GET VERSION INFORMATION
@@ -224,17 +226,38 @@ int EAP_Init(void *arg)
         return LVM_Status;
     }
 
+    /* Initialize order variable */
     for (i = 0; i < LVM_NR_MEMORY_REGIONS; i++)
+    {
+        order[i] = i;
+    }
+
+    /* Sort region indexes by region size */
+    for (i = 0; i < (LVM_NR_MEMORY_REGIONS - 1); i++)
+    {
+        minIdx = i;
+        for (j = i + 1; j < LVM_NR_MEMORY_REGIONS; j++)
+            if (EAP_MemTab.Region[order[j]].Size < EAP_MemTab.Region[order[minIdx]].Size)
+                minIdx = j;
+
+        /* Swap indexes */
+        temp32        = order[minIdx];
+        order[minIdx] = order[i];
+        order[i]      = temp32;
+    }
+
+    /* Allocate regions in order from largest to smallest */
+    for (j = (LVM_NR_MEMORY_REGIONS - 1); j >= 0; j--)
     {
         /* Log the memory size */
-        if (EAP_MemTab.Region[i].Size != 0)
+        if (EAP_MemTab.Region[order[j]].Size != 0)
         {
-            temp32 = (LVM_INT32)osa_malloc(EAP_MemTab.Region[i].Size + (LVM_UINT32)MallocAlign);
+            temp32 = (LVM_INT32)osa_malloc(EAP_MemTab.Region[order[j]].Size + (LVM_UINT32)MallocAlign);
             if (!temp32)
             {
                 return LVM_NULLADDRESS;
             }
-            EAP_MemTab.Region[i].pBaseAddress = (LVM_INT8 *)(temp32 + MallocAlign);
+            EAP_MemTab.Region[order[j]].pBaseAddress = (LVM_INT8 *)(temp32 + MallocAlign);
         }
     }
 
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/readme.txt b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/readme.txt
index e2cd31fe5..12083e82b 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/readme.txt
@@ -40,9 +40,9 @@ Type "help" to see the command list. Similar description will be displayed on se
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/streamer_pcm.c b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/streamer_pcm.c
index 2d146bcd6..1ab897a64 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/streamer_pcm.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_playback/cm33_core0/streamer_pcm.c
@@ -37,8 +37,6 @@ void streamer_pcm_init(void)
     /* Dummy I2S TX init for the  EAP */
     I2S_TxGetDefaultConfig(&pcmHandle.tx_config);
     I2S_TxInit(DEMO_I2S_TX, &pcmHandle.tx_config);
-
-    pcmHandle.isFirstTx = 1;
 }
 
 pcm_rtos_t *streamer_pcm_open(uint32_t num_buffers)
@@ -74,36 +72,33 @@ void streamer_pcm_rx_close(pcm_rtos_t *pcm)
 
 int streamer_pcm_write(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
 {
-    pcm->i2sTxTransfer.dataSize = size;
-    pcm->i2sTxTransfer.data     = data;
-
     /* Ensure write size is a multiple of 32, otherwise EDMA will assert
      * failure.  Round down for the last chunk of a file/stream. */
-    if (size % 32)
-    {
-        pcm->i2sTxTransfer.dataSize = size - (size % 32);
-    }
+    pcm->i2sTxTransfer.dataSize = size - (size % 32);
+    pcm->i2sTxTransfer.data     = data;
 
     if (pcm->isFirstTx)
     {
+        /* need to queue two transmit buffers so when the first one
+         * finishes transfer, the other immediatelly starts */
         I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
         I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
         pcm->isFirstTx = 0;
     }
     else
     {
-        /* Wait for transfer to finish */
+        /* Wait for the previous transfer to finish */
         if (xSemaphoreTake(pcm->semaphoreTX, portMAX_DELAY) != pdTRUE)
-        {
             return -1;
-        }
+
+        I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
         I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
     }
 
     return 0;
 }
 
-int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint8_t *data2, uint32_t size)
+int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
 {
     return 0;
 }
@@ -111,8 +106,10 @@ int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint8_t *data2, uint32_t s
 int streamer_pcm_setparams(
     pcm_rtos_t *pcm, uint32_t sample_rate, uint32_t bit_width, uint8_t num_channels, bool tx, bool dummy_tx, int volume)
 {
-    int ret           = 0;
-    int divider       = 0;
+    int ret     = 0;
+    int divider = 0;
+
+    pcm->isFirstTx    = tx ? 1U : pcm->isFirstTx;
     pcm->sample_rate  = sample_rate;
     pcm->bit_width    = bit_width;
     pcm->num_channels = num_channels;
@@ -169,7 +166,7 @@ int streamer_pcm_setparams(
     I2S_TxTransferCreateHandleDMA(DEMO_I2S_TX, &pcmHandle.i2sTxHandle, &pcmHandle.i2sTxDmaHandle, TxCallback,
                                   (void *)&pcmHandle);
 
-    ret = CODEC_SetMute(&codecHandle, kCODEC_PlayChannelHeadphoneLeft | kCODEC_PlayChannelHeadphoneRight, true);
+    ret = streamer_pcm_set_volume(pcm, 0);
     if (ret != kStatus_Success)
     {
         return 1;
@@ -214,11 +211,6 @@ int streamer_pcm_set_volume(pcm_rtos_t *pcm, int volume)
 {
     int channel;
 
-    if (get_eap_att_control()->status == kAttPaused)
-    {
-        pcm->isFirstTx = 1;
-    }
-
     channel = (pcm->num_channels == 1) ? kCODEC_PlayChannelHeadphoneLeft :
                                          kCODEC_PlayChannelHeadphoneLeft | kCODEC_PlayChannelHeadphoneRight;
 
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_playback/pin_mux.c b/boards/lpcxpresso55s69/audio_examples/maestro_playback/pin_mux.c
index c221dc932..f5ae1bd43 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_playback/pin_mux.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_playback/pin_mux.c
@@ -62,8 +62,6 @@ BOARD_InitPins:
     mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
   - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
     mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled, asw: enabled}
-  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
-    mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
   - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: fast, invert: disabled,
     open_drain: disabled}
   - {pin_num: '6', peripheral: SDIF, signal: SD0_CLK, pin_signal: PIO0_7/FC3_RTS_SCL_SSEL1/SD0_CLK/FC5_SCK/FC1_SCK/SECURE_GPIO0_7, mode: inactive, slew_rate: fast,
@@ -192,21 +190,6 @@ void BOARD_InitPins(void)
     /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
     IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
 
-    const uint32_t port1_pin13_config = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC2 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Fast mode, slew rate control is disabled */
-                                         IOCON_PIO_SLEW_FAST |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 1U, 13U, port1_pin13_config);
-
     const uint32_t port1_pin16_config = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
                                          IOCON_PIO_FUNC2 |
                                          /* Selects pull-up function */
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/FreeRTOSConfig.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/FreeRTOSConfig.h
new file mode 100644
index 000000000..4f5f17c5e
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/FreeRTOSConfig.h
@@ -0,0 +1,194 @@
+/*
+ * FreeRTOS Kernel V10.4.3
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+/* Ensure stdint is only used by the compiler, and not the assembler. */
+#if defined( __ICCARM__ ) || defined( __ARMCC_VERSION ) || defined( __GNUC__)
+    #include <stdint.h>
+    extern uint32_t SystemCoreClock;
+    extern int DbgConsole_Printf( const char *fmt_s, ... );
+    extern void vLoggingPrintf( const char *pcFormat, ... );
+#endif
+
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_TICKLESS_IDLE                 0
+#define configCPU_CLOCK_HZ                      (SystemCoreClock)
+#define configTICK_RATE_HZ                      ((TickType_t)1000)
+#define configMAX_PRIORITIES                    7
+#define configMINIMAL_STACK_SIZE                ((unsigned short)90)
+#define configMAX_TASK_NAME_LEN                 20
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               8
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     0
+#define configUSE_APPLICATION_TASK_TAG          0
+
+/* Memory allocation related definitions. */
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+#if (defined(CPU_MIMXRT1051DVL6B) || defined(CPU_MIMXRT1052DVL6B))
+#define configTOTAL_HEAP_SIZE                   ((size_t) (252 * 1024))
+#elif defined(CPU_LPC55S69JBD100_cm33_core0)
+#define configTOTAL_HEAP_SIZE                   ((size_t) (220 * 1024))
+#else
+#define configTOTAL_HEAP_SIZE                   ((size_t) (734 * 1024))
+#endif
+#define configAPPLICATION_ALLOCATED_HEAP        0
+
+#define configCHECK_FOR_STACK_OVERFLOW          1
+#define configRECORD_STACK_HIGH_ADDRESS         1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                     0
+#define configUSE_TICK_HOOK                     0
+#define configUSE_MALLOC_FAILED_HOOK            1
+#define configUSE_DAEMON_TASK_STARTUP_HOOK      0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS           0
+#define configUSE_STATS_FORMATTING_FUNCTIONS    0
+#define configUSE_TRACE_FACILITY                0
+
+/* Co-routine related definitions. */
+#define configUSE_CO_ROUTINES                   0
+#define configMAX_CO_ROUTINE_PRIORITIES         2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                        1
+#define configTIMER_TASK_PRIORITY               (configMAX_PRIORITIES - 3)
+#define configTIMER_QUEUE_LENGTH                10
+#define configTIMER_TASK_STACK_DEPTH            (configMINIMAL_STACK_SIZE * 4)
+
+/* Define to trap errors during development. */
+#define configASSERT(x) if((x) == 0) {taskDISABLE_INTERRUPTS(); for (;;);}
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet                1
+#define INCLUDE_uxTaskPriorityGet               1
+#define INCLUDE_vTaskDelete                     1
+#define INCLUDE_vTaskSuspend                    1
+#define INCLUDE_vTaskDelayUntil                 1
+#define INCLUDE_vTaskDelay                      1
+#define INCLUDE_xTaskGetSchedulerState          1
+#define INCLUDE_xTaskGetCurrentTaskHandle       1
+#define INCLUDE_uxTaskGetStackHighWaterMark     1
+#define INCLUDE_xTaskGetIdleTaskHandle          0
+#define INCLUDE_eTaskGetState                   0
+#define INCLUDE_xTimerPendFunctionCall          1
+#define INCLUDE_xTaskAbortDelay                 0
+#define INCLUDE_xTaskGetHandle                  0
+
+/* Demo specific macros that allow the application writer to insert code to be
+ * executed immediately before the MCU's STOP low power mode is entered and exited
+ * respectively.  These macros are in addition to the standard
+ * configPRE_SLEEP_PROCESSING() and configPOST_SLEEP_PROCESSING() macros, which are
+ * called pre and post the low power SLEEP mode being entered and exited.  These
+ * macros can be used to turn turn off and on IO, clocks, the Flash etc. to obtain
+ * the lowest power possible while the tick is off. */
+#if defined( __ICCARM__ ) || defined( __CC_ARM ) || defined( __GNUC__ )
+    void vMainPreStopProcessing( void );
+    void vMainPostStopProcessing( void );
+#endif /* defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__) */
+
+#define configPRE_STOP_PROCESSING     vMainPreStopProcessing
+#define configPOST_STOP_PROCESSING    vMainPostStopProcessing
+
+
+
+
+#if defined(__ICCARM__)||defined(__CC_ARM)||defined(__GNUC__)
+    /* Clock manager provides in this variable system core clock frequency */
+    #include <stdint.h>
+    extern uint32_t SystemCoreClock;
+#endif
+
+
+#ifndef configENABLE_FPU
+  #define configENABLE_FPU                        1
+#endif
+#ifndef configENABLE_MPU
+  #define configENABLE_MPU                        0
+#endif
+#ifndef configENABLE_TRUSTZONE
+  #define configENABLE_TRUSTZONE                  0
+#endif
+#ifndef configRUN_FREERTOS_SECURE_ONLY
+  #define configRUN_FREERTOS_SECURE_ONLY          1
+#endif
+
+/* Interrupt nesting behaviour configuration. Cortex-M specific. */
+#ifdef __NVIC_PRIO_BITS
+/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+#define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+#define configPRIO_BITS 3 /* 8 priority levels */
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1U << (configPRIO_BITS)) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define vPortPendSVHandler PendSV_Handler
+#define vPortSysTickHandler SysTick_Handler
+
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_definitions.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_definitions.h
new file mode 100644
index 000000000..844eb3e0f
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_definitions.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright 2021 NXP
+ * All rights reserved.
+ *
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef _APP_DEFINITIONS_H_
+#define _APP_DEFINITIONS_H_
+
+/*${header:start}*/
+/*${header:end}*/
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+/*${macro:start}*/
+#define DEMO_I2C                        (I2C4)
+#define DEMO_I2S_MASTER_CLOCK_FREQUENCY (24576000)
+#define DEMO_I2S_TX                     (I2S7)
+#define DEMO_I2S_RX                     (I2S6)
+#define DEMO_DMA                        (DMA0)
+#define DEMO_I2S_TX_CHANNEL             (19)
+#define DEMO_I2S_RX_CHANNEL             (16)
+#define DEMO_I2S_RX_MODE                (kI2S_MasterSlaveNormalSlave)
+#define DEMO_I2S_TX_MODE                (kI2S_MasterSlaveNormalMaster)
+#define DEMO_CHANNEL_NUM                (2)
+
+#define DEMO_VOLUME (75)
+/*${macro:end}*/
+
+#endif /* _APP_DEFINITIONS_H_ */
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_streamer.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_streamer.c
new file mode 100644
index 000000000..a44e2061f
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_streamer.c
@@ -0,0 +1,439 @@
+/*
+ * Copyright 2020-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "osa_common.h"
+#include "fsl_common.h"
+#include "fsl_debug_console.h"
+
+#include "app_streamer.h"
+#include "streamer_pcm_app.h"
+#ifdef VIT_PROC
+#include "vit_proc.h"
+#endif
+#include "app_definitions.h"
+
+#define APP_STREAMER_MSG_QUEUE     "app_queue"
+#define STREAMER_TASK_NAME         "Streamer"
+#define STREAMER_MESSAGE_TASK_NAME "StreamerMessage"
+
+#ifdef OPUS_ENCODE
+#define STREAMER_OPUS_TASK_STACK_SIZE 60 * 1024
+#endif
+#define STREAMER_TASK_STACK_SIZE         4 * 1024
+#define STREAMER_MESSAGE_TASK_STACK_SIZE 512
+#define MAX_FILE_NAME_LENGTH             100
+
+ringbuf_t *audioBuffer;
+OsaMutex audioMutex;
+OsaThread msg_thread;
+
+/*!
+ * @brief Streamer task for communicating messages
+ *
+ * This function is the entry point of a task that is manually created by
+ * STREAMER_Create.  It listens on a message queue and receives status updates
+ * about errors, audio playback state and position.  The application can make
+ * use of this data.
+ *
+ * @param arg Data to be passed to the task
+ */
+static void STREAMER_MessageTask(void *arg)
+{
+    OsaMq mq;
+    STREAMER_MSG_T msg;
+    streamer_handle_t *handle;
+    bool exit_thread = false;
+    int ret;
+
+    handle = (streamer_handle_t *)arg;
+
+    PRINTF("[STREAMER] Message Task started\r\n");
+
+    ret = osa_mq_open(&mq, APP_STREAMER_MSG_QUEUE, STREAMER_MSG_SIZE, true);
+    if (ERRCODE_NO_ERROR != ret)
+    {
+        PRINTF("osa_mq_open failed: %d\r\n", ret);
+        return;
+    }
+
+    do
+    {
+        ret = osa_mq_receive(&mq, (void *)&msg, STREAMER_MSG_SIZE, 0, NULL);
+        if (ret != ERRCODE_NO_ERROR)
+        {
+            PRINTF("osa_mq_receiver error: %d\r\n", ret);
+            continue;
+        }
+
+        switch (msg.id)
+        {
+            case STREAM_MSG_ERROR:
+                PRINTF("STREAM_MSG_ERROR\r\n");
+                exit_thread = true;
+                STREAMER_Stop(handle);
+                break;
+            case STREAM_MSG_EOS:
+                PRINTF("\nSTREAM_MSG_EOS\r\n");
+                exit_thread = true;
+                /* Indicate to other software layers that playing has ended. */
+                STREAMER_Stop(handle);
+                break;
+            case STREAM_MSG_UPDATE_POSITION:
+                PRINTF("STREAM_MSG_UPDATE_POSITION..");
+                PRINTF(" position: %d ms\r", msg.event_data);
+                break;
+            case STREAM_MSG_CLOSE_TASK:
+                PRINTF("STREAM_MSG_CLOSE_TASK\r\n");
+                exit_thread = true;
+                break;
+            default:
+                break;
+        }
+
+    } while (!exit_thread);
+
+    osa_mq_close(&mq);
+    osa_mq_destroy(APP_STREAMER_MSG_QUEUE);
+
+    osa_thread_destroy(msg_thread);
+}
+
+int STREAMER_Read(uint8_t *data, uint32_t size)
+{
+    uint32_t bytes_read;
+
+    osa_mutex_lock(&audioMutex);
+    bytes_read = ringbuf_read(audioBuffer, data, size);
+    osa_mutex_unlock(&audioMutex);
+
+    if (bytes_read != size)
+    {
+        PRINTF("[STREAMER WARN] read underrun: size: %d, read: %d\r\n", size, bytes_read);
+    }
+
+    return bytes_read;
+}
+
+int STREAMER_Write(uint8_t *data, uint32_t size)
+{
+    uint32_t written;
+
+    osa_mutex_lock(&audioMutex);
+    written = ringbuf_write(audioBuffer, data, size);
+    osa_mutex_unlock(&audioMutex);
+
+    if (written != size)
+    {
+        PRINTF("[STREAMER ERR] write overflow: size %d, written %d\r\n", size, written);
+    }
+
+    return written;
+}
+
+bool STREAMER_IsPlaying(streamer_handle_t *handle)
+{
+    return handle->audioPlaying;
+}
+
+void STREAMER_Start(streamer_handle_t *handle)
+{
+    PRINTF("[STREAMER] start \r\n");
+
+    handle->audioPlaying = true;
+    streamer_set_state(handle->streamer, 0, STATE_PLAYING, true);
+}
+
+void STREAMER_Stop(streamer_handle_t *handle)
+{
+    PRINTF("[STREAMER] stop \r\n");
+
+    handle->audioPlaying = false;
+    streamer_set_state(handle->streamer, 0, STATE_NULL, true);
+
+    /* Empty input ringbuffer. */
+    if (audioBuffer)
+    {
+        ringbuf_clear(audioBuffer);
+    }
+}
+
+status_t STREAMER_Create(streamer_handle_t *handle)
+{
+    STREAMER_CREATE_PARAM params;
+    ELEMENT_PROPERTY_T prop;
+    OsaThreadAttr thread_attr;
+    int ret;
+
+    osa_mutex_create(&audioMutex, false);
+    audioBuffer = ringbuf_create(AUDIO_BUFFER_SIZE);
+    if (!audioBuffer)
+    {
+        return kStatus_Fail;
+    }
+
+    /* Create message process thread */
+    osa_thread_attr_init(&thread_attr);
+    osa_thread_attr_set_name(&thread_attr, STREAMER_MESSAGE_TASK_NAME);
+    osa_thread_attr_set_stack_size(&thread_attr, STREAMER_MESSAGE_TASK_STACK_SIZE);
+    ret = osa_thread_create(&msg_thread, &thread_attr, STREAMER_MessageTask, (void *)handle);
+    osa_thread_attr_destroy(&thread_attr);
+    if (ERRCODE_NO_ERROR != ret)
+    {
+        return kStatus_Fail;
+    }
+
+    /* Create streamer */
+    strcpy(params.out_mq_name, APP_STREAMER_MSG_QUEUE);
+    params.stack_size    = STREAMER_TASK_STACK_SIZE;
+    params.pipeline_type = STREAM_PIPELINE_NETBUF;
+    params.task_name     = STREAMER_TASK_NAME;
+    params.in_dev_name   = "";
+    params.out_dev_name  = "";
+
+    handle->streamer = streamer_create(&params);
+    if (!handle->streamer)
+    {
+        return kStatus_Fail;
+    }
+
+    prop.prop = PROP_NETBUFSRC_SET_CALLBACK;
+    prop.val  = (uintptr_t)STREAMER_Read;
+
+    streamer_set_property(handle->streamer, prop, true);
+
+    prop.prop = PROP_DECODER_DECODER_TYPE;
+    prop.val  = DECODER_TYPE_MP3;
+
+    streamer_set_property(handle->streamer, prop, true);
+
+    handle->audioPlaying = false;
+
+    return kStatus_Success;
+}
+
+status_t STREAMER_mic_Create(streamer_handle_t *handle, out_sink_t out_sink, char *file_name)
+{
+    STREAMER_CREATE_PARAM params;
+    OsaThreadAttr thread_attr;
+    ELEMENT_PROPERTY_T prop;
+    int ret;
+
+    /* Create message process thread */
+    osa_thread_attr_init(&thread_attr);
+    osa_thread_attr_set_name(&thread_attr, STREAMER_MESSAGE_TASK_NAME);
+    osa_thread_attr_set_stack_size(&thread_attr, STREAMER_MESSAGE_TASK_STACK_SIZE);
+    ret = osa_thread_create(&msg_thread, &thread_attr, STREAMER_MessageTask, (void *)handle);
+    osa_thread_attr_destroy(&thread_attr);
+    if (ERRCODE_NO_ERROR != ret)
+    {
+        return kStatus_Fail;
+    }
+
+    /* Create streamer */
+    strcpy(params.out_mq_name, APP_STREAMER_MSG_QUEUE);
+    params.stack_size = STREAMER_TASK_STACK_SIZE;
+
+    switch (out_sink)
+    {
+        case AUDIO_SINK:
+            params.pipeline_type = STREAM_PIPELINE_PCM;
+            params.out_dev_name  = "";
+            break;
+
+        case FILE_SINK:
+            params.pipeline_type = STREAM_PIPELINE_MIC2FILE;
+            params.out_dev_name  = "file";
+            break;
+
+        case VIT_SINK:
+            params.pipeline_type = STREAM_PIPELINE_VIT;
+            params.out_dev_name  = "";
+            break;
+
+        default:
+            PRINTF("[STREAMER ERR] wrong type of sink\r\n");
+            return kStatus_InvalidArgument;
+    }
+
+    params.task_name   = STREAMER_TASK_NAME;
+    params.in_dev_name = "microphone";
+
+    handle->streamer = streamer_create(&params);
+    if (!handle->streamer)
+    {
+        return kStatus_Fail;
+    }
+
+#ifdef VIT_PROC
+    if (params.pipeline_type == STREAM_PIPELINE_VIT)
+    {
+        EXT_PROCESS_DESC_T vit_proc = {VIT_Initialize_func, VIT_Execute_func, VIT_Deinit_func, &Vit_Language, 0};
+
+        prop.prop = PROP_VITSINK_FPOINT;
+        prop.val  = (uintptr_t)&vit_proc;
+
+        streamer_set_property(handle->streamer, prop, true);
+    }
+#else
+    if (params.pipeline_type == STREAM_PIPELINE_VIT)
+    {
+        PRINTF("[STREAMER] VIT pipeline not available for this config\r\n switching to audio sink");
+        params.pipeline_type = STREAM_PIPELINE_PCM;
+    }
+#endif
+
+    prop.prop = PROP_AUDIOSRC_SET_SAMPLE_RATE;
+    prop.val  = 16000;
+
+    streamer_set_property(handle->streamer, prop, true);
+
+#if DEMO_CODEC_CS42448
+    prop.prop = PROP_AUDIOSRC_SET_NUM_CHANNELS;
+    prop.val  = 8;
+
+    streamer_set_property(handle->streamer, prop, true);
+
+    prop.prop = PROP_AUDIOSRC_SET_BITS_PER_SAMPLE;
+    prop.val  = 32;
+
+    streamer_set_property(handle->streamer, prop, true);
+#endif
+
+    if (out_sink == FILE_SINK)
+    {
+        char file_name_val[MAX_FILE_NAME_LENGTH];
+        memcpy(file_name_val, file_name == NULL ? "tmp" : file_name, MAX_FILE_NAME_LENGTH);
+        strcat(file_name_val, ".pcm");
+
+        prop.prop = PROP_FILESINK_LOCATION;
+        prop.val  = (uintptr_t)file_name_val;
+
+        streamer_set_property(handle->streamer, prop, true);
+    }
+
+    return kStatus_Success;
+}
+
+#ifdef OPUS_ENCODE
+status_t STREAMER_opusmem2mem_Create(streamer_handle_t *handle,
+                                     CeiBitstreamInfo *info,
+                                     MEMSRC_SET_BUFFER_T *inBuf,
+                                     SET_BUFFER_DESC_T *outBuf)
+{
+    STREAMER_CREATE_PARAM params;
+    OsaThreadAttr thread_attr;
+    ELEMENT_PROPERTY_T prop;
+    int ret;
+
+    /* Create message process thread */
+    osa_thread_attr_init(&thread_attr);
+    osa_thread_attr_set_name(&thread_attr, STREAMER_MESSAGE_TASK_NAME);
+    osa_thread_attr_set_stack_size(&thread_attr, STREAMER_MESSAGE_TASK_STACK_SIZE);
+    ret = osa_thread_create(&msg_thread, &thread_attr, STREAMER_MessageTask, (void *)handle);
+    osa_thread_attr_destroy(&thread_attr);
+    if (ERRCODE_NO_ERROR != ret)
+    {
+        return kStatus_Fail;
+    }
+
+    /* Create streamer */
+    strcpy(params.out_mq_name, APP_STREAMER_MSG_QUEUE);
+    params.stack_size    = STREAMER_OPUS_TASK_STACK_SIZE;
+    params.pipeline_type = STREAM_PIPELINE_OPUS_MEM2MEM;
+    params.task_name     = STREAMER_TASK_NAME;
+
+    handle->streamer = streamer_create(&params);
+    if (!handle->streamer)
+    {
+        return kStatus_Fail;
+    }
+
+    prop.prop = PROP_MEMSRC_SET_BUFF;
+    prop.val  = (uintptr_t)inBuf;
+    ret       = streamer_set_property(handle->streamer, prop, true);
+    if (ret != STREAM_OK)
+    {
+        streamer_destroy(handle->streamer);
+        handle->streamer = NULL;
+
+        return kStatus_Fail;
+    }
+
+    prop.prop = PROP_MEMSINK_BUFFER_DESC;
+    prop.val  = (uintptr_t)outBuf;
+    ret       = streamer_set_property(handle->streamer, prop, true);
+    if (ret != STREAM_OK)
+    {
+        streamer_destroy(handle->streamer);
+        handle->streamer = NULL;
+
+        return kStatus_Fail;
+    }
+
+    prop.prop = PROP_ENCODER_TYPE;
+    prop.val  = (uintptr_t)CEIENC_OPUS;
+    ret       = streamer_set_property(handle->streamer, prop, true);
+    if (ret != STREAM_OK)
+    {
+        streamer_destroy(handle->streamer);
+        handle->streamer = NULL;
+
+        return kStatus_Fail;
+    }
+
+    prop.prop = PROP_ENCODER_BITSTREAMINFO;
+    prop.val  = (uintptr_t)info;
+    ret       = streamer_set_property(handle->streamer, prop, true);
+    if (ret != STREAM_OK)
+    {
+        streamer_destroy(handle->streamer);
+        handle->streamer = NULL;
+
+        return kStatus_Fail;
+    }
+
+    return kStatus_Success;
+}
+#endif
+
+void STREAMER_Destroy(streamer_handle_t *handle)
+{
+    streamer_destroy(handle->streamer);
+    handle->streamer = NULL;
+
+    if (audioMutex != NULL)
+    {
+        osa_mutex_destroy(&audioMutex);
+        audioMutex = NULL;
+    }
+    if (audioBuffer != NULL)
+    {
+        ringbuf_destroy(audioBuffer);
+        audioBuffer = NULL;
+    }
+    deinit_logging();
+    osa_deinit();
+}
+
+void STREAMER_Init(void)
+{
+    /* Initialize OSA*/
+    osa_init();
+
+    /* Initialize logging */
+    init_logging();
+
+    add_module_name(LOGMDL_STREAMER, "STREAMER");
+
+    /* Uncomment below to turn on full debug logging for the streamer. */
+    // set_debug_module(0xffffffff);
+    // set_debug_level(LOGLVL_DEBUG);
+    // get_debug_state();
+
+    /* Initialize streamer PCM management library. */
+    streamer_pcm_init();
+}
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_streamer.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_streamer.h
new file mode 100644
index 000000000..ebbe7b16f
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/app_streamer.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright 2020-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _FSL_STREAMER_H_
+#define _FSL_STREAMER_H_
+
+/* streamer library includes. */
+#include "streamer_api.h"
+#include "streamer_element_properties.h"
+#include "streamer_error.h"
+#ifdef OPUS_ENCODE
+#include "opus.h"
+#endif
+#include "cei.h"
+#include "cei_enctypes.h"
+
+#ifdef VIT_PROC
+#include "vit_proc.h"
+#endif
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*! @brief Maestro network audio buffer size */
+#define AUDIO_BUFFER_SIZE (30 * 1024)
+
+/*! @brief Maestro Streamer interface structure */
+typedef struct _streamer_handle_t
+{
+    STREAMER_T *streamer;
+    volatile bool audioPlaying;
+} streamer_handle_t;
+
+typedef enum
+{
+    AUDIO_SINK,
+    FILE_SINK,
+    VIT_SINK
+} out_sink_t;
+/*******************************************************************************
+ * API
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Initialize the Maestro streamer interface
+ *
+ * This function initializes the Maestro streamer library, and initializes the PCM
+ * output interface.  This function should be called before creating a streamer
+ * handle.
+ */
+void STREAMER_Init(void);
+
+/*!
+ * @brief Create a Maestro streamer interface handle
+ *
+ * This function creates a Maestro streamer interface and starts a task for
+ * handling media playback, and a task for sending status and error messages
+ * back to the application.
+ *
+ * @param handle Pointer to input handle
+ * @return kStatus_Success on success, otherwise an error.
+ */
+status_t STREAMER_Create(streamer_handle_t *handle);
+
+/*!
+ * @brief Create a Maestro streamer interface handle
+ *
+ * This function creates a Maestro streamer interface and starts a task for
+ * handling mic
+ *
+ * @param handle Pointer to input handle
+ * @param out sink type
+ * @param file_name The specified file name for saving samples. If not used, use NULL.
+ * @return kStatus_Success on success, otherwise an error.
+ */
+
+status_t STREAMER_mic_Create(streamer_handle_t *handle, out_sink_t out_sink, char *file_name);
+
+#ifdef OPUS_ENCODE
+status_t STREAMER_opusmem2mem_Create(streamer_handle_t *handle,
+                                     CeiBitstreamInfo *info,
+                                     MEMSRC_SET_BUFFER_T *inBuf,
+                                     SET_BUFFER_DESC_T *outBuf);
+#endif
+
+/*!
+ * @brief Destroy an Maestro streamer interface handle
+ *
+ * This function destroys an Maestro streamer interface and frees associated memory.
+ *
+ * @param handle Pointer to input handle
+ */
+void STREAMER_Destroy(streamer_handle_t *handle);
+
+/*!
+ * @brief Start audio playback for the streamer interface
+ *
+ * This function puts the streamer in a playing state, and begins pulling data
+ * from the internal ring buffer, filled with calls to STREAMER_Start.
+ *
+ * @param handle Pointer to input handle
+ */
+void STREAMER_Start(streamer_handle_t *handle);
+
+/*!
+ * @brief Stop audio playback for the streamer interface
+ *
+ * This function puts the streamer in a stopped state, and ends playback from
+ * the audio buffer.  The internal audio buffer is cleared of any data.
+ *
+ * @param handle Pointer to input handle
+ */
+void STREAMER_Stop(streamer_handle_t *handle);
+
+/*!
+ * @brief Check if streamer interface is playing
+ *
+ * This function returns true/false of the playing state for the interface
+ *
+ * @param handle Pointer to input handle
+ * @return true if playing, false if not
+ */
+bool STREAMER_IsPlaying(streamer_handle_t *handle);
+
+/*!
+ * @brief Write audio data to the streamer interface
+ *
+ * This function pushes data onto the internal audio ring buffer for processing
+ * by the audio streamer.
+ *
+ * @param data Pointer to audio data
+ * @param size Size in bytes of the audio data
+ * @return Number of bytes successfully written.  If this is less than the
+ *         'size' parameter, an overflow has occured.
+ */
+int STREAMER_Write(uint8_t *data, uint32_t size);
+
+/*!
+ * @brief Read audio data from the internal audio ring buffer
+ *
+ * This function is called internally by the streamer (passed as a callback
+ * function) to consume and process data from the ring buffer.
+ *
+ * @param data Pointer to buffer to copy audio data into
+ * @param size Size in bytes of the buffer to fill
+ * @return Number of bytes successfully read.  If this is less than the
+ *         'size' parameter, an underflow has occured.
+ */
+int STREAMER_Read(uint8_t *data, uint32_t size);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/CMakeLists.txt b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/CMakeLists.txt
new file mode 100644
index 000000000..d45ecaa4c
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/CMakeLists.txt
@@ -0,0 +1,248 @@
+# CROSS COMPILER SETTING
+SET(CMAKE_SYSTEM_NAME Generic)
+CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
+
+# THE VERSION NUMBER
+SET (Tutorial_VERSION_MAJOR 1)
+SET (Tutorial_VERSION_MINOR 0)
+
+# ENABLE ASM
+ENABLE_LANGUAGE(ASM)
+
+SET(CMAKE_STATIC_LIBRARY_PREFIX)
+SET(CMAKE_STATIC_LIBRARY_SUFFIX)
+
+SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
+SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
+
+# CURRENT DIRECTORY
+SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
+
+SET(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
+SET(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
+
+
+project(maestro_record)
+
+set(MCUX_SDK_PROJECT_NAME maestro_record.elf)
+
+include(${ProjDirPath}/flags.cmake)
+
+include(${ProjDirPath}/config.cmake)
+
+add_executable(${MCUX_SDK_PROJECT_NAME} 
+"${ProjDirPath}/../streamer_pcm.c"
+"${ProjDirPath}/../streamer_pcm_app.h"
+"${ProjDirPath}/../app_streamer.c"
+"${ProjDirPath}/../app_streamer.h"
+"${ProjDirPath}/../cmd.c"
+"${ProjDirPath}/../cmd.h"
+"${ProjDirPath}/../main.c"
+"${ProjDirPath}/../main.h"
+"${ProjDirPath}/../../pin_mux.c"
+"${ProjDirPath}/../../pin_mux.h"
+"${ProjDirPath}/../FreeRTOSConfig.h"
+"${ProjDirPath}/../ffconf.h"
+"${ProjDirPath}/../sdmmc_config.c"
+"${ProjDirPath}/../sdmmc_config.h"
+"${ProjDirPath}/../app_definitions.h"
+"${ProjDirPath}/../board.c"
+"${ProjDirPath}/../board.h"
+"${ProjDirPath}/../clock_config.c"
+"${ProjDirPath}/../clock_config.h"
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    ${ProjDirPath}/..
+    ${ProjDirPath}/../..
+    ${ProjDirPath}/../../../..
+)
+
+set(CMAKE_MODULE_PATH
+    ${ProjDirPath}/../../../../../../rtos/freertos/freertos_kernel
+    ${ProjDirPath}/../../../../../../components/codec/wm8904
+    ${ProjDirPath}/../../../../../../components/codec
+    ${ProjDirPath}/../../../../../../devices/LPC55S69/drivers
+    ${ProjDirPath}/../../../../../../components/codec/i2c
+    ${ProjDirPath}/../../../../../../components/i2c
+    ${ProjDirPath}/../../../../../../middleware/sdmmc
+    ${ProjDirPath}/../../../../../../devices/LPC55S69/utilities
+    ${ProjDirPath}/../../../../../../middleware/maestro
+    ${ProjDirPath}/../../../../../../middleware/fatfs
+    ${ProjDirPath}/../../../../../../devices/LPC55S69
+    ${ProjDirPath}/../../../../../../components/uart
+    ${ProjDirPath}/../../../../../../components/serial_manager
+    ${ProjDirPath}/../../../../../../components/lists
+    ${ProjDirPath}/../../../../../../CMSIS/Core/Include
+    ${ProjDirPath}/../../../../../../components/osa
+)
+
+# include modules
+include(middleware_freertos-kernel_cm33_nonsecure_port_LPC55S69_cm33_core0)
+
+include(driver_wm8904_LPC55S69_cm33_core0)
+
+include(driver_codec_LPC55S69_cm33_core0)
+
+include(driver_common_LPC55S69_cm33_core0)
+
+include(component_wm8904_adapter_LPC55S69_cm33_core0)
+
+include(component_codec_i2c_LPC55S69_cm33_core0)
+
+include(component_flexcomm_i2c_adapter_LPC55S69_cm33_core0)
+
+include(driver_sysctl_LPC55S69_cm33_core0)
+
+include(middleware_sdmmc_sd_LPC55S69_cm33_core0)
+
+include(middleware_sdmmc_common_LPC55S69_cm33_core0)
+
+include(middleware_sdmmc_host_sdif_LPC55S69_cm33_core0)
+
+include(middleware_sdmmc_host_sdif_freertos_LPC55S69_cm33_core0)
+
+include(driver_lpc_iocon_LPC55S69_cm33_core0)
+
+include(driver_flexcomm_i2c_LPC55S69_cm33_core0)
+
+include(driver_flexcomm_i2s_LPC55S69_cm33_core0)
+
+include(utility_shell_LPC55S69_cm33_core0)
+
+include(driver_flexcomm_usart_LPC55S69_cm33_core0)
+
+include(driver_lpc_dma_LPC55S69_cm33_core0)
+
+include(driver_flexcomm_i2s_dma_LPC55S69_cm33_core0)
+
+include(middleware_freertos-kernel_heap_4_LPC55S69_cm33_core0)
+
+include(middleware_maestro_framework_LPC55S69_cm33_core0)
+
+include(middleware_fatfs_LPC55S69_cm33_core0)
+
+include(middleware_fatfs_sd_LPC55S69_cm33_core0)
+
+include(driver_clock_LPC55S69_cm33_core0)
+
+include(driver_power_LPC55S69_cm33_core0)
+
+include(device_LPC55S69_CMSIS_LPC55S69_cm33_core0)
+
+include(device_LPC55S69_startup_LPC55S69_cm33_core0)
+
+include(driver_flexcomm_LPC55S69_cm33_core0)
+
+include(driver_lpc_gpio_LPC55S69_cm33_core0)
+
+include(utility_assert_LPC55S69_cm33_core0)
+
+include(utility_debug_console_LPC55S69_cm33_core0)
+
+include(component_usart_adapter_LPC55S69_cm33_core0)
+
+include(component_serial_manager_LPC55S69_cm33_core0)
+
+include(component_lists_LPC55S69_cm33_core0)
+
+include(component_serial_manager_uart_LPC55S69_cm33_core0)
+
+include(middleware_freertos-kernel_LPC55S69_cm33_core0)
+
+include(middleware_freertos-kernel_extension_LPC55S69_cm33_core0)
+
+include(driver_reset_LPC55S69_cm33_core0)
+
+include(CMSIS_Include_core_cm_LPC55S69_cm33_core0)
+
+include(middleware_sdmmc_osa_freertos_LPC55S69_cm33_core0)
+
+include(component_osa_free_rtos_LPC55S69_cm33_core0)
+
+include(driver_sdif_LPC55S69_cm33_core0)
+
+include(middleware_maestro_framework_doc_LPC55S69_cm33_core0)
+
+include(utilities_misc_utilities_LPC55S69_cm33_core0)
+
+include(device_LPC55S69_system_LPC55S69_cm33_core0)
+
+
+TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--start-group)
+
+target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE m)
+
+target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE c)
+
+target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE gcc)
+
+target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE nosys)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmaestro_streamer.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmaestro_cci.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmaestro_utils.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmp3.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libopus.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libogg.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libsrc48.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL debug)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libwav.a)
+endif(CMAKE_BUILD_TYPE STREQUAL debug)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmaestro_streamer.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmaestro_cci.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmaestro_utils.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libmp3.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libopus.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libogg.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libsrc48.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+if(CMAKE_BUILD_TYPE STREQUAL release)
+    target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${ProjDirPath}/../../../../../../middleware/maestro/libs/cm33f/armgcc/release/libwav.a)
+endif(CMAKE_BUILD_TYPE STREQUAL release)
+
+TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
+
+
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/LPC55S69_cm33_core0_flash.ld b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/LPC55S69_cm33_core0_flash.ld
similarity index 91%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/LPC55S69_cm33_core0_flash.ld
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/LPC55S69_cm33_core0_flash.ld
index ef9bc99b6..61eb4fbb6 100644
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/LPC55S69_cm33_core0_flash.ld
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/LPC55S69_cm33_core0_flash.ld
@@ -7,13 +7,13 @@
 **     Compiler:            GNU C Compiler
 **     Reference manual:    LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3  16 May 2019
 **     Version:             rev. 1.1, 2019-05-16
-**     Build:               b210928
+**     Build:               b200722
 **
 **     Abstract:
 **         Linker file for the GNU C Compiler
 **
 **     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2021 NXP
+**     Copyright 2016-2020 NXP
 **     All rights reserved.
 **
 **     SPDX-License-Identifier: BSD-3-Clause
@@ -29,32 +29,23 @@
 /* Entry Point */
 ENTRY(Reset_Handler)
 
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800;
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x2000;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
 RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0;
 
 /* Specify the memory areas */
 MEMORY
 {
   m_interrupts          (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000200
-  m_text                (RX)  : ORIGIN = 0x00000200, LENGTH = 0x00071E00
-  m_core1_image         (RX)  : ORIGIN = 0x00072000, LENGTH = 0x0002B800
-  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00033000 - RPMSG_SHMEM_SIZE
-  rpmsg_sh_mem          (RW)  : ORIGIN = 0x20033000 - RPMSG_SHMEM_SIZE, LENGTH = RPMSG_SHMEM_SIZE
+  m_text                (RX)  : ORIGIN = 0x00000200, LENGTH = 0x00097E00
+  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00040000 - RPMSG_SHMEM_SIZE
+  rpmsg_sh_mem          (RW)  : ORIGIN = 0x20040000 - RPMSG_SHMEM_SIZE, LENGTH = RPMSG_SHMEM_SIZE
   m_usb_sram            (RW)  : ORIGIN = 0x40100000, LENGTH = 0x00004000
 }
 
 /* Define output sections */
 SECTIONS
 {
-  /* section for storing the secondary core image */
-  .core1_code :
-  {
-     . = ALIGN(4) ;
-    KEEP (*(.core1_code))
-     *(.core1_code*)
-     . = ALIGN(4) ;
-  } > m_core1_image
 
   /* NOINIT section for rpmsg_sh_mem */
   .noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4)
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_all.bat b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_all.bat
similarity index 61%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_all.bat
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_all.bat
index f90389d0b..1205ab083 100644
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_all.bat
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_all.bat
@@ -2,14 +2,14 @@ if exist CMakeFiles (RD /s /Q CMakeFiles)
 if exist Makefile (DEL /s /Q /F Makefile)
 if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
 if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
 mingw32-make -j
 
 if exist CMakeFiles (RD /s /Q CMakeFiles)
 if exist Makefile (DEL /s /Q /F Makefile)
 if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
 if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
 mingw32-make -j
 
 IF "%1" == "" ( pause )
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_all.sh b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_all.sh
similarity index 62%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_all.sh
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_all.sh
index 5702db0cf..8cc56b74f 100755
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_all.sh
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_all.sh
@@ -3,13 +3,13 @@ if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
 if [ -f "Makefile" ];then rm -f Makefile; fi
 if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
 if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
 make -j
 
 if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
 if [ -f "Makefile" ];then rm -f Makefile; fi
 if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
 if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
 make -j
 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_debug.bat b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_debug.bat
similarity index 62%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_debug.bat
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_debug.bat
index 0636e21b5..98e3af7b8 100644
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_debug.bat
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_debug.bat
@@ -2,5 +2,5 @@ if exist CMakeFiles (RD /s /Q CMakeFiles)
 if exist Makefile (DEL /s /Q /F Makefile)
 if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
 if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
 mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_debug.sh b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_debug.sh
similarity index 65%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_debug.sh
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_debug.sh
index 30c0ab2d5..bc7d6e8e0 100755
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_debug.sh
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_debug.sh
@@ -3,5 +3,5 @@ if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
 if [ -f "Makefile" ];then rm -f Makefile; fi
 if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
 if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
 make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_debug.bat b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_release.bat
similarity index 62%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_debug.bat
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_release.bat
index 0636e21b5..1f9b96808 100644
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_debug.bat
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_release.bat
@@ -2,5 +2,5 @@ if exist CMakeFiles (RD /s /Q CMakeFiles)
 if exist Makefile (DEL /s /Q /F Makefile)
 if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
 if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
 mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_debug.sh b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_release.sh
similarity index 65%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_debug.sh
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_release.sh
index 30c0ab2d5..d89c1a360 100755
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_debug.sh
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/build_release.sh
@@ -3,5 +3,5 @@ if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
 if [ -f "Makefile" ];then rm -f Makefile; fi
 if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
 if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
 make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/clean.bat b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/clean.bat
similarity index 100%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/clean.bat
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/clean.bat
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/clean.sh b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/clean.sh
similarity index 100%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/clean.sh
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/clean.sh
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/config.cmake b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/config.cmake
new file mode 100755
index 000000000..eb2c1bdfd
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/config.cmake
@@ -0,0 +1,9 @@
+# config to select component, the format is CONFIG_USE_${component}
+set(CONFIG_USE_component_wm8904_adapter_LPC55S69_cm33_core0 true)
+set(CONFIG_USE_component_flexcomm_i2c_adapter_LPC55S69_cm33_core0 true)
+set(CONFIG_USE_middleware_sdmmc_host_sdif_LPC55S69_cm33_core0 true)
+set(CONFIG_USE_middleware_sdmmc_host_sdif_freertos_LPC55S69_cm33_core0 true)
+set(CONFIG_USE_middleware_fatfs_sd_LPC55S69_cm33_core0 true)
+set(CONFIG_USE_driver_power_LPC55S69_cm33_core0 true)
+set(CONFIG_USE_component_serial_manager_uart_LPC55S69_cm33_core0 true)
+set(CONFIG_USE_driver_flexcomm_usart_LPC55S69_cm33_core0 true)
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/flags.cmake b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/flags.cmake
similarity index 86%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/flags.cmake
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/flags.cmake
index 6ad254f08..0961ac885 100755
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/flags.cmake
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc/flags.cmake
@@ -37,8 +37,15 @@ SET(CMAKE_C_FLAGS_DEBUG " \
     ${CMAKE_C_FLAGS_DEBUG} \
     -DDEBUG \
     -DCPU_LPC55S69JBD100_cm33_core0 \
+    -DSDK_I2C_BASED_COMPONENT_USED=1 \
+    -DBOARD_USE_CODEC=1 \
+    -DCODEC_WM8904_ENABLE \
+    -DSD_ENABLED \
+    -DDEBUG_CONSOLE_RX_ENABLE=0 \
     -DPRINTF_ADVANCED_ENABLE=1 \
+    -DPRINTF_FLOAT_ENABLE=1 \
     -DSERIAL_PORT_TYPE_UART=1 \
+    -DSDK_OS_FREE_RTOS \
     -DMCUXPRESSO_SDK \
     -g \
     -O0 \
@@ -61,8 +68,15 @@ SET(CMAKE_C_FLAGS_RELEASE " \
     ${CMAKE_C_FLAGS_RELEASE} \
     -DNDEBUG \
     -DCPU_LPC55S69JBD100_cm33_core0 \
+    -DSDK_I2C_BASED_COMPONENT_USED=1 \
+    -DBOARD_USE_CODEC=1 \
+    -DCODEC_WM8904_ENABLE \
+    -DSD_ENABLED \
+    -DDEBUG_CONSOLE_RX_ENABLE=0 \
     -DPRINTF_ADVANCED_ENABLE=1 \
+    -DPRINTF_FLOAT_ENABLE=1 \
     -DSERIAL_PORT_TYPE_UART=1 \
+    -DSDK_OS_FREE_RTOS \
     -DMCUXPRESSO_SDK \
     -Os \
     -mcpu=cortex-m33 \
@@ -154,6 +168,10 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
     -Xlinker \
     -Map=output.map \
     -Wl,--print-memory-usage \
+    -Xlinker \
+    --defsym=__stack_size__=0x1000 \
+    -Xlinker \
+    --defsym=__heap_size__=0x2000 \
     -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
 ")
 SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
@@ -182,5 +200,9 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
     -Xlinker \
     -Map=output.map \
     -Wl,--print-memory-usage \
+    -Xlinker \
+    --defsym=__stack_size__=0x1000 \
+    -Xlinker \
+    --defsym=__heap_size__=0x2000 \
     -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
 ")
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/board.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/board.c
similarity index 100%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/board.c
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/board.c
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/board.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/board.h
similarity index 100%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/board.h
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/board.h
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/clock_config.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/clock_config.c
similarity index 100%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/clock_config.c
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/clock_config.c
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/clock_config.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/clock_config.h
similarity index 100%
rename from boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/clock_config.h
rename to boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/clock_config.h
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/cmd.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/cmd.c
new file mode 100644
index 000000000..00d96008d
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/cmd.c
@@ -0,0 +1,290 @@
+/*
+ * Copyright 2019 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*${header:start}*/
+#include "cmd.h"
+
+#include <string.h>
+#include <stdint.h>
+#include "fsl_debug_console.h"
+#include "fsl_shell.h"
+
+#include "app_streamer.h"
+#include "fsl_sd_disk.h"
+#include "portable.h"
+
+#ifdef VIT_PROC
+#include "PL_platformTypes_CortexM7.h"
+#include "VIT.h"
+#include "vit_proc.h"
+#endif
+/*${header:end}*/
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+/*${macro:start}*/
+/*${macro:end}*/
+
+/*******************************************************************************
+ * Prototypes
+ ******************************************************************************/
+
+/*${prototype:start}*/
+static shell_status_t shellEcho(shell_handle_t shellHandle, int32_t argc, char **argv);
+static shell_status_t shellRecMIC(shell_handle_t shellHandle, int32_t argc, char **argv);
+#ifdef OPUS_ENCODE
+static shell_status_t shellOpusEncode(shell_handle_t shellHandle, int32_t argc, char **argv);
+#endif
+/*${prototype:end}*/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*${variable:start}*/
+SHELL_COMMAND_DEFINE(version, "\r\n\"version\": Display component versions\r\n", shellEcho, 0);
+
+SHELL_COMMAND_DEFINE(record_mic,
+                     "\r\n\"record_mic\": Record MIC audio and either:\r\n"
+#ifdef VIT_PROC
+                     " - perform voice recognition (VIT)\r\n"
+#endif
+                     " - playback on WM8904 codec\r\n"
+                     " - store samples to file.\r\n"
+                     "\r\n"
+#ifdef VIT_PROC
+                     " USAGE: record_mic [audio|file|<file_name>|vit] 20 [en|cn]\r\n"
+#else
+                     " USAGE: record_mic [audio|file|<file_name>] 20\r\n"
+#endif
+                     " The number defines length of recording in seconds.\r\n"
+#ifdef VIT_PROC
+                     " For voice recognition say supported WakeWord and in 3s frame supported command.\r\n"
+                     " Please note that this VIT demo is near-field and uses 1 on-board microphone.\r\n"
+#endif
+                     " NOTES: This command returns to shell after record finished.\r\n"
+                     "        To store samples to a file, the \"file\" option can be used to create a file\r\n"
+                     "        with a predefined name, or any file name (without whitespaces) can be specified\r\n"
+                     "        instead of the \"file\" option.\r\n",
+                     shellRecMIC,
+                     SHELL_IGNORE_PARAMETER_COUNT);
+
+#ifdef OPUS_ENCODE
+SHELL_COMMAND_DEFINE(opus_encode,
+                     "\r\n\"opus_encode\": Initializes the streamer with the Opus memory-to-memory pipeline and\r\n"
+                     "encodes a hardcoded buffer.\r\n",
+                     shellOpusEncode,
+                     0);
+#endif
+
+SDK_ALIGN(static uint8_t s_shellHandleBuffer[SHELL_HANDLE_SIZE], 4);
+static shell_handle_t s_shellHandle;
+
+extern serial_handle_t g_serialHandle;
+
+streamer_handle_t streamerHandle;
+
+/*${variable:end}*/
+
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+
+/*${function:start}*/
+
+static shell_status_t shellEcho(shell_handle_t shellHandle, int32_t argc, char **argv)
+{
+    PRINTF(" Maestro version: 1.2\r\n");
+
+#ifdef VIT_PROC
+    PRINTF(" VIT version: 5.4.0\r\n");
+#endif
+
+    return kStatus_SHELL_Success;
+}
+
+static shell_status_t shellRecMIC(shell_handle_t shellHandle, int32_t argc, char **argv)
+{
+    status_t ret;
+    out_sink_t out_sink;
+    int duration    = 20;
+    char *file_name = NULL;
+#ifdef VIT_PROC
+    Vit_Language = EN;
+#endif
+
+    if ((argc > 1) && (strcmp(argv[1], "file") == 0))
+    {
+        out_sink = FILE_SINK;
+    }
+    else if ((argc > 1) && (strcmp(argv[1], "audio") == 0))
+    {
+        out_sink = AUDIO_SINK;
+    }
+#ifdef VIT_PROC
+    else if ((argc > 1) && (strcmp(argv[1], "vit") == 0))
+    {
+        out_sink = VIT_SINK;
+    }
+#endif
+    else
+    {
+        PRINTF("Undefined command - recording to a file on sd-card.\r\n");
+        /* Save the samples to the file with the defined name */
+        out_sink  = FILE_SINK;
+        file_name = argv[1];
+    }
+
+    if ((argc > 2))
+    {
+        if (strcmp(argv[2], "\0") != 0)
+        {
+            duration = abs(atoi(argv[2]));
+        }
+    }
+#ifdef VIT_PROC
+    if ((argc > 3))
+    {
+        if (strcmp(argv[3], "cn") == 0)
+        {
+            Vit_Language = CN;
+        }
+    }
+#endif
+
+    PRINTF("\r\nStarting streamer demo application for %d sec\r\n", duration);
+
+    STREAMER_Init();
+
+    ret = STREAMER_mic_Create(&streamerHandle, out_sink, file_name);
+
+    if (ret != kStatus_Success)
+    {
+        PRINTF("STREAMER_Create failed\r\n");
+        goto error;
+    }
+
+    PRINTF("Starting recording\r\n");
+#ifdef VIT_PROC
+    if (out_sink == VIT_SINK)
+    {
+        PRINTF("\r\nTo see VIT functionality say wake-word and command.\r\n");
+    }
+#endif
+    STREAMER_Start(&streamerHandle);
+
+    osa_time_delay(duration * 1000);
+
+    STREAMER_Stop(&streamerHandle);
+
+error:
+    PRINTF("Cleanup\r\n");
+    STREAMER_Destroy(&streamerHandle);
+    /* Delay for cleanup */
+    osa_time_delay(100);
+    return kStatus_SHELL_Success;
+}
+
+#ifdef OPUS_ENCODE
+static shell_status_t shellOpusEncode(shell_handle_t shellHandle, int32_t argc, char **argv)
+{
+    void *inBuf                   = NULL;
+    void *outBuf                  = NULL;
+    MEMSRC_SET_BUFFER_T inBufInfo = {0};
+    SET_BUFFER_DESC_T outBufInfo  = {0};
+    bool streamerInitialized      = false;
+
+    status_t ret;
+    CeiBitstreamInfo info = {
+        .sample_rate = 48000, .num_channels = 1, .endian = 0, .sign = TRUE, .sample_size = 16, .interleaved = TRUE};
+
+    PRINTF("Starting streamer with the preliminary Opus memory-to-memory pipeline.\r\n");
+
+    PRINTF("Allocating buffers...\r\n");
+
+    inBuf = pvPortMalloc(OPUSMEM2MEM_INBUF_SIZE);
+    if (inBuf == NULL)
+    {
+        PRINTF("Inbuf allocation failed\r\n");
+        goto error;
+    }
+    memcpy(inBuf, &OPUSMEM2MEM_INBUF_CONTENT, OPUSMEM2MEM_INBUF_SIZE);
+
+    outBuf = pvPortMalloc(OPUSMEM2MEM_OUTBUF_SIZE);
+    if (outBuf == NULL)
+    {
+        PRINTF("Outbuf allocation failed\r\n");
+        goto error;
+    }
+    memset(outBuf, 0, OPUSMEM2MEM_OUTBUF_SIZE);
+
+    inBufInfo  = (MEMSRC_SET_BUFFER_T){.location = (int8_t *)inBuf, .size = OPUSMEM2MEM_INBUF_SIZE};
+    outBufInfo = (SET_BUFFER_DESC_T){.ptr = (int8_t *)outBuf, .size = OPUSMEM2MEM_OUTBUF_SIZE};
+
+    PRINTF("Initializing streamer...\r\n");
+
+    STREAMER_Init();
+    streamerInitialized = true;
+
+    ret = STREAMER_opusmem2mem_Create(&streamerHandle, &info, &inBufInfo, &outBufInfo);
+    if (ret != kStatus_Success)
+    {
+        PRINTF("Streamer create failed\r\n");
+        goto error;
+    }
+
+    CeiOpusConfig cfg;
+    streamer_get_property(streamerHandle.streamer, PROP_ENCODER_CONFIG, (uint32_t *)&cfg, true);
+
+    cfg.application = OPUS_APPLICATION_VOIP;
+    streamer_set_property(streamerHandle.streamer,
+                          (ELEMENT_PROPERTY_T){.prop = PROP_ENCODER_CONFIG, .val = (uintptr_t)&cfg}, true);
+
+    PRINTF("Start encoding...\r\n");
+    STREAMER_Start(&streamerHandle);
+    while (streamerHandle.audioPlaying)
+        ;
+    PRINTF("Encoding finished.\r\n");
+
+error:
+    PRINTF("Cleanup\r\n");
+    vPortFree(inBuf);
+    vPortFree(outBuf);
+
+    if (streamerInitialized)
+    {
+        STREAMER_Destroy(&streamerHandle);
+    }
+
+    /* Delay for cleanup */
+    osa_time_delay(100);
+    return kStatus_SHELL_Success;
+}
+#endif
+
+void shellCmd(void)
+{
+    /* Init SHELL */
+    s_shellHandle = &s_shellHandleBuffer[0];
+    SHELL_Init(s_shellHandle, g_serialHandle, ">> ");
+
+    /* Add new command to commands list */
+    SHELL_RegisterCommand(s_shellHandle, SHELL_COMMAND(version));
+    SHELL_RegisterCommand(s_shellHandle, SHELL_COMMAND(record_mic));
+#ifdef OPUS_ENCODE
+    SHELL_RegisterCommand(s_shellHandle, SHELL_COMMAND(opus_encode));
+#endif
+
+#if !(defined(SHELL_NON_BLOCKING_MODE) && (SHELL_NON_BLOCKING_MODE > 0U))
+    while (1)
+    {
+        SHELL_Task(s_shellHandle);
+    }
+#endif
+}
+/*${function:end}*/
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/cmd.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/cmd.h
new file mode 100644
index 000000000..859d885da
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/cmd.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2019 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*${header:start}*/
+#include "main.h"
+#ifdef OPUS_ENCODE
+#include "opusmem2mem_file.h"
+#endif
+/*${header:end}*/
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*${macro:start}*/
+typedef void handleShellMessageCallback_t(void *arg);
+/*${macro:end}*/
+
+/*******************************************************************************
+ * Prototypes
+ ******************************************************************************/
+
+/*!
+ * @brief Common function for getting user input using shell console.
+ *
+ * @param[in] handleShellMessageCallback Callback to function which should
+ * handle serialized message.
+ * @param[in] arg Data to pass to callback handler.
+ */
+void shellCmd(void);
+/*${prototype:end}*/
+
+/** Constants **/
+#ifdef OPUS_ENCODE
+#define OPUSMEM2MEM_INBUF_SIZE  96100
+#define OPUSMEM2MEM_OUTBUF_SIZE 96100
+#endif
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/ffconf.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/ffconf.h
new file mode 100644
index 000000000..2ea34b121
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/ffconf.h
@@ -0,0 +1,314 @@
+#ifndef _FFCONF_H_
+#define _FFCONF_H_
+
+/*---------------------------------------------------------------------------/
+/  FatFs Functional Configurations
+/---------------------------------------------------------------------------*/
+
+#define FFCONF_DEF	86631	/* Revision ID */
+
+/*---------------------------------------------------------------------------/
+/ MSDK adaptation configuration
+/---------------------------------------------------------------------------*/
+#define SD_DISK_ENABLE
+
+/*---------------------------------------------------------------------------/
+/ Function Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_FS_READONLY	0
+/* This option switches read-only configuration. (0:Read/Write or 1:Read-only)
+/  Read-only configuration removes writing API functions, f_write(), f_sync(),
+/  f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()
+/  and optional writing functions as well. */
+
+
+#define FF_FS_MINIMIZE	0
+/* This option defines minimization level to remove some basic API functions.
+/
+/   0: Basic functions are fully enabled.
+/   1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename()
+/      are removed.
+/   2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
+/   3: f_lseek() function is removed in addition to 2. */
+
+
+#define FF_USE_FIND		0
+/* This option switches filtered directory read functions, f_findfirst() and
+/  f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */
+
+
+#define FF_USE_MKFS		0
+/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_FASTSEEK	0
+/* This option switches fast seek function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_EXPAND	0
+/* This option switches f_expand function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_CHMOD	0
+/* This option switches attribute manipulation functions, f_chmod() and f_utime().
+/  (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */
+
+
+#define FF_USE_LABEL	0
+/* This option switches volume label functions, f_getlabel() and f_setlabel().
+/  (0:Disable or 1:Enable) */
+
+
+#define FF_USE_FORWARD	0
+/* This option switches f_forward() function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_STRFUNC	1
+#define FF_PRINT_LLI	0
+#define FF_PRINT_FLOAT	0
+#define FF_STRF_ENCODE	3
+/* FF_USE_STRFUNC switches string functions, f_gets(), f_putc(), f_puts() and
+/  f_printf().
+/
+/   0: Disable. FF_PRINT_LLI, FF_PRINT_FLOAT and FF_STRF_ENCODE have no effect.
+/   1: Enable without LF-CRLF conversion.
+/   2: Enable with LF-CRLF conversion.
+/
+/  FF_PRINT_LLI = 1 makes f_printf() support long long argument and FF_PRINT_FLOAT = 1/2
+   makes f_printf() support floating point argument. These features want C99 or later.
+/  When FF_LFN_UNICODE >= 1 with LFN enabled, string functions convert the character
+/  encoding in it. FF_STRF_ENCODE selects assumption of character encoding ON THE FILE
+/  to be read/written via those functions.
+/
+/   0: ANSI/OEM in current CP
+/   1: Unicode in UTF-16LE
+/   2: Unicode in UTF-16BE
+/   3: Unicode in UTF-8
+*/
+
+
+/*---------------------------------------------------------------------------/
+/ Locale and Namespace Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_CODE_PAGE	932
+/* This option specifies the OEM code page to be used on the target system.
+/  Incorrect code page setting can cause a file open failure.
+/
+/   437 - U.S.
+/   720 - Arabic
+/   737 - Greek
+/   771 - KBL
+/   775 - Baltic
+/   850 - Latin 1
+/   852 - Latin 2
+/   855 - Cyrillic
+/   857 - Turkish
+/   860 - Portuguese
+/   861 - Icelandic
+/   862 - Hebrew
+/   863 - Canadian French
+/   864 - Arabic
+/   865 - Nordic
+/   866 - Russian
+/   869 - Greek 2
+/   932 - Japanese (DBCS)
+/   936 - Simplified Chinese (DBCS)
+/   949 - Korean (DBCS)
+/   950 - Traditional Chinese (DBCS)
+/     0 - Include all code pages above and configured by f_setcp()
+*/
+
+
+#define FF_USE_LFN        3
+#define FF_MAX_LFN        255
+/* The FF_USE_LFN switches the support for LFN (long file name).
+/
+/   0: Disable LFN. FF_MAX_LFN has no effect.
+/   1: Enable LFN with static  working buffer on the BSS. Always NOT thread-safe.
+/   2: Enable LFN with dynamic working buffer on the STACK.
+/   3: Enable LFN with dynamic working buffer on the HEAP.
+/
+/  To enable the LFN, ffunicode.c needs to be added to the project. The LFN function
+/  requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and
+/  additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled.
+/  The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can
+/  be in range of 12 to 255. It is recommended to be set it 255 to fully support LFN
+/  specification.
+/  When use stack for the working buffer, take care on stack overflow. When use heap
+/  memory for the working buffer, memory management functions, ff_memalloc() and
+/  ff_memfree() exemplified in ffsystem.c, need to be added to the project. */
+
+
+#define FF_LFN_UNICODE	0
+/* This option switches the character encoding on the API when LFN is enabled.
+/
+/   0: ANSI/OEM in current CP (TCHAR = char)
+/   1: Unicode in UTF-16 (TCHAR = WCHAR)
+/   2: Unicode in UTF-8 (TCHAR = char)
+/   3: Unicode in UTF-32 (TCHAR = DWORD)
+/
+/  Also behavior of string I/O functions will be affected by this option.
+/  When LFN is not enabled, this option has no effect. */
+
+
+#define FF_LFN_BUF		255
+#define FF_SFN_BUF		12
+/* This set of options defines size of file name members in the FILINFO structure
+/  which is used to read out directory items. These values should be suffcient for
+/  the file names to read. The maximum possible length of the read file name depends
+/  on character encoding. When LFN is not enabled, these options have no effect. */
+
+
+#define FF_FS_RPATH		2
+/* This option configures support for relative path.
+/
+/   0: Disable relative path and remove related functions.
+/   1: Enable relative path. f_chdir() and f_chdrive() are available.
+/   2: f_getcwd() function is available in addition to 1.
+*/
+
+
+/*---------------------------------------------------------------------------/
+/ Drive/Volume Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_VOLUMES		3
+/* Number of volumes (logical drives) to be used. (1-10) */
+
+
+#define FF_STR_VOLUME_ID	0
+#define FF_VOLUME_STRS		"RAM","NAND","CF","SD","SD2","USB","USB2","USB3"
+/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings.
+/  When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive
+/  number in the path name. FF_VOLUME_STRS defines the volume ID strings for each
+/  logical drives. Number of items must not be less than FF_VOLUMES. Valid
+/  characters for the volume ID strings are A-Z, a-z and 0-9, however, they are
+/  compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is
+/  not defined, a user defined volume string table needs to be defined as:
+/
+/  const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",...
+*/
+
+
+#define FF_MULTI_PARTITION	0
+/* This option switches support for multiple volumes on the physical drive.
+/  By default (0), each logical drive number is bound to the same physical drive
+/  number and only an FAT volume found on the physical drive will be mounted.
+/  When this function is enabled (1), each logical drive number can be bound to
+/  arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
+/  funciton will be available. */
+
+
+#define FF_MIN_SS		512
+#define FF_MAX_SS		4096
+/* This set of options configures the range of sector size to be supported. (512,
+/  1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and
+/  harddisk, but a larger value may be required for on-board flash memory and some
+/  type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured
+/  for variable sector size mode and disk_ioctl() function needs to implement
+/  GET_SECTOR_SIZE command. */
+
+
+#define FF_LBA64		0
+/* This option switches support for 64-bit LBA. (0:Disable or 1:Enable)
+/  To enable the 64-bit LBA, also exFAT needs to be enabled. (FF_FS_EXFAT == 1) */
+
+
+#define FF_MIN_GPT		0x10000000
+/* Minimum number of sectors to switch GPT as partitioning format in f_mkfs and
+/  f_fdisk function. 0x100000000 max. This option has no effect when FF_LBA64 == 0. */
+
+
+#define FF_USE_TRIM		0
+/* This option switches support for ATA-TRIM. (0:Disable or 1:Enable)
+/  To enable Trim function, also CTRL_TRIM command should be implemented to the
+/  disk_ioctl() function. */
+
+
+
+/*---------------------------------------------------------------------------/
+/ System Configurations
+/---------------------------------------------------------------------------*/
+
+#define FF_FS_TINY		0
+/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
+/  At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes.
+/  Instead of private sector buffer eliminated from the file object, common sector
+/  buffer in the filesystem object (FATFS) is used for the file data transfer. */
+
+
+#define FF_FS_EXFAT		0
+/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable)
+/  To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1)
+/  Note that enabling exFAT discards ANSI C (C89) compatibility. */
+
+
+#define FF_FS_NORTC		1
+#define FF_NORTC_MON	1
+#define FF_NORTC_MDAY	1
+#define FF_NORTC_YEAR	2021
+/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have
+/  any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
+/  the timestamp function. Every object modified by FatFs will have a fixed timestamp
+/  defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time.
+/  To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be
+/  added to the project to read current time form real-time clock. FF_NORTC_MON,
+/  FF_NORTC_MDAY and FF_NORTC_YEAR have no effect.
+/  These options have no effect in read-only configuration (FF_FS_READONLY = 1). */
+
+
+#define FF_FS_NOFSINFO	0
+/* If you need to know correct free space on the FAT32 volume, set bit 0 of this
+/  option, and f_getfree() function at first time after volume mount will force
+/  a full FAT scan. Bit 1 controls the use of last allocated cluster number.
+/
+/  bit0=0: Use free cluster count in the FSINFO if available.
+/  bit0=1: Do not trust free cluster count in the FSINFO.
+/  bit1=0: Use last allocated cluster number in the FSINFO if available.
+/  bit1=1: Do not trust last allocated cluster number in the FSINFO.
+*/
+
+
+#define FF_FS_LOCK		0
+/* The option FF_FS_LOCK switches file lock function to control duplicated file open
+/  and illegal operation to open objects. This option must be 0 when FF_FS_READONLY
+/  is 1.
+/
+/  0:  Disable file lock function. To avoid volume corruption, application program
+/      should avoid illegal open, remove and rename to the open objects.
+/  >0: Enable file lock function. The value defines how many files/sub-directories
+/      can be opened simultaneously under file lock control. Note that the file
+/      lock control is independent of re-entrancy. */
+
+
+#define FF_FS_REENTRANT 1
+#define FF_FS_TIMEOUT   1000
+#if FF_FS_REENTRANT
+#include "FreeRTOS.h"
+#include "semphr.h"
+#define FF_SYNC_t       SemaphoreHandle_t
+#endif
+/* The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
+/  module itself. Note that regardless of this option, file access to different
+/  volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
+/  and f_fdisk() function, are always not re-entrant. Only file/directory access
+/  to the same volume is under control of this function.
+/
+/   0: Disable re-entrancy. FF_FS_TIMEOUT and FF_SYNC_t have no effect.
+/   1: Enable re-entrancy. Also user provided synchronization handlers,
+/      ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
+/      function, must be added to the project. Samples are available in
+/      option/syscall.c.
+/
+/  The FF_FS_TIMEOUT defines timeout period in unit of time tick.
+/  The FF_SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*,
+/  SemaphoreHandle_t and etc. A header file for O/S definitions needs to be
+/  included somewhere in the scope of ff.h. */
+
+
+
+/*--- End of configuration options ---*/
+
+#endif /* _FFCONF_H_ */
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/maestro_record_v3_9.xml b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/maestro_record_v3_9.xml
new file mode 100644
index 000000000..26d7c1276
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/maestro_record_v3_9.xml
@@ -0,0 +1,193 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ksdk:examples xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd manifest.xsd">
+  <externalDefinitions>
+    <definition extID="cm33_core0_LPC55S69"/>
+    <definition extID="middleware.freertos-kernel.cm33_nonsecure_port.LPC55S69"/>
+    <definition extID="driver.wm8904.LPC55S69"/>
+    <definition extID="driver.codec.LPC55S69"/>
+    <definition extID="platform.drivers.common.LPC55S69"/>
+    <definition extID="component.wm8904_adapter.LPC55S69"/>
+    <definition extID="component.codec_i2c.LPC55S69"/>
+    <definition extID="component.flexcomm_i2c_adapter.LPC55S69"/>
+    <definition extID="platform.drivers.sysctl.LPC55S69"/>
+    <definition extID="middleware.sdmmc.sd.LPC55S69"/>
+    <definition extID="middleware.sdmmc.common.LPC55S69"/>
+    <definition extID="middleware.sdmmc.host.sdif.LPC55S69"/>
+    <definition extID="middleware.sdmmc.host.sdif.freertos.LPC55S69"/>
+    <definition extID="platform.drivers.lpc_iocon.LPC55S69"/>
+    <definition extID="platform.drivers.flexcomm_i2c.LPC55S69"/>
+    <definition extID="platform.drivers.flexcomm_i2s.LPC55S69"/>
+    <definition extID="utility.shell.LPC55S69"/>
+    <definition extID="platform.drivers.flexcomm_usart.LPC55S69"/>
+    <definition extID="platform.drivers.lpc_dma.LPC55S69"/>
+    <definition extID="platform.drivers.flexcomm_i2s_dma.LPC55S69"/>
+    <definition extID="middleware.freertos-kernel.heap_4.LPC55S69"/>
+    <definition extID="middleware.maestro_framework.LPC55S69"/>
+    <definition extID="middleware.fatfs.LPC55S69"/>
+    <definition extID="middleware.fatfs.sd.LPC55S69"/>
+    <definition extID="platform.drivers.clock.LPC55S69"/>
+    <definition extID="platform.drivers.power.LPC55S69"/>
+    <definition extID="platform.devices.LPC55S69_CMSIS.LPC55S69"/>
+    <definition extID="platform.devices.LPC55S69_startup.LPC55S69"/>
+    <definition extID="platform.drivers.flexcomm.LPC55S69"/>
+    <definition extID="platform.drivers.lpc_gpio.LPC55S69"/>
+    <definition extID="platform.utilities.assert.LPC55S69"/>
+    <definition extID="utility.debug_console.LPC55S69"/>
+    <definition extID="component.usart_adapter.LPC55S69"/>
+    <definition extID="component.serial_manager.LPC55S69"/>
+    <definition extID="component.lists.LPC55S69"/>
+    <definition extID="component.serial_manager_uart.LPC55S69"/>
+    <definition extID="middleware.freertos-kernel.LPC55S69"/>
+    <definition extID="middleware.freertos-kernel.extension.LPC55S69"/>
+    <definition extID="platform.drivers.reset.LPC55S69"/>
+    <definition extID="CMSIS_Include_core_cm.LPC55S69"/>
+    <definition extID="middleware.sdmmc.osa.freertos.LPC55S69"/>
+    <definition extID="component.osa_free_rtos.LPC55S69"/>
+    <definition extID="platform.drivers.sdif.LPC55S69"/>
+    <definition extID="middleware.maestro_framework.doc.LPC55S69"/>
+    <definition extID="platform.utilities.misc_utilities.LPC55S69"/>
+    <definition extID="platform.devices.LPC55S69_system.LPC55S69"/>
+    <definition extID="iar"/>
+    <definition extID="armgcc"/>
+    <definition extID="mcuxpresso"/>
+    <definition extID="com.nxp.mcuxpresso"/>
+    <definition extID="mdk"/>
+  </externalDefinitions>
+  <example id="lpcxpresso55s69_maestro_record" name="maestro_record" device_core="cm33_core0_LPC55S69" dependency="middleware.freertos-kernel.cm33_nonsecure_port.LPC55S69 driver.wm8904.LPC55S69 driver.codec.LPC55S69 platform.drivers.common.LPC55S69 component.wm8904_adapter.LPC55S69 component.codec_i2c.LPC55S69 component.flexcomm_i2c_adapter.LPC55S69 platform.drivers.sysctl.LPC55S69 middleware.sdmmc.sd.LPC55S69 middleware.sdmmc.common.LPC55S69 middleware.sdmmc.host.sdif.LPC55S69 middleware.sdmmc.host.sdif.freertos.LPC55S69 platform.drivers.lpc_iocon.LPC55S69 platform.drivers.flexcomm_i2c.LPC55S69 platform.drivers.flexcomm_i2s.LPC55S69 utility.shell.LPC55S69 platform.drivers.flexcomm_usart.LPC55S69 platform.drivers.lpc_dma.LPC55S69 platform.drivers.flexcomm_i2s_dma.LPC55S69 middleware.freertos-kernel.heap_4.LPC55S69 middleware.maestro_framework.LPC55S69 middleware.fatfs.LPC55S69 middleware.fatfs.sd.LPC55S69 platform.drivers.clock.LPC55S69 platform.drivers.power.LPC55S69 platform.devices.LPC55S69_CMSIS.LPC55S69 platform.devices.LPC55S69_startup.LPC55S69 platform.drivers.flexcomm.LPC55S69 platform.drivers.lpc_gpio.LPC55S69 platform.utilities.assert.LPC55S69 utility.debug_console.LPC55S69 component.usart_adapter.LPC55S69 component.serial_manager.LPC55S69 component.lists.LPC55S69 component.serial_manager_uart.LPC55S69 middleware.freertos-kernel.LPC55S69 middleware.freertos-kernel.extension.LPC55S69 platform.drivers.reset.LPC55S69 CMSIS_Include_core_cm.LPC55S69 middleware.sdmmc.osa.freertos.LPC55S69 component.osa_free_rtos.LPC55S69 platform.drivers.sdif.LPC55S69 middleware.maestro_framework.doc.LPC55S69 platform.utilities.misc_utilities.LPC55S69 platform.devices.LPC55S69_system.LPC55S69" category="audio_examples">
+    <projects>
+      <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
+    </projects>
+    <toolchainSettings>
+      <toolchainSetting id_refs="com.nxp.mcuxpresso">
+        <option id="gnu.c.compiler.option.preprocessor.def.symbols" type="stringList">
+          <value>CPU_LPC55S69JBD100_cm33_core0</value>
+          <value>SDK_I2C_BASED_COMPONENT_USED=1</value>
+          <value>BOARD_USE_CODEC=1</value>
+          <value>CODEC_WM8904_ENABLE</value>
+          <value>SD_ENABLED</value>
+          <value>DEBUG_CONSOLE_RX_ENABLE=0</value>
+          <value>PRINTF_ADVANCED_ENABLE=1</value>
+          <value>PRINTF_FLOAT_ENABLE=1</value>
+          <value>SERIAL_PORT_TYPE_UART=1</value>
+          <value>SDK_OS_FREE_RTOS</value>
+          <value>MCUXPRESSO_SDK</value>
+        </option>
+        <option id="com.crt.advproject.gas.hdrlib" type="enum">
+          <value>com.crt.advproject.gas.hdrlib.newlib</value>
+        </option>
+        <option id="com.crt.advproject.gas.specs" type="enum">
+          <value>com.crt.advproject.gas.specs.newlib</value>
+        </option>
+        <option id="com.crt.advproject.gcc.hdrlib" type="enum">
+          <value>com.crt.advproject.gcc.hdrlib.newlib</value>
+        </option>
+        <option id="com.crt.advproject.gcc.specs" type="enum">
+          <value>com.crt.advproject.gcc.specs.newlib</value>
+        </option>
+        <option id="com.crt.advproject.link.gcc.hdrlib" type="enum">
+          <value>com.crt.advproject.gcc.link.hdrlib.newlib.nohost</value>
+        </option>
+        <option id="com.crt.advproject.link.fpu" type="enum">
+          <value>com.crt.advproject.link.fpu.fpv5sp.hard</value>
+        </option>
+        <option id="gnu.c.link.option.nostdlibs" type="boolean">
+          <value>true</value>
+        </option>
+        <option id="com.crt.advproject.link.memory.heapAndStack" type="string">
+          <value>&amp;Heap:Default;Default;0x2000&amp;Stack:Default;Default;0x1000</value>
+        </option>
+        <option id="com.crt.advproject.gas.fpu" type="enum">
+          <value>com.crt.advproject.gas.fpu.fpv5sp.hard</value>
+        </option>
+        <option id="com.crt.advproject.gcc.fpu" type="enum">
+          <value>com.crt.advproject.gcc.fpu.fpv5sp.hard</value>
+        </option>
+        <option id="gnu.c.compiler.option.optimization.flags" type="string">
+          <value>-fno-common</value>
+        </option>
+        <option id="com.crt.advproject.c.misc.dialect" type="enum">
+          <value>com.crt.advproject.misc.dialect.gnu99</value>
+        </option>
+        <option id="gnu.c.compiler.option.misc.other" type="string">
+          <value>-mcpu=cortex-m33 -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin</value>
+        </option>
+        <option id="gnu.c.compiler.option.warnings.allwarn" type="boolean">
+          <value>false</value>
+        </option>
+      </toolchainSetting>
+    </toolchainSettings>
+    <include_paths>
+      <include_path path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="source" type="c_include"/>
+      <include_path path="boards/lpcxpresso55s69/audio_examples/maestro_record" project_relative_path="source" type="c_include"/>
+      <include_path path="boards/lpcxpresso55s69/audio_examples/maestro_record" project_relative_path="board" type="c_include"/>
+      <include_path path="boards/lpcxpresso55s69" project_relative_path="board" type="c_include"/>
+      <include_path path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" type="c_include"/>
+      <include_path path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="board" type="c_include"/>
+      <include_path path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="source" type="asm_include"/>
+    </include_paths>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/iar" project_relative_path="./" type="workspace" toolchain="iar">
+      <files mask="maestro_record.ewd"/>
+      <files mask="maestro_record.ewp"/>
+      <files mask="maestro_record.eww"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc" project_relative_path="./" type="workspace" toolchain="armgcc">
+      <files mask="build_all.bat"/>
+      <files mask="build_all.sh"/>
+      <files mask="clean.bat"/>
+      <files mask="clean.sh"/>
+      <files mask="CMakeLists.txt"/>
+      <files mask="flags.cmake"/>
+      <files mask="config.cmake"/>
+      <files mask="build_debug.bat"/>
+      <files mask="build_debug.sh"/>
+      <files mask="build_release.bat"/>
+      <files mask="build_release.sh"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="source" type="src">
+      <files mask="streamer_pcm.c"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="source" type="c_include">
+      <files mask="streamer_pcm_app.h"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="source" type="src">
+      <files mask="app_streamer.c"/>
+      <files mask="cmd.c"/>
+      <files mask="main.c"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="source" type="c_include">
+      <files mask="app_streamer.h"/>
+      <files mask="cmd.h"/>
+      <files mask="main.h"/>
+      <files mask="FreeRTOSConfig.h"/>
+      <files mask="ffconf.h"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record" project_relative_path="board" type="src">
+      <files mask="pin_mux.c"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record" project_relative_path="board" type="c_include">
+      <files mask="pin_mux.h"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="board" type="src">
+      <files mask="sdmmc_config.c"/>
+      <files mask="board.c"/>
+      <files mask="clock_config.c"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="board" type="c_include">
+      <files mask="sdmmc_config.h"/>
+      <files mask="board.h"/>
+      <files mask="clock_config.h"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="source" type="c_include">
+      <files mask="app_definitions.h"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0" project_relative_path="doc" type="doc" toolchain="iar mdk mcuxpresso armgcc">
+      <files mask="readme.txt"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/iar" project_relative_path="LPC55S69/iar" type="linker" toolchain="iar">
+      <files mask="LPC55S69_cm33_core0_flash.icf"/>
+    </source>
+    <source path="boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/armgcc" project_relative_path="LPC55S69/gcc" type="linker" toolchain="armgcc">
+      <files mask="LPC55S69_cm33_core0_flash.ld"/>
+    </source>
+  </example>
+</ksdk:examples>
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/main.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/main.c
new file mode 100644
index 000000000..2e7cd19a6
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/main.c
@@ -0,0 +1,317 @@
+/*
+ * Copyright 2020-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/* Board includes */
+#include "pin_mux.h"
+#include "board.h"
+#include "main.h"
+#include "cmd.h"
+
+#include "fsl_sd.h"
+#include "ff.h"
+#include "diskio.h"
+#include "fsl_sd_disk.h"
+#include "sdmmc_config.h"
+
+#include "fsl_debug_console.h"
+
+#include <stdbool.h>
+#include "fsl_sysctl.h"
+#include "fsl_codec_common.h"
+#include "fsl_wm8904.h"
+#include "fsl_codec_adapter.h"
+#include "fsl_power.h"
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#include "app_definitions.h"
+#define SHELL_TASK_STACK_SIZE  (1024)
+#define SDCARD_TASK_STACK_SIZE (512)
+
+/*******************************************************************************
+ * Prototypes
+ ******************************************************************************/
+
+int BOARD_CODEC_Init(void);
+static void APP_SDCARD_DetectCallBack(bool isInserted, void *userData);
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+codec_handle_t codecHandle   = {0};
+wm8904_config_t wm8904Config = {
+    .i2cConfig    = {.codecI2CInstance = BOARD_CODEC_I2C_INSTANCE, .codecI2CSourceClock = BOARD_CODEC_I2C_CLOCK_FREQ},
+    .recordSource = kWM8904_RecordSourceLineInput,
+    .recordChannelLeft  = kWM8904_RecordChannelLeft2,
+    .recordChannelRight = kWM8904_RecordChannelRight2,
+    .playSource         = kWM8904_PlaySourceDAC,
+    .slaveAddress       = WM8904_I2C_ADDRESS,
+    .protocol           = kWM8904_ProtocolI2S,
+    .format             = {.sampleRate = kWM8904_SampleRate48kHz, .bitWidth = kWM8904_BitWidth16},
+    .mclk_HZ            = DEMO_I2S_MASTER_CLOCK_FREQUENCY,
+    .master             = false,
+};
+codec_config_t boardCodecConfig = {.codecDevType = kCODEC_WM8904, .codecDevConfig = &wm8904Config};
+
+static app_handle_t app;
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+
+int BOARD_CODEC_Init(void)
+{
+    CODEC_Init(&codecHandle, &boardCodecConfig);
+
+    /* Invert the DAC data in order to output signal with correct polarity - set DACL_DATINV and DACR_DATINV = 1 */
+    WM8904_WriteRegister((wm8904_handle_t *)codecHandle.codecDevHandle, WM8904_AUDIO_IF_0, 0x1850);
+
+    /* Initial volume kept low for hearing safety. */
+    CODEC_SetVolume(&codecHandle, kCODEC_PlayChannelHeadphoneLeft | kCODEC_PlayChannelHeadphoneRight, DEMO_VOLUME);
+
+    return 0;
+}
+
+void BOARD_InitSysctrl(void)
+{
+    SYSCTL_Init(SYSCTL);
+    /* select signal source for share set */
+    SYSCTL_SetShareSignalSrc(SYSCTL, kSYSCTL_ShareSet0, kSYSCTL_SharedCtrlSignalSCK, kSYSCTL_Flexcomm7);
+    SYSCTL_SetShareSignalSrc(SYSCTL, kSYSCTL_ShareSet0, kSYSCTL_SharedCtrlSignalWS, kSYSCTL_Flexcomm7);
+    /* select share set for special flexcomm signal */
+    SYSCTL_SetShareSet(SYSCTL, kSYSCTL_Flexcomm7, kSYSCTL_FlexcommSignalSCK, kSYSCTL_ShareSet0);
+    SYSCTL_SetShareSet(SYSCTL, kSYSCTL_Flexcomm7, kSYSCTL_FlexcommSignalWS, kSYSCTL_ShareSet0);
+    SYSCTL_SetShareSet(SYSCTL, kSYSCTL_Flexcomm6, kSYSCTL_FlexcommSignalSCK, kSYSCTL_ShareSet0);
+    SYSCTL_SetShareSet(SYSCTL, kSYSCTL_Flexcomm6, kSYSCTL_FlexcommSignalWS, kSYSCTL_ShareSet0);
+}
+
+
+static void APP_SDCARD_DetectCallBack(bool isInserted, void *userData)
+{
+    app_handle_t *app = (app_handle_t *)userData;
+
+    app->sdcardInserted = isInserted;
+    xSemaphoreGiveFromISR(app->sdcardSem, NULL);
+}
+
+void APP_SDCARD_Task(void *param)
+{
+    const TCHAR driverNumberBuffer[3U] = {SDDISK + '0', ':', '/'};
+    FRESULT error;
+    app_handle_t *app = (app_handle_t *)param;
+
+    app->sdcardSem = xSemaphoreCreateBinary();
+
+    BOARD_SD_Config(&g_sd, APP_SDCARD_DetectCallBack, BOARD_SDMMC_SD_HOST_IRQ_PRIORITY, app);
+
+    PRINTF("[APP_SDCARD_Task] start\r\n");
+
+    /* SD host init function */
+    if (SD_HostInit(&g_sd) != kStatus_Success)
+    {
+        PRINTF("[APP_SDCARD_Task] SD host init failed.\r\n");
+        vTaskSuspend(NULL);
+    }
+
+    /* Small delay for SD card detection logic to process */
+    vTaskDelay(100 / portTICK_PERIOD_MS);
+
+    while (1)
+    {
+        /* Block waiting for SDcard detect interrupt */
+        xSemaphoreTake(app->sdcardSem, portMAX_DELAY);
+
+        if (app->sdcardInserted != app->sdcardInsertedPrev)
+        {
+            app->sdcardInsertedPrev = app->sdcardInserted;
+
+            SD_SetCardPower(&g_sd, false);
+
+            if (app->sdcardInserted)
+            {
+                /* power on the card */
+                SD_SetCardPower(&g_sd, true);
+                if (f_mount(&app->fileSystem, driverNumberBuffer, 0U))
+                {
+                    PRINTF("[APP_SDCARD_Task] Mount volume failed.\r\n");
+                    continue;
+                }
+
+#if (FF_FS_RPATH >= 2U)
+                error = f_chdrive((char const *)&driverNumberBuffer[0U]);
+                if (error)
+                {
+                    PRINTF("[APP_SDCARD_Task] Change drive failed.\r\n");
+                    continue;
+                }
+#endif
+
+                PRINTF("[APP_SDCARD_Task] SD card drive mounted\r\n");
+
+                xSemaphoreGive(app->sdcardSem);
+            }
+        }
+    }
+}
+
+void APP_Shell_Task(void *param)
+{
+    PRINTF("[APP_Shell_Task] start\r\n");
+
+    /* Handle shell commands. */
+    shellCmd();
+
+    while (1)
+        ;
+    ;
+}
+
+int main(void)
+{
+    int ret;
+
+    /* set BOD VBAT level to 1.65V */
+    POWER_SetBodVbatLevel(kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false);
+    CLOCK_EnableClock(kCLOCK_InputMux);
+    CLOCK_EnableClock(kCLOCK_Iocon);
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    /* USART0 clock */
+    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
+
+    /* I2C clock */
+    CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
+
+    PMC->PDRUNCFGCLR0 |= PMC_PDRUNCFG0_PDEN_XTAL32M_MASK;   /*!< Ensure XTAL16M is on  */
+    PMC->PDRUNCFGCLR0 |= PMC_PDRUNCFG0_PDEN_LDOXO32M_MASK;  /*!< Ensure XTAL16M is on  */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK; /*!< Ensure CLK_IN is on  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;
+
+    /*!< Switch PLL0 clock source selector to XTAL16M */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);
+
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(8U) | SYSCON_PLL0CTRL_SELP(31U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(125U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(8U),
+        .pllsscg = {0x0U, (SYSCON_PLL0SSCG1_MDIV_EXT(3072U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 24576000U,
+        .flags   = PLL_SETUPFLAG_WAITLOCK};
+    /*!< Configure PLL to the desired values */
+    CLOCK_SetPLL0Freq(&pll0Setup);
+
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 0U, true);
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 1U, false);
+
+    /* I2S clocks */
+    CLOCK_AttachClk(kPLL0_DIV_to_FLEXCOMM6);
+    CLOCK_AttachClk(kPLL0_DIV_to_FLEXCOMM7);
+
+    /* Attach PLL clock to MCLK for I2S, no divider */
+    CLOCK_AttachClk(kPLL0_to_MCLK);
+    SYSCON->MCLKDIV = SYSCON_MCLKDIV_DIV(0U);
+    SYSCON->MCLKIO  = 1U;
+
+    /* reset FLEXCOMM for I2C */
+    RESET_PeripheralReset(kFC4_RST_SHIFT_RSTn);
+
+    /* reset FLEXCOMM for DMA0 */
+    RESET_PeripheralReset(kDMA0_RST_SHIFT_RSTn);
+
+    /* reset FLEXCOMM for I2S */
+    RESET_PeripheralReset(kFC6_RST_SHIFT_RSTn);
+    RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn);
+
+    /* reset NVIC for FLEXCOMM6 and FLEXCOMM7 */
+    NVIC_ClearPendingIRQ(FLEXCOMM6_IRQn);
+    NVIC_ClearPendingIRQ(FLEXCOMM7_IRQn);
+
+    /* Enable interrupts for I2S */
+    EnableIRQ(FLEXCOMM6_IRQn);
+    EnableIRQ(FLEXCOMM7_IRQn);
+
+    /* Initialize the rest */
+    BOARD_InitPins();
+    BOARD_BootClockPLL1_150M();
+    BOARD_InitDebugConsole();
+    BOARD_InitSysctrl();
+
+    PRINTF("\r\n");
+    PRINTF("*******************************\r\n");
+    PRINTF("Maestro audio record demo start\r\n");
+    PRINTF("*******************************\r\n");
+    PRINTF("\r\n");
+
+    ret = BOARD_CODEC_Init();
+    if (ret)
+    {
+        PRINTF("CODEC_Init failed\r\n");
+        return -1;
+    }
+
+    if (xTaskCreate(APP_SDCARD_Task, "SDCard Task", SDCARD_TASK_STACK_SIZE, &app, configMAX_PRIORITIES - 4, NULL) !=
+        pdPASS)
+    {
+        PRINTF("\r\nFailed to create application task\r\n");
+        while (1)
+            ;
+    }
+
+    /* Set shell command task priority = 1 */
+    if (xTaskCreate(APP_Shell_Task, "Shell Task", SHELL_TASK_STACK_SIZE, &app, configMAX_PRIORITIES - 5,
+                    &app.shell_task_handle) != pdPASS)
+    {
+        PRINTF("\r\nFailed to create application task\r\n");
+        while (1)
+            ;
+    }
+
+    /* Run RTOS */
+    vTaskStartScheduler();
+
+    /* Should not reach this statement */
+    return 0;
+}
+
+/**
+ * @brief Loop forever if stack overflow is detected.
+ *
+ * If configCHECK_FOR_STACK_OVERFLOW is set to 1,
+ * this hook provides a location for applications to
+ * define a response to a stack overflow.
+ *
+ * Use this hook to help identify that a stack overflow
+ * has occurred.
+ *
+ */
+void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName)
+{
+    portDISABLE_INTERRUPTS();
+
+    /* Loop forever */
+    for (;;)
+        ;
+}
+
+/**
+ * @brief Warn user if pvPortMalloc fails.
+ *
+ * Called if a call to pvPortMalloc() fails because there is insufficient
+ * free memory available in the FreeRTOS heap.  pvPortMalloc() is called
+ * internally by FreeRTOS API functions that create tasks, queues, software
+ * timers, and semaphores.  The size of the FreeRTOS heap is set by the
+ * configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h.
+ *
+ */
+void vApplicationMallocFailedHook()
+{
+    PRINTF(("\r\nERROR: Malloc failed to allocate memory\r\n"));
+
+    /* Loop forever */
+    for (;;)
+        ;
+}
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/main.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/main.h
new file mode 100644
index 000000000..1b139a890
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/main.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2020-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __MAIN_H__
+#define __MAIN_H__
+
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+#include "ff.h"
+
+#include <stdbool.h>
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+typedef struct _app_handle
+{
+    TaskHandle_t shell_task_handle;
+
+    /* SD card management */
+    SemaphoreHandle_t sdcardSem;
+    volatile bool sdcardInserted;
+    volatile bool sdcardInsertedPrev;
+    FATFS fileSystem;
+    FIL fileObject;
+} app_handle_t;
+
+#endif /* __MAIN_H__ */
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/readme.txt b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/readme.txt
new file mode 100644
index 000000000..46bdfb7fe
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/readme.txt
@@ -0,0 +1,87 @@
+Overview
+========
+The maestro_demo application demonstrates audio processing on the ARM cortex core
+utilizing the Maestro Audio Framework library.
+
+Depending on target platform there are different features of the demo enabled.
+
+    - loopback from microphone to speaker
+    - recording microphone to a file
+    - wake word + voice recognition
+
+The application is controlled by commands from a shell interface using serial console.
+
+Type "help" to see the command list. Similar description will be displayed on serial console:
+
+    >> help
+
+    "help": List all the registered commands
+
+    "exit": Exit program
+
+    "version": Display component versions
+
+    "record_mic": Record MIC audio and either:
+     - perform voice recognition (VIT)
+     - playback on WM8904 codec
+     - store samples to file.
+
+     USAGE: record_mic [audio|file|vit] 20 [en|cn]
+     The number defines length of recording in seconds.
+     For voice recognition say supported WakeWord and in 3s frame supported command.
+     Please note that this VIT demo is near-field and uses 1 on-board microphone.
+     NOTE: this command returns to shell after record finished.
+
+
+Toolchain supported
+===================
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
+- MCUXpresso  11.5.0
+
+Hardware requirements
+=====================
+- Mini/micro USB cable
+- LPCXpresso55s69 board
+- Personal Computer
+- headphones with 3.5 mm stereo jack
+- source of sound (line output to 3.5 mm stereo jack)
+
+
+Board settings
+==============
+Insert the card into the card slot
+
+Prepare the Demo
+================
+Note: MCUXpresso IDE project default debug console is semihost
+1.  Connect headphones to Audio HP / Line-Out connector.
+2.  Connect source of sound to Audio Line-In connector.
+3.  Connect a micro USB cable between the PC host and the CMSIS DAP USB port (P6) on the board
+4.  Open a serial terminal with the following settings :
+    - 115200 baud rate
+    - 8 data bits
+    - No parity
+    - One stop bit
+    - No flow control
+5.  Download the program to the target board.
+6.  Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
+
+Note:
+There is limited RAM on this platform, which brings following limitations:
+ - VIT is not enabled
+Running the demo
+================
+When the example runs successfully, you should see similar output on the serial terminal as below:
+
+**********************************
+Maestro audio solutions demo start
+**********************************
+
+[APP_SDCARD_Task] start
+[APP_Shell_Task] start
+
+SHELL build: Nov  5 2020
+Copyright  2020  NXP
+
+>> [APP_SDCARD_Task] SD card drive mounted
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/sdmmc_config.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/sdmmc_config.c
new file mode 100644
index 000000000..f370491d5
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/sdmmc_config.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2020 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "sdmmc_config.h"
+#include "fsl_iocon.h"
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Prototypes
+ ******************************************************************************/
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/*!brief sdmmc dma buffer */
+SDK_ALIGN(static uint32_t s_sdmmcHostDmaBuffer[BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE],
+          SDMMCHOST_DMA_DESCRIPTOR_BUFFER_ALIGN_SIZE);
+#if defined(SDIO_ENABLED) || defined(SD_ENABLED)
+static sd_detect_card_t s_cd;
+#endif
+static sdmmchost_t s_host;
+
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+uint32_t BOARD_SDIF0ClockConfiguration(void)
+{
+    /* attach main clock to SDIF */
+    CLOCK_AttachClk(kMAIN_CLK_to_SDIO_CLK);
+    /* need call this function to clear the halt bit in clock divider register */
+    CLOCK_SetClkDiv(kCLOCK_DivSdioClk, (uint32_t)(SystemCoreClock / FSL_FEATURE_SDIF_MAX_SOURCE_CLOCK + 1U), true);
+
+    return CLOCK_GetSdioClkFreq();
+}
+
+#if defined(SDIO_ENABLED) || defined(SD_ENABLED)
+void BOARD_SDCardDetectInit(sd_cd_t cd, void *userData)
+{
+    /* install card detect callback */
+    s_cd.cdDebounce_ms = BOARD_SDMMC_SD_CARD_DETECT_DEBOUNCE_DELAY_MS;
+    s_cd.type          = BOARD_SDMMC_SD_CD_TYPE;
+    s_cd.callback      = cd;
+    s_cd.userData      = userData;
+}
+#endif
+
+#ifdef SD_ENABLED
+void BOARD_SD_Config(void *card, sd_cd_t cd, uint32_t hostIRQPriority, void *userData)
+{
+    assert(card);
+
+    s_host.dmaDesBuffer                                      = s_sdmmcHostDmaBuffer;
+    s_host.dmaDesBufferWordsNum                              = BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE;
+    ((sd_card_t *)card)->host                                = &s_host;
+    ((sd_card_t *)card)->host->hostController.base           = BOARD_SDMMC_SD_HOST_BASEADDR;
+    ((sd_card_t *)card)->host->hostController.sourceClock_Hz = BOARD_SDIF0ClockConfiguration();
+
+    ((sd_card_t *)card)->usrParam.cd = &s_cd;
+
+    BOARD_SDCardDetectInit(cd, userData);
+
+    NVIC_SetPriority(BOARD_SDMMC_SD_HOST_IRQ, hostIRQPriority);
+}
+#endif
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/sdmmc_config.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/sdmmc_config.h
new file mode 100644
index 000000000..7c454e4d3
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/sdmmc_config.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2020 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _SDMMC_CONFIG_H_
+#define _SDMMC_CONFIG_H_
+
+#ifdef SD_ENABLED
+#include "fsl_sd.h"
+#endif
+#ifdef MMC_ENABLED
+#include "fsl_mmc.h"
+#endif
+#include "clock_config.h"
+#include "fsl_gpio.h"
+#include "fsl_sdmmc_host.h"
+#include "fsl_sdmmc_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+/* @brief host basic configuration */
+#define BOARD_SDMMC_SD_HOST_BASEADDR SDIF
+#define BOARD_SDMMC_SD_HOST_IRQ      SDIO_IRQn
+
+/* @brief card detect configuration */
+#define BOARD_SDMMC_SD_CD_TYPE                       kSD_DetectCardByHostCD
+#define BOARD_SDMMC_SD_CARD_DETECT_DEBOUNCE_DELAY_MS (100U)
+
+#define BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE (4U)
+
+/*!@ brief host interrupt priority*/
+#define BOARD_SDMMC_SD_HOST_IRQ_PRIORITY  (5U)
+#define BOARD_SDMMC_MMC_HOST_IRQ_PRIORITY (5U)
+/*!@brief dma descriptor buffer size */
+#define BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE (0x40U)
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/*******************************************************************************
+ * API
+ ******************************************************************************/
+/*!
+ * @brief BOARD SD configurations.
+ * @param card card descriptor
+ * @param cd card detect callback
+ * @param userData user data for callback
+ */
+#ifdef SD_ENABLED
+void BOARD_SD_Config(void *card, sd_cd_t cd, uint32_t hostIRQPriority, void *userData);
+#endif
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus */
+
+#endif /* _BOARD_H_ */
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/streamer_pcm.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/streamer_pcm.c
new file mode 100644
index 000000000..ac16022a8
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/streamer_pcm.c
@@ -0,0 +1,285 @@
+/*
+ * Copyright 2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "osa_common.h"
+
+#include "app_definitions.h"
+#include "board.h"
+#include "streamer_pcm_app.h"
+#include "fsl_debug_console.h"
+#include "fsl_codec_common.h"
+
+pcm_rtos_t pcmHandle = {0};
+
+extern codec_handle_t codecHandle;
+
+static void TxCallback(I2S_Type *base, i2s_dma_handle_t *handle, status_t completionStatus, void *userData)
+{
+    pcm_rtos_t *pcm = (pcm_rtos_t *)userData;
+    BaseType_t reschedule;
+    xSemaphoreGiveFromISR(pcm->semaphoreTX, &reschedule);
+    portYIELD_FROM_ISR(reschedule);
+}
+
+static void RxCallback(I2S_Type *base, i2s_dma_handle_t *handle, status_t completionStatus, void *userData)
+{
+    pcm_rtos_t *pcm = (pcm_rtos_t *)userData;
+    BaseType_t reschedule;
+    xSemaphoreGiveFromISR(pcm->semaphoreRX, &reschedule);
+    portYIELD_FROM_ISR(reschedule);
+}
+
+void streamer_pcm_init(void)
+{
+    DMA_Init(DEMO_DMA);
+
+    DMA_EnableChannel(DEMO_DMA, DEMO_I2S_TX_CHANNEL);
+    DMA_SetChannelPriority(DEMO_DMA, DEMO_I2S_TX_CHANNEL, kDMA_ChannelPriority3);
+    DMA_CreateHandle(&pcmHandle.i2sTxDmaHandle, DEMO_DMA, DEMO_I2S_TX_CHANNEL);
+
+    DMA_EnableChannel(DEMO_DMA, DEMO_I2S_RX_CHANNEL);
+    DMA_SetChannelPriority(DEMO_DMA, DEMO_I2S_RX_CHANNEL, kDMA_ChannelPriority2);
+    DMA_CreateHandle(&pcmHandle.i2sRxDmaHandle, DEMO_DMA, DEMO_I2S_RX_CHANNEL);
+}
+
+pcm_rtos_t *streamer_pcm_open(uint32_t num_buffers)
+{
+    pcmHandle.semaphoreTX = xSemaphoreCreateBinary();
+    return &pcmHandle;
+}
+
+pcm_rtos_t *streamer_pcm_rx_open(uint32_t num_buffers)
+{
+    pcmHandle.semaphoreRX = xSemaphoreCreateBinary();
+    return &pcmHandle;
+}
+
+void streamer_pcm_start(pcm_rtos_t *pcm)
+{
+    /* Interrupts already enabled - nothing to do.
+     * App/streamer can begin writing data to SAI. */
+}
+
+void streamer_pcm_close(pcm_rtos_t *pcm)
+{
+    /* Stop playback.  This will flush the SAI transmit buffers. */
+    if (pcm->i2sTxHandle.state != 0)
+    {
+        I2S_TransferAbortDMA(DEMO_I2S_TX, &pcm->i2sTxHandle);
+    }
+    vSemaphoreDelete(pcmHandle.semaphoreTX);
+}
+
+void streamer_pcm_rx_close(pcm_rtos_t *pcm)
+{
+    if (pcm->i2sRxHandle.state != 0)
+    {
+        I2S_TransferAbortDMA(DEMO_I2S_RX, &pcm->i2sRxHandle);
+    }
+    vSemaphoreDelete(pcmHandle.semaphoreRX);
+}
+
+int streamer_pcm_write(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
+{
+    /* Ensure write size is a multiple of 32, otherwise EDMA will assert
+     * failure.  Round down for the last chunk of a file/stream. */
+    pcm->i2sTxTransfer.dataSize = size - (size % 32);
+    pcm->i2sTxTransfer.data     = data;
+
+    if (pcm->isFirstTx)
+    {
+        /* need to queue two transmit buffers so when the first one
+         * finishes transfer, the other immediatelly starts */
+        I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
+        I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
+        pcm->isFirstTx = 0;
+    }
+    else
+    {
+        /* Wait for the previous transfer to finish */
+        if (xSemaphoreTake(pcm->semaphoreTX, portMAX_DELAY) != pdTRUE)
+            return -1;
+
+        I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
+        I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
+    }
+
+    return 0;
+}
+
+int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
+{
+    /* Ensure write size is a multiple of 32, otherwise EDMA will assert
+     * failure.  Round down for the last chunk of a file/stream. */
+    pcm->i2sRxTransfer.dataSize = size - (size % 32);
+    pcm->i2sRxTransfer.data     = data;
+
+    /* Start the first transfer */
+    if (pcm->isFirstRx)
+    {
+        /* need to queue two receive buffers so when the first one is filled,
+         * the other is immediatelly starts to be filled */
+        I2S_RxTransferReceiveDMA(DEMO_I2S_RX, &pcm->i2sRxHandle, pcm->i2sRxTransfer);
+        I2S_RxTransferReceiveDMA(DEMO_I2S_RX, &pcm->i2sRxHandle, pcm->i2sRxTransfer);
+        pcm->isFirstRx = 0;
+    }
+    else
+    {
+        /* Wait for the previous transfer to finish */
+        if (xSemaphoreTake(pcm->semaphoreRX, portMAX_DELAY) != pdTRUE)
+            return -1;
+    }
+
+    /* Start the consecutive transfer */
+    I2S_RxTransferReceiveDMA(DEMO_I2S_RX, &pcm->i2sRxHandle, pcm->i2sRxTransfer);
+
+    /* Enable I2S Tx due to clock availability for the codec (see board schematic). */
+    if (pcm->dummy_tx_enable)
+        I2S_Enable(DEMO_I2S_TX);
+
+    return 0;
+}
+
+int streamer_pcm_setparams(
+    pcm_rtos_t *pcm, uint32_t sample_rate, uint32_t bit_width, uint8_t num_channels, bool tx, bool dummy_tx, int volume)
+{
+    int ret     = 0;
+    int divider = 0;
+
+    pcm->isFirstTx    = tx ? 1U : pcm->isFirstTx;
+    pcm->isFirstRx    = tx ? pcm->isFirstRx : 1U;
+    pcm->sample_rate  = sample_rate;
+    pcm->bit_width    = bit_width;
+    pcm->num_channels = num_channels;
+    pcm->dummy_tx_enable |= dummy_tx;
+
+    if (sample_rate % 8000 == 0 || sample_rate % 6000 == 0)
+    {
+        const pll_setup_t pll0Setup = {
+            .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(8U) | SYSCON_PLL0CTRL_SELP(31U),
+            .pllndec = SYSCON_PLL0NDEC_NDIV(125U),
+            .pllpdec = SYSCON_PLL0PDEC_PDIV(8U),
+            .pllsscg = {0x0U, (SYSCON_PLL0SSCG1_MDIV_EXT(3072U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+            .pllRate = 24576000U,
+            .flags   = PLL_SETUPFLAG_WAITLOCK};
+        /*!< Configure PLL to the desired values */
+        CLOCK_SetPLL0Freq(&pll0Setup);
+    }
+    else if (sample_rate % 11025 == 0)
+    {
+        const pll_setup_t pll0Setup = {
+            .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(8U) | SYSCON_PLL0CTRL_SELP(31U),
+            .pllndec = SYSCON_PLL0NDEC_NDIV(202U),
+            .pllpdec = SYSCON_PLL0PDEC_PDIV(8U),
+            .pllsscg = {0x0U, (SYSCON_PLL0SSCG1_MDIV_EXT(4561U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+            .pllRate = 22579200U,
+            .flags   = PLL_SETUPFLAG_WAITLOCK};
+        CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */
+    }
+
+    divider = (CLOCK_GetPll0OutFreq() / sample_rate / bit_width / DEMO_CHANNEL_NUM);
+
+    /*
+     * masterSlave = kI2S_MasterSlaveNormalMaster;
+     * mode = kI2S_ModeI2sClassic;
+     * rightLow = false;
+     * leftJust = false;
+     * pdmData = false;
+     * sckPol = false;
+     * wsPol = false;
+     * divider = 1;
+     * oneChannel = false;
+     * dataLength = 16;
+     * frameLength = 32;
+     * position = 0;
+     * watermark = 4;
+     * txEmptyZero = true;
+     * pack48 = false;
+     */
+
+    if (tx)
+    {
+        I2S_TxGetDefaultConfig(&pcmHandle.tx_config);
+        pcmHandle.tx_config.divider     = divider;
+        pcmHandle.tx_config.masterSlave = DEMO_I2S_TX_MODE;
+        pcmHandle.tx_config.oneChannel  = (pcm->num_channels == 1);
+        I2S_TxInit(DEMO_I2S_TX, &pcmHandle.tx_config);
+        I2S_TxTransferCreateHandleDMA(DEMO_I2S_TX, &pcmHandle.i2sTxHandle, &pcmHandle.i2sTxDmaHandle, TxCallback,
+                                      (void *)&pcmHandle);
+    }
+    else
+    {
+        I2S_RxGetDefaultConfig(&pcmHandle.rx_config);
+        pcmHandle.rx_config.divider     = divider;
+        pcmHandle.rx_config.masterSlave = DEMO_I2S_RX_MODE;
+        pcmHandle.rx_config.oneChannel  = (pcm->num_channels == 1);
+        I2S_RxInit(DEMO_I2S_RX, &pcmHandle.rx_config);
+        I2S_RxTransferCreateHandleDMA(DEMO_I2S_RX, &pcmHandle.i2sRxHandle, &pcmHandle.i2sRxDmaHandle, RxCallback,
+                                      (void *)&pcmHandle);
+
+        if (dummy_tx)
+        {
+            I2S_TxGetDefaultConfig(&pcmHandle.tx_config);
+            pcmHandle.tx_config.divider     = divider;
+            pcmHandle.tx_config.masterSlave = DEMO_I2S_TX_MODE;
+            I2S_TxInit(DEMO_I2S_TX, &pcmHandle.tx_config);
+        }
+    }
+
+    ret = streamer_pcm_set_volume(pcm, 0);
+    if (ret != kStatus_Success)
+    {
+        return 1;
+    }
+
+    ret = CODEC_SetFormat(&codecHandle, CLOCK_GetPll0OutFreq(), sample_rate, bit_width);
+    if (ret != kStatus_Success)
+    {
+        return 1;
+    }
+
+    ret = streamer_pcm_set_volume(pcm, DEMO_VOLUME);
+    if (ret != kStatus_Success)
+    {
+        return 1;
+    }
+
+    return 0;
+}
+
+void streamer_pcm_getparams(pcm_rtos_t *pcm, uint32_t *sample_rate, uint32_t *bit_width, uint8_t *num_channels)
+{
+    *sample_rate  = pcm->sample_rate;
+    *bit_width    = pcm->bit_width;
+    *num_channels = pcm->num_channels;
+}
+
+int streamer_pcm_mute(pcm_rtos_t *pcm, bool mute)
+{
+    status_t ret;
+    ret = CODEC_SetMute(&codecHandle, kCODEC_PlayChannelHeadphoneLeft | kCODEC_PlayChannelHeadphoneRight, mute);
+    if (ret != kStatus_Success)
+    {
+        return 1;
+    }
+
+    return 0;
+}
+
+int streamer_pcm_set_volume(pcm_rtos_t *pcm, int volume)
+{
+    int channel;
+    channel = (pcm->num_channels == 1) ? kCODEC_PlayChannelHeadphoneLeft :
+                                         kCODEC_PlayChannelHeadphoneLeft | kCODEC_PlayChannelHeadphoneRight;
+
+    if (volume <= 0)
+        CODEC_SetMute(&codecHandle, kCODEC_PlayChannelHeadphoneRight | kCODEC_PlayChannelHeadphoneLeft, true);
+    else
+        CODEC_SetVolume(&codecHandle, channel, volume > CODEC_VOLUME_MAX_VALUE ? CODEC_VOLUME_MAX_VALUE : volume);
+
+    return 0;
+}
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/streamer_pcm_app.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/streamer_pcm_app.h
new file mode 100644
index 000000000..494ea9b6f
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/cm33_core0/streamer_pcm_app.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright 2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _FSL_STREAMER_PCM_APP_H_
+#define _FSL_STREAMER_PCM_APP_H_
+
+#include "fsl_dma.h"
+#include "fsl_i2c.h"
+#include "fsl_i2s.h"
+#include "fsl_i2s_dma.h"
+#include "fsl_wm8904.h"
+
+#include "streamer_pcm.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*! @brief PCM interface structure */
+struct _pcm_rtos_t
+{
+    dma_handle_t i2sTxDmaHandle;
+    i2s_dma_handle_t i2sTxHandle;
+    i2s_config_t tx_config;
+    i2s_transfer_t i2sTxTransfer;
+
+    dma_handle_t i2sRxDmaHandle;
+    i2s_dma_handle_t i2sRxHandle;
+    i2s_config_t rx_config;
+    i2s_transfer_t i2sRxTransfer;
+
+    uint32_t sample_rate;
+    uint32_t bit_width;
+    uint8_t num_channels;
+
+    SemaphoreHandle_t semaphoreRX;
+    SemaphoreHandle_t semaphoreTX;
+
+    uint8_t isFirstRx;
+    uint8_t isFirstTx;
+
+    bool dummy_tx_enable;
+};
+
+#endif
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/pin_mux.c b/boards/lpcxpresso55s69/audio_examples/maestro_record/pin_mux.c
new file mode 100644
index 000000000..92055ede7
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/pin_mux.c
@@ -0,0 +1,504 @@
+/*
+ * Copyright 2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v9.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 9.0.0
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_iocon.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitPins();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
+    open_drain: disabled}
+  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
+    mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
+  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
+    mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
+  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
+    mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
+  - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
+    mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
+    mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
+  - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: fast, invert: disabled,
+    open_drain: disabled}
+  - {pin_num: '6', peripheral: SDIF, signal: SD0_CLK, pin_signal: PIO0_7/FC3_RTS_SCL_SSEL1/SD0_CLK/FC5_SCK/FC1_SCK/SECURE_GPIO0_7, mode: inactive, slew_rate: fast,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '26', peripheral: SDIF, signal: SD0_CMD, pin_signal: PIO0_8/FC3_SSEL3/SD0_CMD/FC5_RXD_SDA_MOSI_DATA/SWO/SECURE_GPIO0_8, mode: inactive, slew_rate: fast,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '55', peripheral: SDIF, signal: SD0_POW_EN, pin_signal: PIO0_9/FC3_SSEL2/SD0_POW_EN/FC5_TXD_SCL_MISO_WS/SECURE_GPIO0_9/ACMP0_B, mode: inactive, slew_rate: standard,
+    invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '70', peripheral: SDIF, signal: 'SD0_D, 0', pin_signal: PIO0_24/FC0_RXD_SDA_MOSI_DATA/SD0_D0/CT_INP8/SCT_GPI0/SECURE_GPIO0_24, mode: inactive, slew_rate: fast,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '79', peripheral: SDIF, signal: 'SD0_D, 1', pin_signal: PIO0_25/FC0_TXD_SCL_MISO_WS/SD0_D1/CT_INP9/SCT_GPI1/SECURE_GPIO0_25, mode: inactive, slew_rate: fast,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '23', peripheral: SDIF, signal: 'SD0_D, 2', pin_signal: PIO0_31/FC0_CTS_SDA_SSEL0/SD0_D2/CTIMER0_MAT1/SCT0_OUT3/SECURE_GPIO0_31/ADC0_3, mode: inactive,
+    slew_rate: fast, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '11', peripheral: SDIF, signal: 'SD0_D, 3', pin_signal: PIO1_0/FC0_RTS_SCL_SSEL1/SD0_D3/CT_INP2/SCT_GPI4/PLU_OUT3/ADC0_11, mode: inactive, slew_rate: fast,
+    invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '22', peripheral: SDIF, signal: SD0_WR_PRT, pin_signal: PIO0_15/FC6_CTS_SDA_SSEL0/UTICK_CAP2/CT_INP16/SCT0_OUT2/SD0_WR_PRT/SECURE_GPIO0_15/ADC0_2, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '8', peripheral: SDIF, signal: SD0_CARD_DET, pin_signal: PIO0_17/FC4_SSEL2/SD0_CARD_DET_N/SCT_GPI7/SCT0_OUT0/SD0_CARD_INT_N/PLU_IN2/SECURE_GPIO0_17,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t port0_pin10_config = (/* Pin is configured as FC6_SCK */
+                                         IOCON_PIO_FUNC1 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI |
+                                         /* Analog switch is closed (enabled) */
+                                         IOCON_PIO_ASW_EN);
+    /* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
+    IOCON_PinMuxSet(IOCON, 0U, 10U, port0_pin10_config);
+
+    const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
+                                         IOCON_PIO_FUNC7 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
+
+    const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
+                                         IOCON_PIO_FUNC7 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
+
+    const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */
+                                         IOCON_PIO_FUNC7 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
+    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
+
+    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
+                                         IOCON_PIO_FUNC1 |
+                                         /* No addition pin function */
+                                         IOCON_PIO_MODE_INACT |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
+
+    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
+                                         IOCON_PIO_FUNC1 |
+                                         /* No addition pin function */
+                                         IOCON_PIO_MODE_INACT |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
+
+    const uint32_t port1_pin13_config = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
+                                         IOCON_PIO_FUNC2 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, 1U, 13U, port1_pin13_config);
+
+    const uint32_t port1_pin16_config = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
+                                         IOCON_PIO_FUNC2 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, 1U, 16U, port1_pin16_config);
+
+    const uint32_t port1_pin20_config = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                         IOCON_PIO_FUNC5 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
+
+    const uint32_t port1_pin21_config = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                         IOCON_PIO_FUNC5 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
+
+    const uint32_t port1_pin31_config = (/* Pin is configured as MCLK */
+                                         IOCON_PIO_FUNC1 |
+                                         /* No addition pin function */
+                                         IOCON_PIO_MODE_INACT |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN31 (coords: 91) is configured as MCLK */
+    IOCON_PinMuxSet(IOCON, 1U, 31U, port1_pin31_config);
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t port0_pin15_config = (/* Pin is configured as SD0_WR_PRT */
+                                             IOCON_PIO_FUNC5 |
+                                             /* No addition pin function */
+                                             IOCON_PIO_MODE_INACT |
+                                             /* Standard mode, output slew rate control is enabled */
+                                             IOCON_PIO_SLEW_STANDARD |
+                                             /* Input function is not inverted */
+                                             IOCON_PIO_INV_DI |
+                                             /* Enables digital function */
+                                             IOCON_PIO_DIGITAL_EN |
+                                             /* Open drain is disabled */
+                                             IOCON_PIO_OPENDRAIN_DI |
+                                             /* Analog switch is closed (enabled) */
+                                             IOCON_PIO_ASW_EN);
+        /* PORT0 PIN15 (coords: 22) is configured as SD0_WR_PRT */
+        IOCON_PinMuxSet(IOCON, 0U, 15U, port0_pin15_config);
+    }
+    else
+    {
+        const uint32_t port0_pin15_config = (/* Pin is configured as SD0_WR_PRT */
+                                             IOCON_PIO_FUNC5 |
+                                             /* No addition pin function */
+                                             IOCON_PIO_MODE_INACT |
+                                             /* Standard mode, output slew rate control is enabled */
+                                             IOCON_PIO_SLEW_STANDARD |
+                                             /* Input function is not inverted */
+                                             IOCON_PIO_INV_DI |
+                                             /* Enables digital function */
+                                             IOCON_PIO_DIGITAL_EN |
+                                             /* Open drain is disabled */
+                                             IOCON_PIO_OPENDRAIN_DI |
+                                             /* Analog switch is closed (enabled), only for A0 version */
+                                             IOCON_PIO_ASW_EN);
+        /* PORT0 PIN15 (coords: 22) is configured as SD0_WR_PRT */
+        IOCON_PinMuxSet(IOCON, 0U, 15U, port0_pin15_config);
+    }
+
+    const uint32_t port0_pin17_config = (/* Pin is configured as SD0_CARD_DET_N */
+                                         IOCON_PIO_FUNC2 |
+                                         /* No addition pin function */
+                                         IOCON_PIO_MODE_INACT |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN17 (coords: 8) is configured as SD0_CARD_DET_N */
+    IOCON_PinMuxSet(IOCON, 0U, 17U, port0_pin17_config);
+
+    const uint32_t port0_pin24_config = (/* Pin is configured as SD0_D0 */
+                                         IOCON_PIO_FUNC2 |
+                                         /* No addition pin function */
+                                         IOCON_PIO_MODE_INACT |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN24 (coords: 70) is configured as SD0_D0 */
+    IOCON_PinMuxSet(IOCON, 0U, 24U, port0_pin24_config);
+
+    const uint32_t port0_pin25_config = (/* Pin is configured as SD0_D1 */
+                                         IOCON_PIO_FUNC2 |
+                                         /* No addition pin function */
+                                         IOCON_PIO_MODE_INACT |
+                                         /* Fast mode, slew rate control is disabled */
+                                         IOCON_PIO_SLEW_FAST |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN25 (coords: 79) is configured as SD0_D1 */
+    IOCON_PinMuxSet(IOCON, 0U, 25U, port0_pin25_config);
+
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t port0_pin31_config = (/* Pin is configured as SD0_D2 */
+                                             IOCON_PIO_FUNC2 |
+                                             /* No addition pin function */
+                                             IOCON_PIO_MODE_INACT |
+                                             /* Fast mode, slew rate control is disabled */
+                                             IOCON_PIO_SLEW_FAST |
+                                             /* Input function is not inverted */
+                                             IOCON_PIO_INV_DI |
+                                             /* Enables digital function */
+                                             IOCON_PIO_DIGITAL_EN |
+                                             /* Open drain is disabled */
+                                             IOCON_PIO_OPENDRAIN_DI |
+                                             /* Analog switch is closed (enabled) */
+                                             IOCON_PIO_ASW_EN);
+        /* PORT0 PIN31 (coords: 23) is configured as SD0_D2 */
+        IOCON_PinMuxSet(IOCON, 0U, 31U, port0_pin31_config);
+    }
+    else
+    {
+        const uint32_t port0_pin31_config = (/* Pin is configured as SD0_D2 */
+                                             IOCON_PIO_FUNC2 |
+                                             /* No addition pin function */
+                                             IOCON_PIO_MODE_INACT |
+                                             /* Fast mode, slew rate control is disabled */
+                                             IOCON_PIO_SLEW_FAST |
+                                             /* Input function is not inverted */
+                                             IOCON_PIO_INV_DI |
+                                             /* Enables digital function */
+                                             IOCON_PIO_DIGITAL_EN |
+                                             /* Open drain is disabled */
+                                             IOCON_PIO_OPENDRAIN_DI |
+                                             /* Analog switch is closed (enabled), only for A0 version */
+                                             IOCON_PIO_ASW_EN);
+        /* PORT0 PIN31 (coords: 23) is configured as SD0_D2 */
+        IOCON_PinMuxSet(IOCON, 0U, 31U, port0_pin31_config);
+    }
+
+    const uint32_t port0_pin7_config = (/* Pin is configured as SD0_CLK */
+                                        IOCON_PIO_FUNC2 |
+                                        /* No addition pin function */
+                                        IOCON_PIO_MODE_INACT |
+                                        /* Fast mode, slew rate control is disabled */
+                                        IOCON_PIO_SLEW_FAST |
+                                        /* Input function is not inverted */
+                                        IOCON_PIO_INV_DI |
+                                        /* Enables digital function */
+                                        IOCON_PIO_DIGITAL_EN |
+                                        /* Open drain is disabled */
+                                        IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN7 (coords: 6) is configured as SD0_CLK */
+    IOCON_PinMuxSet(IOCON, 0U, 7U, port0_pin7_config);
+
+    const uint32_t port0_pin8_config = (/* Pin is configured as SD0_CMD */
+                                        IOCON_PIO_FUNC2 |
+                                        /* No addition pin function */
+                                        IOCON_PIO_MODE_INACT |
+                                        /* Fast mode, slew rate control is disabled */
+                                        IOCON_PIO_SLEW_FAST |
+                                        /* Input function is not inverted */
+                                        IOCON_PIO_INV_DI |
+                                        /* Enables digital function */
+                                        IOCON_PIO_DIGITAL_EN |
+                                        /* Open drain is disabled */
+                                        IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN8 (coords: 26) is configured as SD0_CMD */
+    IOCON_PinMuxSet(IOCON, 0U, 8U, port0_pin8_config);
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t port0_pin9_config = (/* Pin is configured as SD0_POW_EN */
+                                            IOCON_PIO_FUNC2 |
+                                            /* No addition pin function */
+                                            IOCON_PIO_MODE_INACT |
+                                            /* Standard mode, output slew rate control is enabled */
+                                            IOCON_PIO_SLEW_STANDARD |
+                                            /* Input function is not inverted */
+                                            IOCON_PIO_INV_DI |
+                                            /* Enables digital function */
+                                            IOCON_PIO_DIGITAL_EN |
+                                            /* Open drain is disabled */
+                                            IOCON_PIO_OPENDRAIN_DI |
+                                            /* Analog switch is closed (enabled) */
+                                            IOCON_PIO_ASW_EN);
+        /* PORT0 PIN9 (coords: 55) is configured as SD0_POW_EN */
+        IOCON_PinMuxSet(IOCON, 0U, 9U, port0_pin9_config);
+    }
+    else
+    {
+        const uint32_t port0_pin9_config = (/* Pin is configured as SD0_POW_EN */
+                                            IOCON_PIO_FUNC2 |
+                                            /* No addition pin function */
+                                            IOCON_PIO_MODE_INACT |
+                                            /* Standard mode, output slew rate control is enabled */
+                                            IOCON_PIO_SLEW_STANDARD |
+                                            /* Input function is not inverted */
+                                            IOCON_PIO_INV_DI |
+                                            /* Enables digital function */
+                                            IOCON_PIO_DIGITAL_EN |
+                                            /* Open drain is disabled */
+                                            IOCON_PIO_OPENDRAIN_DI |
+                                            /* Analog switch is closed (enabled), only for A0 version */
+                                            IOCON_PIO_ASW_EN);
+        /* PORT0 PIN9 (coords: 55) is configured as SD0_POW_EN */
+        IOCON_PinMuxSet(IOCON, 0U, 9U, port0_pin9_config);
+    }
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t port1_pin0_config = (/* Pin is configured as SD0_D3 */
+                                            IOCON_PIO_FUNC2 |
+                                            /* No addition pin function */
+                                            IOCON_PIO_MODE_INACT |
+                                            /* Fast mode, slew rate control is disabled */
+                                            IOCON_PIO_SLEW_FAST |
+                                            /* Input function is not inverted */
+                                            IOCON_PIO_INV_DI |
+                                            /* Enables digital function */
+                                            IOCON_PIO_DIGITAL_EN |
+                                            /* Open drain is disabled */
+                                            IOCON_PIO_OPENDRAIN_DI |
+                                            /* Analog switch is closed (enabled) */
+                                            IOCON_PIO_ASW_EN);
+        /* PORT1 PIN0 (coords: 11) is configured as SD0_D3 */
+        IOCON_PinMuxSet(IOCON, 1U, 0U, port1_pin0_config);
+    }
+    else
+    {
+        const uint32_t port1_pin0_config = (/* Pin is configured as SD0_D3 */
+                                            IOCON_PIO_FUNC2 |
+                                            /* No addition pin function */
+                                            IOCON_PIO_MODE_INACT |
+                                            /* Fast mode, slew rate control is disabled */
+                                            IOCON_PIO_SLEW_FAST |
+                                            /* Input function is not inverted */
+                                            IOCON_PIO_INV_DI |
+                                            /* Enables digital function */
+                                            IOCON_PIO_DIGITAL_EN |
+                                            /* Open drain is disabled */
+                                            IOCON_PIO_OPENDRAIN_DI |
+                                            /* Analog switch is closed (enabled), only for A0 version */
+                                            IOCON_PIO_ASW_EN);
+        /* PORT1 PIN0 (coords: 11) is configured as SD0_D3 */
+        IOCON_PinMuxSet(IOCON, 1U, 0U, port1_pin0_config);
+    }
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_record/pin_mux.h b/boards/lpcxpresso55s69/audio_examples/maestro_record/pin_mux.h
new file mode 100644
index 000000000..cc671e595
--- /dev/null
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_record/pin_mux.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_FUNC2 0x02u         /*!<@brief Selects pin function 2 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_FAST 0x40u     /*!<@brief Fast mode, slew rate control is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/app_streamer.c b/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/app_streamer.c
index 0b07d2bd7..0f0b267ae 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/app_streamer.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/app_streamer.c
@@ -161,8 +161,13 @@ status_t STREAMER_mic_Create(streamer_handle_t *handle)
 
     streamer_set_property(handle->streamer, prop, true);
 
-    prop.prop = PROP_AUDIOSRC_SET_CHUNK_SIZE;
-    prop.val  = FS_ISO_IN_ENDP_PACKET_SIZE / 2;
+    prop.prop = PROP_AUDIOSRC_SET_NUM_CHANNELS;
+    prop.val  = 1;
+
+    streamer_set_property(handle->streamer, prop, true);
+
+    prop.prop = PROP_AUDIOSRC_SET_FRAME_MS;
+    prop.val  = 1;
 
     streamer_set_property(handle->streamer, prop, true);
 
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/readme.txt b/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/readme.txt
index 909e44bcc..ca00c3a0d 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/readme.txt
@@ -14,8 +14,8 @@ This is just an example application. To leverage the values, the demo has to be
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/streamer_pcm.c b/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/streamer_pcm.c
index 31ceed86c..72df1bd18 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/streamer_pcm.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_usb_mic/cm33_core0/streamer_pcm.c
@@ -34,8 +34,6 @@ void streamer_pcm_init(void)
     DMA_EnableChannel(DEMO_DMA, DEMO_I2S_RX_CHANNEL);
     DMA_SetChannelPriority(DEMO_DMA, DEMO_I2S_RX_CHANNEL, kDMA_ChannelPriority2);
     DMA_CreateHandle(&pcmHandle.i2sRxDmaHandle, DEMO_DMA, DEMO_I2S_RX_CHANNEL);
-
-    pcmHandle.isFirstRx = 1;
 }
 
 pcm_rtos_t *streamer_pcm_open(uint32_t num_buffers)
@@ -80,47 +78,39 @@ int streamer_pcm_write(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
         }
     }
 
-    /* Enable I2S Tx due to clock availability for the codec (see board schematic).*/
-    if (pcm->dummy_tx_enable)
-        I2S_Enable(DEMO_I2S_TX);
-
     return 0;
 }
 
-int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint8_t *data2, uint32_t size)
+int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
 {
-    pcm->i2sRxTransfer.dataSize = size;
-    pcm->i2sRxTransfer.data     = data;
-
     /* Ensure write size is a multiple of 32, otherwise EDMA will assert
      * failure.  Round down for the last chunk of a file/stream. */
-    if (size % 32)
-    {
-        pcm->i2sRxTransfer.dataSize = size - (size % 32);
-    }
+    pcm->i2sRxTransfer.dataSize = size - (size % 32);
+    pcm->i2sRxTransfer.data     = data;
 
     /* Start the first transfer */
     if (pcm->isFirstRx)
     {
         /* Need to queue two receive buffers so when the first one is filled,
-         * the other is immediatelly starts to be filled */
+         * the other one immediatelly starts to be filled */
         I2S_RxTransferReceiveDMA(DEMO_I2S_RX, &pcm->i2sRxHandle, pcm->i2sRxTransfer);
         I2S_RxTransferReceiveDMA(DEMO_I2S_RX, &pcm->i2sRxHandle, pcm->i2sRxTransfer);
         pcm->isFirstRx = 0;
     }
     else
     {
-        /* Wait for transfer to finish */
+        /* Wait for the previous transfer to finish */
         if (xSemaphoreTake(pcm->semaphoreRX, portMAX_DELAY) != pdTRUE)
-        {
             return -1;
-        }
-
-        pcm->i2sRxTransfer.data = data2;
-        /* Start the consecutive transfer */
-        I2S_RxTransferReceiveDMA(DEMO_I2S_RX, &pcm->i2sRxHandle, pcm->i2sRxTransfer);
     }
 
+    /* Start the consecutive transfer */
+    I2S_RxTransferReceiveDMA(DEMO_I2S_RX, &pcm->i2sRxHandle, pcm->i2sRxTransfer);
+
+    /* Enable I2S Tx due to clock availability for the codec (see board schematic).*/
+    if (pcm->dummy_tx_enable)
+        I2S_Enable(DEMO_I2S_TX);
+
     return 0;
 }
 
@@ -131,9 +121,11 @@ int streamer_pcm_setparams(
     /* channelNum multiplied by two, because the codec gets data from two channel (CH0 0x00 CH0 0x00...) */
     uint8_t channelNum = num_channels == 1 ? 2 : num_channels;
     int divider        = (CLOCK_GetPll0OutFreq() / sample_rate / bit_width / num_channels);
-    pcm->sample_rate   = sample_rate;
-    pcm->bit_width     = bit_width;
-    pcm->num_channels  = num_channels;
+
+    pcm->isFirstRx    = tx ? pcm->isFirstRx : 1U;
+    pcm->sample_rate  = sample_rate;
+    pcm->bit_width    = bit_width;
+    pcm->num_channels = num_channels;
     pcm->dummy_tx_enable |= dummy_tx;
 
     /*
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/app_streamer.c b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/app_streamer.c
index 4aff1e393..649859cf5 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/app_streamer.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/app_streamer.c
@@ -156,13 +156,13 @@ status_t STREAMER_speaker_Create(streamer_handle_t *handle)
 
     streamer_set_property(handle->streamer, prop, true);
 
-    prop.prop = PROP_AUDIOSRC_SET_CHUNK_SIZE;
-    prop.val  = AUDIO_PLAY_BUFFER_SIZE_ONE_FRAME / (2 * 2);
+    prop.prop = PROP_AUDIOSRC_SET_NUM_CHANNELS;
+    prop.val  = 2;
 
     streamer_set_property(handle->streamer, prop, true);
 
-    prop.prop = PROP_AUDIOSRC_SET_NUM_CHANNELS;
-    prop.val  = 2;
+    prop.prop = PROP_AUDIOSRC_SET_FRAME_MS;
+    prop.val  = 1;
 
     streamer_set_property(handle->streamer, prop, true);
 
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/readme.txt b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/readme.txt
index 2f3d6663f..87dc4a343 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/readme.txt
@@ -14,8 +14,8 @@ This is just an example application. To leverage the values, the demo has to be
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/streamer_pcm.c b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/streamer_pcm.c
index f00ec42ea..83dd38dfe 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/streamer_pcm.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/cm33_core0/streamer_pcm.c
@@ -36,8 +36,6 @@ void streamer_pcm_init(void)
     DMA_EnableChannel(DEMO_DMA, DEMO_I2S_TX_CHANNEL);
     DMA_SetChannelPriority(DEMO_DMA, DEMO_I2S_TX_CHANNEL, kDMA_ChannelPriority3);
     DMA_CreateHandle(&pcmHandle.i2sTxDmaHandle, DEMO_DMA, DEMO_I2S_TX_CHANNEL);
-
-    pcmHandle.isFirstTx = 1;
 }
 
 pcm_rtos_t *streamer_pcm_open(uint32_t num_buffers)
@@ -72,39 +70,33 @@ void streamer_pcm_rx_close(pcm_rtos_t *pcm)
 
 int streamer_pcm_write(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
 {
-    pcm->i2sTxTransfer.dataSize = size;
-    pcm->i2sTxTransfer.data     = data;
-
     /* Ensure write size is a multiple of 32, otherwise EDMA will assert
      * failure.  Round down for the last chunk of a file/stream. */
-    if (size % 32)
-    {
-        pcm->i2sTxTransfer.dataSize = size - (size % 32);
-    }
+    pcm->i2sTxTransfer.dataSize = size - (size % 32);
+    pcm->i2sTxTransfer.data     = data;
 
-    /* Start transfer */
     if (pcm->isFirstTx)
     {
-        /* Need to queue two receive buffers so when the first one is filled,
-         * the other is immediatelly starts to be filled */
+        /* need to queue two transmit buffers so when the first one
+         * finishes transfer, the other immediatelly starts */
         I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
         I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
         pcm->isFirstTx = 0;
     }
     else
     {
-        /* Wait for transfer to finish */
+        /* Wait for the previous transfer to finish */
         if (xSemaphoreTake(pcm->semaphoreTX, portMAX_DELAY) != pdTRUE)
-        {
             return -1;
-        }
+
+        I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
         I2S_TxTransferSendDMA(DEMO_I2S_TX, &pcm->i2sTxHandle, pcm->i2sTxTransfer);
     }
 
     return 0;
 }
 
-int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint8_t *data2, uint32_t size)
+int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint32_t size)
 {
     uint32_t audioSpeakerPreReadDataCount = 0U;
     uint32_t preAudioSendCount            = 0U;
@@ -161,8 +153,10 @@ int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint8_t *data2, uint32_t s
 int streamer_pcm_setparams(
     pcm_rtos_t *pcm, uint32_t sample_rate, uint32_t bit_width, uint8_t num_channels, bool tx, bool dummy_tx, int volume)
 {
-    int ret           = 0;
-    int divider       = (CLOCK_GetPll0OutFreq() / sample_rate / bit_width / num_channels);
+    int ret     = 0;
+    int divider = (CLOCK_GetPll0OutFreq() / sample_rate / bit_width / num_channels);
+
+    pcm->isFirstTx    = tx ? 1U : pcm->isFirstTx;
     pcm->sample_rate  = sample_rate;
     pcm->bit_width    = bit_width;
     pcm->num_channels = num_channels;
diff --git a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/pin_mux.c b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/pin_mux.c
index f6a857e63..546220793 100644
--- a/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/pin_mux.c
+++ b/boards/lpcxpresso55s69/audio_examples/maestro_usb_speaker/pin_mux.c
@@ -64,8 +64,6 @@ BOARD_InitPins:
     mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
   - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
     mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled, asw: enabled}
-  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
-    mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
   - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: fast, invert: disabled,
     open_drain: disabled}
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
@@ -191,21 +189,6 @@ void BOARD_InitPins(void)
     /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
     IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
 
-    const uint32_t port1_pin13_config = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC2 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Fast mode, slew rate control is disabled */
-                                         IOCON_PIO_SLEW_FAST |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 1U, 13U, port1_pin13_config);
-
     const uint32_t port1_pin16_config = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
                                          IOCON_PIO_FUNC2 |
                                          /* Selects pull-up function */
diff --git a/boards/lpcxpresso55s69/aws_examples/shadow_wifi_serial/cm33_core0/readme.txt b/boards/lpcxpresso55s69/aws_examples/shadow_wifi_serial/cm33_core0/readme.txt
index fe69530e6..db03e78a1 100644
--- a/boards/lpcxpresso55s69/aws_examples/shadow_wifi_serial/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/aws_examples/shadow_wifi_serial/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ The simple Shadow lightbulb example to illustrate how client application and thi
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/main.c b/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/main.c
index 5d7cdd89a..60e623cb9 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/main.c
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/main.c
@@ -73,9 +73,9 @@
 #define SAMPLE_SNTP_UPDATE_INTERVAL (NX_IP_PERIODIC_RATE / 2)
 #endif /* SAMPLE_SNTP_UPDATE_INTERVAL */
 
-/* Default time. GMT: Friday, Jan 1, 2022 12:00:00 AM. Epoch timestamp: 1640995200.  */
+/* Default time. GMT: Thu Mar 10 10:44:35 2022.  */
 #ifndef SAMPLE_SYSTEM_TIME
-#define SAMPLE_SYSTEM_TIME       1621497448
+#define SAMPLE_SYSTEM_TIME                1646909075
 #endif /* SAMPLE_SYSTEM_TIME  */
 
 /* Seconds between Unix Epoch (1/1/1970) and NTP Epoch (1/1/1999) */
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/readme.txt
index 624847c68..bdf3dc162 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/azure_iot_embedded_sdk/cm33_core0/readme.txt
@@ -58,10 +58,10 @@ Note that these steps assume you use the Azure IoT Hub for the first time.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/ethernet_over_usb/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/ethernet_over_usb/cm33_core0/readme.txt
index a017b99e5..936ba54b9 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/ethernet_over_usb/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/ethernet_over_usb/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example can do network iperf test through a USB Ethernet adapter.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/filex_levelx_spiflash/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/filex_levelx_spiflash/cm33_core0/readme.txt
index 0f3f44ffb..73337dd38 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/filex_levelx_spiflash/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/filex_levelx_spiflash/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ Then, do some file operation test - create, write, read, close and so on.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/filex_ram_disk/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/filex_ram_disk/cm33_core0/readme.txt
index 369bd424c..d924f9877 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/filex_ram_disk/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/filex_ram_disk/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ and reads a small file.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/filex_sdcard/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/filex_sdcard/cm33_core0/readme.txt
index 35f25dd89..d8b2837e0 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/filex_sdcard/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/filex_sdcard/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ read, close and so on.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/i2c_example/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/i2c_example/cm33_core0/readme.txt
index 5cb2476af..e86181bc5 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/i2c_example/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/i2c_example/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ and the second thread deals with I2C slave operation.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/spi_example/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/spi_example/cm33_core0/readme.txt
index b83f92b67..13a8659c8 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/spi_example/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/spi_example/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ by a cable.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/threadx_demo/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/threadx_demo/cm33_core0/readme.txt
index 2083b1c50..83675a54f 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/threadx_demo/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/threadx_demo/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ of this demonstration.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/uart_example/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/uart_example/cm33_core0/readme.txt
index 80e2540ed..9021aee25 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/uart_example/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/uart_example/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ for the port, then write them back.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_audio_loopback/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_audio_loopback/cm33_core0/readme.txt
index 4fddf3428..40a988279 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_audio_loopback/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_audio_loopback/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example works as a USB audio device. It will appear as USB speaker and USB
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_cdc_acm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_cdc_acm/cm33_core0/readme.txt
index 7288e058a..cc0de5d04 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_cdc_acm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_cdc_acm/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example works as a USB CDC ACM device. It will appear as a USB serial devic
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/readme.txt
index 6019ca2e0..67f8bad55 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example works as two USB CDC ACM devices. It will appear as two USB serial
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/usbx_device_composite_cdc_acm_cdc_acm.c b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/usbx_device_composite_cdc_acm_cdc_acm.c
index 33f1197b2..53d94620d 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/usbx_device_composite_cdc_acm_cdc_acm.c
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_composite_cdc_acm_cdc_acm/cm33_core0/usbx_device_composite_cdc_acm_cdc_acm.c
@@ -255,7 +255,7 @@ void tx_application_define(void *first_unused_memory)
     parameter1.ux_slave_class_cdc_acm_instance_deactivate = demo_cdc_instance1_deactivate;
 
     /* Initialize the device CDC class. This class owns both interfaces starting with 0. */
-    status = ux_device_stack_class_register("ACM1",
+    status = ux_device_stack_class_register((UCHAR *)"ACM1",
                                             ux_device_class_cdc_acm_entry, 1, 0,
                                             &parameter1);
 
@@ -264,7 +264,7 @@ void tx_application_define(void *first_unused_memory)
     parameter2.ux_slave_class_cdc_acm_instance_deactivate = demo_cdc_instance2_deactivate;
 
     /* Initialize the device CDC class. This class owns both interfaces starting with 2. */
-    status = ux_device_stack_class_register("ACM2",
+    status = ux_device_stack_class_register((UCHAR *)"ACM2",
                                             ux_device_class_cdc_acm_entry, 1, 2,
                                             &parameter2);
 
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_keyboard/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_keyboard/cm33_core0/readme.txt
index 06e841298..c35a7439f 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_keyboard/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_keyboard/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example works as a USB HID device. It will appear as a USB keyboard device
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_mouse/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_mouse/cm33_core0/readme.txt
index 83e064ea0..cc8110768 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_mouse/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_hid_mouse/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example works as a USB HID device. It will appear as a USB mouse device on
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_mass_storage/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_mass_storage/cm33_core0/readme.txt
index 5da028979..6ed8f7254 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_mass_storage/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_device_mass_storage/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example illustrates USBX Device Mass Storage.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_cdc_acm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_cdc_acm/cm33_core0/readme.txt
index 782101754..e343387cc 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_cdc_acm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_cdc_acm/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example works as a USB host CDC ACM. It can communicate with a USB CDC ACM
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_keyboard/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_keyboard/cm33_core0/readme.txt
index 5efbab3a3..3320b8c9f 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_keyboard/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_keyboard/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ which key has been pressed.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_mouse/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_mouse/cm33_core0/readme.txt
index c510b9920..5be3e10bd 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_mouse/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_hid_mouse/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ which key has been pressed.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_mass_storage/cm33_core0/readme.txt b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_mass_storage/cm33_core0/readme.txt
index 46b56597b..b2474c94d 100644
--- a/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_mass_storage/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/azure_rtos_examples/usbx_host_mass_storage/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ This example illustrates USBX Host Mass Storage.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/gpio/button_toggle_led/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/gpio/button_toggle_led/cm33_core0/readme.txt
index 164f5d7e2..61105082a 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/gpio/button_toggle_led/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/gpio/button_toggle_led/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ toggle the LED and print to the console to indicate a button press event is dete
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt
index 9d99c8147..5b54a2fd9 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt
index 4af66ea08..f254e6e9d 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/master/cm33_core0/readme.txt
index 1b779b5bd..30691a929 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/master/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/slave/cm33_core0/readme.txt
index bf833da8f..995aa3c62 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/i2c/int_b2b_transfer/slave/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt
index 9919ed829..5136a1dca 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt
index 297f40df9..78e637174 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/master/cm33_core0/readme.txt
index 725873be1..8b4fc1e02 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/master/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/slave/cm33_core0/readme.txt
index 929994d1e..924042390 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/spi/int_b2b_transfer/slave/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/usart/dma_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/usart/dma_transfer/cm33_core0/readme.txt
index 92eb26607..c2731dd94 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/usart/dma_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/usart/dma_transfer/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ Note: The example echo every 8 characters, so input 8 characters every time.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/cmsis_driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/cmsis_driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt
index 8eb14ef00..7026c9c45 100644
--- a/boards/lpcxpresso55s69/cmsis_driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/cmsis_driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ Note: The example echo every 8 characters, so input 8 characters every time.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/component_examples/log/bm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/component_examples/log/bm/cm33_core0/readme.txt
index 4fe25e217..02eebb744 100644
--- a/boards/lpcxpresso55s69/component_examples/log/bm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/component_examples/log/bm/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ work with semihosting.
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/component_examples/log/freertos/cm33_core0/readme.txt b/boards/lpcxpresso55s69/component_examples/log/freertos/cm33_core0/readme.txt
index c5c5c3f87..c6b0e2e79 100644
--- a/boards/lpcxpresso55s69/component_examples/log/freertos/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/component_examples/log/freertos/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ work with semihosting.
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/demo_apps/hello_world/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/hello_world/cm33_core0/readme.txt
index 204804315..53adc2968 100644
--- a/boards/lpcxpresso55s69/demo_apps/hello_world/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/hello_world/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ just define DEBUG_CONSOLE_TRANSFER_NON_BLOCKING in your project to use the advan
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/demo_apps/hello_world_swo/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/hello_world_swo/cm33_core0/readme.txt
index a347a55ae..f689c6fa8 100644
--- a/boards/lpcxpresso55s69/demo_apps/hello_world_swo/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/hello_world_swo/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ show how to use the swo, and to provide a simple project for debugging and furth
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/demo_apps/hello_world_virtual_com/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/hello_world_virtual_com/cm33_core0/readme.txt
index 501c5c26a..8b3e8fcdf 100644
--- a/boards/lpcxpresso55s69/demo_apps/hello_world_virtual_com/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/hello_world_virtual_com/cm33_core0/readme.txt
@@ -7,10 +7,10 @@ The purpose of this demo is to demonstrate how to use virtual com and provide a
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/demo_apps/led_blinky/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/led_blinky/cm33_core0/readme.txt
index f1ad2d5a4..f0cc6fe72 100644
--- a/boards/lpcxpresso55s69/demo_apps/led_blinky/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/led_blinky/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ The code of this demo has been prepared and updated for use with the MCUXpresso
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/demo_apps/multi_peripherals_test/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/multi_peripherals_test/cm33_core0/readme.txt
index 03cb5fa00..a4e878ca9 100644
--- a/boards/lpcxpresso55s69/demo_apps/multi_peripherals_test/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/multi_peripherals_test/cm33_core0/readme.txt
@@ -15,10 +15,10 @@ that the RTC crystal works.
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/demo_apps/power_manager_lpc/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/power_manager_lpc/cm33_core0/readme.txt
index 5754a0f08..d958f83b1 100644
--- a/boards/lpcxpresso55s69/demo_apps/power_manager_lpc/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/power_manager_lpc/cm33_core0/readme.txt
@@ -19,9 +19,9 @@ prepared wakeup source from external event.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/demo_apps/puf_hashcrypt_crypto/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/puf_hashcrypt_crypto/cm33_core0/readme.txt
index cb148dce5..398bd5964 100644
--- a/boards/lpcxpresso55s69/demo_apps/puf_hashcrypt_crypto/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/puf_hashcrypt_crypto/cm33_core0/readme.txt
@@ -23,10 +23,10 @@ Usual use of PUF controller consists of these steps:
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/demo_apps/shell/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/shell/cm33_core0/readme.txt
index 2c42c2c9e..dfe836872 100644
--- a/boards/lpcxpresso55s69/demo_apps/shell/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/shell/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ work with semihosting.
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/demo_apps/utick_wakeup/cm33_core0/readme.txt b/boards/lpcxpresso55s69/demo_apps/utick_wakeup/cm33_core0/readme.txt
index 5938bbf59..093aaf932 100644
--- a/boards/lpcxpresso55s69/demo_apps/utick_wakeup/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/demo_apps/utick_wakeup/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ The MicroTick timer wakes up the device.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/anactrl/measure_frequency/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/anactrl/measure_frequency/cm33_core0/readme.txt
index b8e2b73ca..4f5a5ac78 100644
--- a/boards/lpcxpresso55s69/driver_examples/anactrl/measure_frequency/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/anactrl/measure_frequency/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ target clock according to the reference clock frequency.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/bod/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/bod/cm33_core0/readme.txt
index a1c30731c..63d384538 100644
--- a/boards/lpcxpresso55s69/driver_examples/bod/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/bod/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ will be asserted.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/casper/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/casper/cm33_core0/readme.txt
index bd87e68b9..ab8883c4c 100644
--- a/boards/lpcxpresso55s69/driver_examples/casper/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/casper/cm33_core0/readme.txt
@@ -5,10 +5,10 @@ The CASPER Example project is a demonstration program that uses the KSDK softwar
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/clockout/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/clockout/cm33_core0/readme.txt
index 87b26e4f6..9c6767dd8 100644
--- a/boards/lpcxpresso55s69/driver_examples/clockout/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/clockout/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ can observe the selected internal clock signal.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/cmp/interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/cmp/interrupt/cm33_core0/readme.txt
index 4ed05c7a5..d27f399d6 100644
--- a/boards/lpcxpresso55s69/driver_examples/cmp/interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/cmp/interrupt/cm33_core0/readme.txt
@@ -15,9 +15,9 @@ detecting the output's falling edge.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/cmp/polling/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/cmp/polling/cm33_core0/readme.txt
index a343d40ee..b57475f09 100644
--- a/boards/lpcxpresso55s69/driver_examples/cmp/polling/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/cmp/polling/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ output is logic one, or turned off when zero.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/crc/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/crc/cm33_core0/readme.txt
index bcb2ccef6..b02f18457 100644
--- a/boards/lpcxpresso55s69/driver_examples/crc/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/crc/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ for an ASCII string. Several CRC protocols are implemented using the CRC driver
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match/cm33_core0/readme.txt
index f936de4d8..ac34967d9 100644
--- a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ In this example, the match feature of the CTimer is used to toggle the output le
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match_interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match_interrupt/cm33_core0/readme.txt
index 3060be63b..27f35433a 100644
--- a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match_interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_match_interrupt/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ With an interrupt callback the match value is changed frequently in such a way t
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm/cm33_core0/readme.txt
index 06c4b5e57..02e987274 100644
--- a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ In this example, CTimer is used to generate a PWM signal.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm_interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm_interrupt/cm33_core0/readme.txt
index af1278b11..4372cca35 100644
--- a/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm_interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/ctimer/simple_pwm_interrupt/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ With an interrupt callback the PWM duty cycle is changed frequently in such a wa
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/dma/channel_chain/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/dma/channel_chain/cm33_core0/readme.txt
index ba690a7ea..6f44dae56 100644
--- a/boards/lpcxpresso55s69/driver_examples/dma/channel_chain/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/dma/channel_chain/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ Channel0 is configured with two descriptor, first descriptor is linked to the se
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/dma/interleave_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/dma/interleave_transfer/cm33_core0/readme.txt
index 1786d7319..276002ce1 100644
--- a/boards/lpcxpresso55s69/driver_examples/dma/interleave_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/dma/interleave_transfer/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ debugging and further development.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/dma/linked_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/dma/linked_transfer/cm33_core0/readme.txt
index 8fc7544c3..c3c3a5f6e 100644
--- a/boards/lpcxpresso55s69/driver_examples/dma/linked_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/dma/linked_transfer/cm33_core0/readme.txt
@@ -15,9 +15,9 @@ debugging and further development.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Board settings
diff --git a/boards/lpcxpresso55s69/driver_examples/dma/m2m_polling/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/dma/m2m_polling/cm33_core0/readme.txt
index 05bcbe7d0..8f4d0c286 100644
--- a/boards/lpcxpresso55s69/driver_examples/dma/m2m_polling/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/dma/m2m_polling/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ debugging and further development without DMA interrupt.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/dma/memory_to_memory/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/dma/memory_to_memory/cm33_core0/readme.txt
index 0f19789fa..f318a4d5e 100644
--- a/boards/lpcxpresso55s69/driver_examples/dma/memory_to_memory/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/dma/memory_to_memory/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ debugging and further development.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/dma/wrap_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/dma/wrap_transfer/cm33_core0/readme.txt
index 6677ef887..10b3c6131 100644
--- a/boards/lpcxpresso55s69/driver_examples/dma/wrap_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/dma/wrap_transfer/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ debugging and further development.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/flashiap/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/flashiap/cm33_core0/readme.txt
index 1611013ca..697aa4c16 100644
--- a/boards/lpcxpresso55s69/driver_examples/flashiap/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/flashiap/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ flash memory are performed.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/gint/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/gint/cm33_core0/readme.txt
index 67bf4f1e7..b9f97b324 100644
--- a/boards/lpcxpresso55s69/driver_examples/gint/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/gint/cm33_core0/readme.txt
@@ -4,9 +4,9 @@ This example shows how to use SDK drivers to use the Group GPIO input interrupt
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/gpio/led_output/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/gpio/led_output/cm33_core0/readme.txt
index 2f10e8eb6..b96f13be3 100644
--- a/boards/lpcxpresso55s69/driver_examples/gpio/led_output/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/gpio/led_output/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ clear, and toggle).
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/hashcrypt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/hashcrypt/cm33_core0/readme.txt
index 5e6b9a176..1c200920f 100644
--- a/boards/lpcxpresso55s69/driver_examples/hashcrypt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/hashcrypt/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ and decrypt it back using AES and SHA algorithm. SHA-1, SHA-256, AES ECB and AES
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt
index 98131a451..4e2353171 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/master/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt
index 34df4859f..968da348a 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2c/dma_b2b_transfer/slave/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ way.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/master/cm33_core0/readme.txt
index 8e1ff395d..91a63709c 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/master/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/slave/cm33_core0/readme.txt
index 97220aa6d..5d1b1eaf8 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2c/interrupt_b2b_transfer/slave/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/master/cm33_core0/readme.txt
index 2428df491..d3da00a5a 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/master/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/slave/cm33_core0/readme.txt
index 49a18cf9c..bb4509fe5 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2c/polling_b2b/slave/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ slave is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2c/read_accel_value_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2c/read_accel_value_transfer/cm33_core0/readme.txt
index b74b146f4..1966f77c4 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2c/read_accel_value_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2c/read_accel_value_transfer/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ the virtual serial port on board.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2s/dma_record_playback/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2s/dma_record_playback/cm33_core0/readme.txt
index 0b2d3ff1d..15d5f587c 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2s/dma_record_playback/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2s/dma_record_playback/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ and another I2S interface to playback the buffer to output - digital loopback.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2s/dma_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2s/dma_transfer/cm33_core0/readme.txt
index afc02f88b..8978fc650 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2s/dma_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2s/dma_transfer/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ The I2S example project uses one I2S interface to continuously playback the sine
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_record_playback/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_record_playback/cm33_core0/readme.txt
index 0b2d3ff1d..15d5f587c 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_record_playback/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_record_playback/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ and another I2S interface to playback the buffer to output - digital loopback.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_transfer/cm33_core0/readme.txt
index afc02f88b..8978fc650 100644
--- a/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/i2s/interrupt_transfer/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ The I2S example project uses one I2S interface to continuously playback the sine
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/lpadc/dma/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/lpadc/dma/cm33_core0/readme.txt
index 72e5022ba..86be72da0 100644
--- a/boards/lpcxpresso55s69/driver_examples/lpadc/dma/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/lpadc/dma/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ for the transfer to be done and print the result to terminal.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/lpadc/interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/lpadc/interrupt/cm33_core0/readme.txt
index 0bfb09c11..72b748eef 100644
--- a/boards/lpcxpresso55s69/driver_examples/lpadc/interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/lpadc/interrupt/cm33_core0/readme.txt
@@ -12,9 +12,9 @@ be printed when the execution return to the main function.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/lpadc/polling/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/lpadc/polling/cm33_core0/readme.txt
index 1ddfdfa88..dd4a4ad70 100644
--- a/boards/lpcxpresso55s69/driver_examples/lpadc/polling/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/lpadc/polling/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ the configuration structure's setting in application to fit the special requirem
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/lpadc/temperature_measurement/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/lpadc/temperature_measurement/cm33_core0/readme.txt
index 830529421..05ebf6093 100644
--- a/boards/lpcxpresso55s69/driver_examples/lpadc/temperature_measurement/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/lpadc/temperature_measurement/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ then the temperature can be calculated within the two results and a specific for
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core0/readme.txt
index ba2d6b620..78adf14e3 100644
--- a/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ it increments and writes it to the mailbox register for the secondary core again
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core1/readme.txt b/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core1/readme.txt
index aff6bbcb5..25a6517a9 100644
--- a/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/mailbox/interrupt/cm33_core1/readme.txt
@@ -10,10 +10,10 @@ it increments and writes it to the mailbox register for the secondary core again
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core0/readme.txt
index d50f4099a..f57abda07 100644
--- a/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ and sets mutex, to allow access other core to shared variable.
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core1/readme.txt b/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core1/readme.txt
index 80da09a76..3428ffe0a 100644
--- a/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/mailbox/mutex/cm33_core1/readme.txt
@@ -9,10 +9,10 @@ and sets mutex, to allow access other core to shared variable.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/mrt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/mrt/cm33_core0/readme.txt
index 857cbc160..dab56d8e8 100644
--- a/boards/lpcxpresso55s69/driver_examples/mrt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/mrt/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ a message a printed on the UART terminal and an LED is toggled on the board.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/ostimer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/ostimer/cm33_core0/readme.txt
index 5ad0862ba..c3de073ca 100644
--- a/boards/lpcxpresso55s69/driver_examples/ostimer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/ostimer/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ to trigger the interrupt while the timer count tick reach the match value about
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/pint/pattern_match/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/pint/pattern_match/cm33_core0/readme.txt
index 7dee97980..e24bbb7f2 100644
--- a/boards/lpcxpresso55s69/driver_examples/pint/pattern_match/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/pint/pattern_match/cm33_core0/readme.txt
@@ -4,9 +4,9 @@ This example shows how to use SDK drivers to use the Pin interrupt & pattern mat
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/pint/pin_interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/pint/pin_interrupt/cm33_core0/readme.txt
index 517cc8f3f..91460da41 100644
--- a/boards/lpcxpresso55s69/driver_examples/pint/pin_interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/pint/pin_interrupt/cm33_core0/readme.txt
@@ -4,9 +4,9 @@ This example shows how to use SDK drivers to use the Pin interrupt & pattern mat
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/plu/combination/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/plu/combination/cm33_core0/readme.txt
index 9d65a8313..ae096bb9a 100644
--- a/boards/lpcxpresso55s69/driver_examples/plu/combination/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/plu/combination/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ configuration and use of the Programmable Logic Unit (PLU) to construct a combin
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_fft/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_fft/cm33_core0/readme.txt
index 3ea18e5a1..a22e07adc 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_fft/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_fft/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_sw_fft to show the Pow
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_filter/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_filter/cm33_core0/readme.txt
index 6aef3e4a1..b5aa49850 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_filter/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_filter/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_sw_filter to show the
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_math/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_math/cm33_core0/readme.txt
index 3c6a8093a..1815a2124 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_math/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_math/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_sw_math to show the Po
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_matrix/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_matrix/cm33_core0/readme.txt
index 19c6e09ba..cb7fb7ce7 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_matrix/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_matrix/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_sw_matrix to show the
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_fft/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_fft/cm33_core0/readme.txt
index 498ab2e07..c4e84a4bd 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_fft/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_fft/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_fft to show the PowerQ
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_filter/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_filter/cm33_core0/readme.txt
index ad53b16bd..f8f88f7e2 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_filter/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_filter/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_filter to show the Pow
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_math/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_math/cm33_core0/readme.txt
index be828054a..15c2ee65e 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_math/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_math/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_math to show the Power
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_matrix/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_matrix/cm33_core0/readme.txt
index c63388de0..cd044abec 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_matrix/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_sw_matrix/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ It could be compared with the project powerquad_benckmark_matrix to show the Pow
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_vector/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_vector/cm33_core0/readme.txt
index b73145115..eb087eabb 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_vector/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/benchmark_vector/cm33_core0/readme.txt
@@ -5,10 +5,10 @@ The powerquad driver API results are compared to the reference result.
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/cmsis/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/cmsis/cm33_core0/readme.txt
index cabcb5cdb..627c1a643 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/cmsis/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/cmsis/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ The powerquad driver API results are compared to the reference result.
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/filter/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/filter/cm33_core0/readme.txt
index 17f233efc..fa07143d2 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/filter/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/filter/cm33_core0/readme.txt
@@ -5,10 +5,10 @@ The powerquad driver API results are compared to the reference result.
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/fir_fast/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/fir_fast/cm33_core0/readme.txt
index 3c35d3792..c93dec564 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/fir_fast/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/fir_fast/cm33_core0/readme.txt
@@ -15,9 +15,9 @@ than the normal method.
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/math/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/math/cm33_core0/readme.txt
index cbf11e45f..6d6a45ff5 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/math/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/math/cm33_core0/readme.txt
@@ -5,10 +5,10 @@ The powerquad driver API results are compared to the reference result.
 
 Toolchain supported
 ===================
-- Keil MDK  5.34
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/matrix/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/matrix/cm33_core0/readme.txt
index 04384ee7a..3effbdca2 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/matrix/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/matrix/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ The powerquad driver API results are compared to the reference result.
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/powerquad/transform/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/powerquad/transform/cm33_core0/readme.txt
index e84d61932..67e3a574c 100644
--- a/boards/lpcxpresso55s69/driver_examples/powerquad/transform/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/powerquad/transform/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ The powerquad driver API results are compared to the reference result.
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/prince/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/prince/cm33_core0/readme.txt
index b34030fd4..731d61295 100644
--- a/boards/lpcxpresso55s69/driver_examples/prince/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/prince/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ The example also shows how to correctly perform PRINCE region erase and write op
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/puf/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/puf/cm33_core0/readme.txt
index dfa9c58c6..190870d23 100644
--- a/boards/lpcxpresso55s69/driver_examples/puf/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/puf/cm33_core0/readme.txt
@@ -22,10 +22,10 @@ Usual use consists of these steps:
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/driver_examples/rng/random/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/rng/random/cm33_core0/readme.txt
index c031d9ad7..59c16fd04 100644
--- a/boards/lpcxpresso55s69/driver_examples/rng/random/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/rng/random/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ and prints them to the terminal.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/rtc/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/rtc/cm33_core0/readme.txt
index a6f101f5e..eb895cefc 100644
--- a/boards/lpcxpresso55s69/driver_examples/rtc/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/rtc/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ and time.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/sctimer/16bit_counter/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/sctimer/16bit_counter/cm33_core0/readme.txt
index e2ab011c5..48d9d26df 100644
--- a/boards/lpcxpresso55s69/driver_examples/sctimer/16bit_counter/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/sctimer/16bit_counter/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ The example toggles an output per counter when a match occurs.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/sctimer/multi_state_pwm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/sctimer/multi_state_pwm/cm33_core0/readme.txt
index 2cd8b7a59..de6b8076c 100644
--- a/boards/lpcxpresso55s69/driver_examples/sctimer/multi_state_pwm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/sctimer/multi_state_pwm/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ State 1 has 4 events that generate 2 PWM signals, it also has an event linked to
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/sctimer/pwm_with_dutycyle_change/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/sctimer/pwm_with_dutycyle_change/cm33_core0/readme.txt
index 9ce18a685..f549bda99 100644
--- a/boards/lpcxpresso55s69/driver_examples/sctimer/pwm_with_dutycyle_change/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/sctimer/pwm_with_dutycyle_change/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ and periodically updates the PWM signals dutycycle.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/sctimer/simple_pwm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/sctimer/simple_pwm/cm33_core0/readme.txt
index 1cf24299d..5a4745d92 100644
--- a/boards/lpcxpresso55s69/driver_examples/sctimer/simple_pwm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/sctimer/simple_pwm/cm33_core0/readme.txt
@@ -4,9 +4,9 @@ The SCTimer project is a simple demonstration program of the SDK SCTimer's drive
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/master/cm33_core0/readme.txt
index 58cd4e17c..877c4c620 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/master/cm33_core0/readme.txt
@@ -44,9 +44,9 @@ Main routine:
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/slave/cm33_core0/readme.txt
index 650023c92..a6a8d364f 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/HS_LSPI_dma_b2b_transfer/slave/cm33_core0/readme.txt
@@ -34,9 +34,9 @@ Main routine:
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt
index 9030f6660..254fc0b85 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/master/cm33_core0/readme.txt
@@ -45,9 +45,9 @@ Main routine:
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt
index 65eb28aa5..e3c25af6a 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/dma_b2b_transfer/slave/cm33_core0/readme.txt
@@ -35,9 +35,9 @@ Main routine:
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/interrupt/cm33_core0/readme.txt
index 7c0f7a2ed..620b82edb 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/interrupt/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ and check if the data slave received is correct.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/master/cm33_core0/readme.txt
index a2a54e69d..74911d10e 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/master/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ if the data master received is correct. This example needs to work with spi_inte
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/slave/cm33_core0/readme.txt
index 4336d4d1a..85ff8ea26 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b/slave/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ and check if the data slave received is correct. This example needs to work with
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/master/cm33_core0/readme.txt
index 87b5b01ce..c37058d25 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/master/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ data to slave, and receive a piece of data from slave. This example checks if th
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/slave/cm33_core0/readme.txt
index 226726ada..717e823cf 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/interrupt_b2b_transfer/slave/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ data to slave, and receive a piece of data from slave. This example checks if th
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/master/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/master/cm33_core0/readme.txt
index 5bda0170c..9e9a948d9 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/master/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/master/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ data to slave, and receive a piece of data from slave. This example checks if th
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/slave/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/slave/cm33_core0/readme.txt
index 3147707ea..0ce897332 100644
--- a/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/slave/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/spi/polling_b2b_transfer/slave/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ data to slave, and receive a piece of data from slave. This example checks if th
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/9bit_interrupt_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/9bit_interrupt_transfer/cm33_core0/readme.txt
index 979f13af4..ac38a1f1a 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/9bit_interrupt_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/9bit_interrupt_transfer/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ sent after the address can be received by itself.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/dma_double_buffer_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/dma_double_buffer_transfer/cm33_core0/readme.txt
index 69a766db9..e2e5902bc 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/dma_double_buffer_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/dma_double_buffer_transfer/cm33_core0/readme.txt
@@ -23,9 +23,9 @@ RX to a continuous fast speed will cause the DMA to fall behind.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/dma_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/dma_transfer/cm33_core0/readme.txt
index eba7c1af4..732f07cd8 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/dma_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/dma_transfer/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ Note: The example echo every 8 characters, so input 8 characters every time.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/interrupt/cm33_core0/readme.txt
index ee079e44d..ecde214f5 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/interrupt/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ send back all characters that PC send to the board.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/interrupt_rb_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/interrupt_rb_transfer/cm33_core0/readme.txt
index ed72563e0..bfb39165e 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/interrupt_rb_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/interrupt_rb_transfer/cm33_core0/readme.txt
@@ -12,9 +12,9 @@ Note: The example echo every 8 characters, so input 8 characters every time.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt
index ff2088fea..e6a57dc7c 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/interrupt_transfer/cm33_core0/readme.txt
@@ -9,9 +9,9 @@ Note: The example echo every 8 characters, so input 8 characters every time.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/polling/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/polling/cm33_core0/readme.txt
index 7e9901172..a2abc8d5a 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/polling/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/polling/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ send to the board.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/usart/wakeup_deepsleep/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/usart/wakeup_deepsleep/cm33_core0/readme.txt
index 1fcd2ec77..b0060b289 100644
--- a/boards/lpcxpresso55s69/driver_examples/usart/wakeup_deepsleep/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/usart/wakeup_deepsleep/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ sleep mode and wake up according to user input.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/driver_examples/wwdt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/driver_examples/wwdt/cm33_core0/readme.txt
index 527823df9..1ce88b206 100644
--- a/boards/lpcxpresso55s69/driver_examples/wwdt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/driver_examples/wwdt/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ performed.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/emwin_examples/emwin_gui_demo/cm33_core0/readme.txt b/boards/lpcxpresso55s69/emwin_examples/emwin_gui_demo/cm33_core0/readme.txt
index c4a5be044..21d839bff 100644
--- a/boards/lpcxpresso55s69/emwin_examples/emwin_gui_demo/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/emwin_examples/emwin_gui_demo/cm33_core0/readme.txt
@@ -5,9 +5,9 @@ The example demonstrates graphical widgets of the emWin library.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_animated_list/readme.txt b/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_animated_list/readme.txt
index e47cbb081..e89978e24 100644
--- a/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_animated_list/readme.txt
+++ b/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_animated_list/readme.txt
@@ -30,9 +30,9 @@ https://www.embedded-wizard.de/platforms/nxp/lpc55S69
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_brick_game/readme.txt b/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_brick_game/readme.txt
index f0a4fba7b..35ef4033e 100644
--- a/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_brick_game/readme.txt
+++ b/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_brick_game/readme.txt
@@ -32,9 +32,9 @@ https://www.embedded-wizard.de/platforms/nxp/lpc55S69
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_waveform_generator/readme.txt b/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_waveform_generator/readme.txt
index d2f454050..425f64566 100644
--- a/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_waveform_generator/readme.txt
+++ b/boards/lpcxpresso55s69/ew_gui_examples/ew_gui_waveform_generator/readme.txt
@@ -34,9 +34,9 @@ https://www.embedded-wizard.de/platforms/nxp/lpc55S69
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark/cm33_core0/readme.txt b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark/cm33_core0/readme.txt
index d32bfbe36..aa01809aa 100644
--- a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark/cm33_core0/readme.txt
@@ -4,10 +4,10 @@ A demo application runs different functions for benchmark test.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark_bm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark_bm/cm33_core0/readme.txt
index 39939c3e2..5a21dc188 100644
--- a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark_bm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_benchmark_bm/cm33_core0/readme.txt
@@ -4,9 +4,9 @@ A demo application runs different functions for benchmark test.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets/cm33_core0/readme.txt b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets/cm33_core0/readme.txt
index 8185b38d2..d4446eacf 100644
--- a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets/cm33_core0/readme.txt
@@ -4,10 +4,10 @@ A demo application to show lvgl widgets.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets_bm/cm33_core0/readme.txt b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets_bm/cm33_core0/readme.txt
index 623dc85c7..2f7822d62 100644
--- a/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets_bm/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/lvgl_examples/lvgl_demo_widgets_bm/cm33_core0/readme.txt
@@ -4,9 +4,9 @@ A demo application to show lvgl widgets.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/lvgl_examples/lvgl_guider/cm33_core0/readme.txt b/boards/lpcxpresso55s69/lvgl_examples/lvgl_guider/cm33_core0/readme.txt
index 4c944e138..ecd5373e8 100644
--- a/boards/lpcxpresso55s69/lvgl_examples/lvgl_guider/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/lvgl_examples/lvgl_guider/cm33_core0/readme.txt
@@ -7,10 +7,10 @@ button in the panel.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_benchmark/cm33_core0/readme.txt b/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_benchmark/cm33_core0/readme.txt
index 60da03627..5822ae51c 100644
--- a/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_benchmark/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_benchmark/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ terminal.
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_selftest/cm33_core0/readme.txt b/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_selftest/cm33_core0/readme.txt
index 51c84051b..265aa9ca2 100644
--- a/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_selftest/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/mbedtls_examples/mbedtls_selftest/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ terminal.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core0/readme.txt
index 585830ee3..9f7557d5b 100644
--- a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core0/readme.txt
@@ -23,9 +23,9 @@ eRPC documentation can be also found in: http://embeddedrpc.github.io
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core1/readme.txt
index 0402f3113..bae95186e 100644
--- a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg/cm33_core1/readme.txt
@@ -23,10 +23,10 @@ eRPC documentation can be also found in: http://embeddedrpc.github.io
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core0/readme.txt
index 26c93e98b..5a3bd133c 100644
--- a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core0/readme.txt
@@ -23,9 +23,9 @@ eRPC documentation can be also found in: http://embeddedrpc.github.io
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core1/readme.txt
index f72d116d5..5c05a4f52 100644
--- a/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/erpc_matrix_multiply_rpmsg_rtos/cm33_core1/readme.txt
@@ -23,10 +23,10 @@ eRPC documentation can be also found in: http://embeddedrpc.github.io
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core0/readme.txt
index fd163e09a..1d9331070 100644
--- a/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core0/readme.txt
@@ -37,9 +37,9 @@ eRPC documentation can be also found in: http://embeddedrpc.github.io
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core1/readme.txt
index a6b5abcc6..51c450254 100644
--- a/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/erpc_two_way_rpc_rpmsg_rtos/cm33_core1/readme.txt
@@ -37,10 +37,10 @@ eRPC documentation can be also found in: http://embeddedrpc.github.io
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core0/readme.txt
index c7368ff5f..bf1580511 100644
--- a/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core0/readme.txt
@@ -24,9 +24,9 @@ at a fixed location that is then known for both cores.
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core1/readme.txt
index 798753b8d..9b3bd2e78 100644
--- a/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/freertos_message_buffers/cm33_core1/readme.txt
@@ -24,10 +24,10 @@ at a fixed location that is then known for both cores.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core0/readme.txt
index 9b0e8871a..fc29c228f 100644
--- a/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ core toggles an on-board LED indicating that the secondary core is running.
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core1/readme.txt
index 9bda9a88f..157a63a2f 100644
--- a/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/hello_world/cm33_core1/readme.txt
@@ -7,10 +7,10 @@ core toggles an on-board LED indicating that the secondary core is running.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core0/readme.txt
index a596e2205..c148355f1 100644
--- a/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core0/readme.txt
@@ -19,9 +19,9 @@ RemoteExceptionEvent on the primary core.
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core1/readme.txt
index 4f3c7db75..a2039c124 100644
--- a/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/multicore_manager/cm33_core1/readme.txt
@@ -19,10 +19,10 @@ RemoteExceptionEvent on the primary core.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core0/readme.txt
index 0a6d1d174..568358d13 100644
--- a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core0/readme.txt
@@ -16,9 +16,9 @@ address is then exported from the linker to the application.
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core1/readme.txt
index 798377dd6..cafdad5cd 100644
--- a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong/cm33_core1/readme.txt
@@ -16,10 +16,10 @@ address is then exported from the linker to the application.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core0/readme.txt b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core0/readme.txt
index 40919dfaa..5db7b779a 100644
--- a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core0/readme.txt
@@ -16,9 +16,9 @@ address is then exported from the linker to the application.
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core1/readme.txt
index dffb4c82e..34421d806 100644
--- a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_rtos/cm33_core1/readme.txt
@@ -16,10 +16,10 @@ address is then exported from the linker to the application.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/ns/readme.txt b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/ns/readme.txt
index 9ff663931..33837a9e1 100644
--- a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/ns/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/ns/readme.txt
@@ -26,10 +26,10 @@ The shared memory assignment to the secure domain is done in the BOARD_InitTrust
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/s/readme.txt b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/s/readme.txt
index e05b582c9..583597218 100644
--- a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/s/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core0/s/readme.txt
@@ -26,9 +26,9 @@ The shared memory assignment to the secure domain is done in the BOARD_InitTrust
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core1/readme.txt b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core1/readme.txt
index d639fe5a0..0508e6f3a 100644
--- a/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core1/readme.txt
+++ b/boards/lpcxpresso55s69/multicore_examples/rpmsg_lite_pingpong_tzm/cm33_core1/readme.txt
@@ -26,10 +26,10 @@ The shared memory assignment to the secure domain is done in the BOARD_InitTrust
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/ntag_i2c_plus_examples/ntag_i2c_explorer_blink/cm33_core0/readme.txt b/boards/lpcxpresso55s69/ntag_i2c_plus_examples/ntag_i2c_explorer_blink/cm33_core0/readme.txt
index 95402269c..1a8721523 100644
--- a/boards/lpcxpresso55s69/ntag_i2c_plus_examples/ntag_i2c_explorer_blink/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/ntag_i2c_plus_examples/ntag_i2c_explorer_blink/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ there are some text messages on the terminal.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_event/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_event/cm33_core0/readme.txt
index 824d18c9f..9ee4af126 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_event/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_event/cm33_core0/readme.txt
@@ -17,9 +17,9 @@ Bit B1 is set.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_generic/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_generic/cm33_core0/readme.txt
index 94f9d7e56..8a20d54ba 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_generic/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_generic/cm33_core0/readme.txt
@@ -19,9 +19,9 @@ Other hook types used for RTOS and resource statistics are also demonstrated in
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_hello/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_hello/cm33_core0/readme.txt
index c61e79b4f..f01917c51 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_hello/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_hello/cm33_core0/readme.txt
@@ -12,9 +12,9 @@ via debug console utility and suspend itself.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_i2c/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_i2c/cm33_core0/readme.txt
index 748d93e80..679a19285 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_i2c/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_i2c/cm33_core0/readme.txt
@@ -13,9 +13,9 @@ Example program flow:
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_ns/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_ns/cm33_core0/readme.txt
index f8aa1c57c..513b20f25 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_ns/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_ns/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ so it demonstrates following techniques for TrustZone applications development:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_s/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_s/cm33_core0/readme.txt
index f8aa1c57c..513b20f25 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_s/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_mpu/freertos_mpu_s/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ so it demonstrates following techniques for TrustZone applications development:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_mutex/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_mutex/cm33_core0/readme.txt
index 6a2399c18..af6cbbede 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_mutex/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_mutex/cm33_core0/readme.txt
@@ -19,9 +19,9 @@ unlocked and second instance of write_task_2 is executed.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_queue/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_queue/cm33_core0/readme.txt
index 1aa14527d..c27b7476f 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_queue/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_queue/cm33_core0/readme.txt
@@ -17,9 +17,9 @@ write_task_2 print 5 messages into log.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_sem/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_sem/cm33_core0/readme.txt
index 5a2615660..31ad3a400 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_sem/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_sem/cm33_core0/readme.txt
@@ -14,9 +14,9 @@ consumer and producer must be prepared to enable transaction.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_spi/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_spi/cm33_core0/readme.txt
index 30ed2ac0c..659a08846 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_spi/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_spi/cm33_core0/readme.txt
@@ -10,9 +10,9 @@ the data)
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_swtimer/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_swtimer/cm33_core0/readme.txt
index 926e0f1a2..c1fe8b7b9 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_swtimer/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_swtimer/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ periodically executed and text “Tick.” is printed to terminal.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_tickless/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_tickless/cm33_core0/readme.txt
index 4b71dd4bb..9d50d177a 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_tickless/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_tickless/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ user defined button.
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_ns/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_ns/cm33_core0/readme.txt
index f4d2a5b34..8a87cdd31 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_ns/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_ns/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ so it demonstrates following techniques for TrustZone applications development:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_s/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_s/cm33_core0/readme.txt
index f4d2a5b34..8a87cdd31 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_s/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_tzm/freertos_blinky_s/cm33_core0/readme.txt
@@ -11,9 +11,9 @@ so it demonstrates following techniques for TrustZone applications development:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/rtos_examples/freertos_usart/cm33_core0/readme.txt b/boards/lpcxpresso55s69/rtos_examples/freertos_usart/cm33_core0/readme.txt
index 3bb2666b7..4d327d603 100644
--- a/boards/lpcxpresso55s69/rtos_examples/freertos_usart/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/rtos_examples/freertos_usart/cm33_core0/readme.txt
@@ -6,9 +6,9 @@ After every 4B received, these are sent back on USART.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs/cm33_core0/readme.txt b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs/cm33_core0/readme.txt
index a7e887ff3..a6413c6aa 100644
--- a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs/cm33_core0/readme.txt
@@ -8,9 +8,9 @@ based FATFS disk in SDK software.
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs_freertos/cm33_core0/readme.txt b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs_freertos/cm33_core0/readme.txt
index 3dec86bc5..cb7e66160 100644
--- a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs_freertos/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_fatfs_freertos/cm33_core0/readme.txt
@@ -7,10 +7,10 @@ Note: The output log of the case is not constant, since difference of card acces
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_interrupt/cm33_core0/readme.txt b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_interrupt/cm33_core0/readme.txt
index 982e55f81..affb8f56b 100644
--- a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_interrupt/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_interrupt/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ Note: If DATA3 is used as the card detect PIN, please make sure DATA3 is pull do
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_polling/cm33_core0/readme.txt b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_polling/cm33_core0/readme.txt
index ba27d8db1..c63fbb22f 100644
--- a/boards/lpcxpresso55s69/sdmmc_examples/sdcard_polling/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/sdmmc_examples/sdcard_polling/cm33_core0/readme.txt
@@ -7,9 +7,9 @@ Note: If DATA3 is used as the card detect PIN, please make sure DATA3 is pull do
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_GetInfo/cm33_core0/readme.txt b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_GetInfo/cm33_core0/readme.txt
index d76a22f90..a6e90147d 100644
--- a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_GetInfo/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_GetInfo/cm33_core0/readme.txt
@@ -2,9 +2,9 @@
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_Minimal/cm33_core0/readme.txt b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_Minimal/cm33_core0/readme.txt
index aa0cf178d..b245fd8d5 100644
--- a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_Minimal/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_Minimal/cm33_core0/readme.txt
@@ -2,9 +2,9 @@
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
-- GCC ARM Embedded  10.2.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_cloud_gcp/cm33_core0/readme.txt b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_cloud_gcp/cm33_core0/readme.txt
index 568a7f44a..05e853ace 100644
--- a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_cloud_gcp/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_cloud_gcp/cm33_core0/readme.txt
@@ -1,10 +1,10 @@
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
 - MCUXpresso  11.5.0
-- GCC ARM Embedded  10.2.1
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_ex_ecc/cm33_core0/readme.txt b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_ex_ecc/cm33_core0/readme.txt
index d76a22f90..a6e90147d 100644
--- a/boards/lpcxpresso55s69/se_hostlib_examples/se05x_ex_ecc/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/se_hostlib_examples/se05x_ex_ecc/cm33_core0/readme.txt
@@ -2,9 +2,9 @@
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/se_hostlib_examples/vcomSE050/cm33_core0/readme.txt b/boards/lpcxpresso55s69/se_hostlib_examples/vcomSE050/cm33_core0/readme.txt
index d76a22f90..a6e90147d 100644
--- a/boards/lpcxpresso55s69/se_hostlib_examples/vcomSE050/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/se_hostlib_examples/vcomSE050/cm33_core0/readme.txt
@@ -2,9 +2,9 @@
 Toolchain supported
 ===================
 - MCUXpresso  11.5.0
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 
 Hardware requirements
 =====================
diff --git a/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_ns/readme.txt b/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_ns/readme.txt
index 12c6a895f..b831728b4 100644
--- a/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_ns/readme.txt
+++ b/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_ns/readme.txt
@@ -9,9 +9,9 @@ NOTE: The TF-M main() functions have a non-standard location:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_s/readme.txt b/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_s/readme.txt
index 12c6a895f..b831728b4 100644
--- a/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_s/readme.txt
+++ b/boards/lpcxpresso55s69/tfm_examples/tfm_demo/cm33_core0/tfm_demo_s/readme.txt
@@ -9,9 +9,9 @@ NOTE: The TF-M main() functions have a non-standard location:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_ns/readme.txt b/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_ns/readme.txt
index 116c84f9f..9ac37258f 100644
--- a/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_ns/readme.txt
+++ b/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_ns/readme.txt
@@ -9,9 +9,9 @@ NOTE: The TF-M main() functions have a non-standard location:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_s/readme.txt b/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_s/readme.txt
index 116c84f9f..9ac37258f 100644
--- a/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_s/readme.txt
+++ b/boards/lpcxpresso55s69/tfm_examples/tfm_psatest/cm33_core0/tfm_psatest_s/readme.txt
@@ -9,9 +9,9 @@ NOTE: The TF-M main() functions have a non-standard location:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_ns/readme.txt b/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_ns/readme.txt
index 9a52d5534..8a69ac8d3 100644
--- a/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_ns/readme.txt
+++ b/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_ns/readme.txt
@@ -13,9 +13,9 @@ NOTE: The TF-M main() functions have a non-standard location:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_s/readme.txt b/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_s/readme.txt
index 9a52d5534..8a69ac8d3 100644
--- a/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_s/readme.txt
+++ b/boards/lpcxpresso55s69/tfm_examples/tfm_regression/cm33_core0/tfm_regression_s/readme.txt
@@ -13,9 +13,9 @@ NOTE: The TF-M main() functions have a non-standard location:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_ns/readme.txt b/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_ns/readme.txt
index e9b658595..b73865c06 100644
--- a/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_ns/readme.txt
+++ b/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_ns/readme.txt
@@ -11,9 +11,9 @@ so it demonstrates following techniques for TrustZone applications development:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_s/readme.txt b/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_s/readme.txt
index e9b658595..b73865c06 100644
--- a/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_s/readme.txt
+++ b/boards/lpcxpresso55s69/trustzone_examples/hello_world/cm33_core0/hello_world_s/readme.txt
@@ -11,9 +11,9 @@ so it demonstrates following techniques for TrustZone applications development:
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_ns/readme.txt b/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_ns/readme.txt
index 067e920c4..e21bf8bc3 100644
--- a/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_ns/readme.txt
+++ b/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_ns/readme.txt
@@ -14,9 +14,9 @@ TEST 5: Invalid data access from normal world, example 2
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_s/readme.txt b/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_s/readme.txt
index 067e920c4..e21bf8bc3 100644
--- a/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_s/readme.txt
+++ b/boards/lpcxpresso55s69/trustzone_examples/secure_faults/cm33_core0/secure_faults_s/readme.txt
@@ -14,9 +14,9 @@ TEST 5: Invalid data access from normal world, example 2
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_ns/readme.txt b/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_ns/readme.txt
index a971bbda4..1e8aa2582 100644
--- a/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_ns/readme.txt
+++ b/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_ns/readme.txt
@@ -27,9 +27,9 @@ by SW4 button since state of SW4 button is still read by secure GPIO from secure
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_s/readme.txt b/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_s/readme.txt
index a971bbda4..1e8aa2582 100644
--- a/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_s/readme.txt
+++ b/boards/lpcxpresso55s69/trustzone_examples/secure_gpio/cm33_core0/secure_gpio_s/readme.txt
@@ -27,9 +27,9 @@ by SW4 button since state of SW4 button is still read by secure GPIO from secure
 
 Toolchain supported
 ===================
-- GCC ARM Embedded  10.2.1
-- Keil MDK  5.34
-- IAR embedded Workbench  9.10.2
+- GCC ARM Embedded  10.3.1
+- Keil MDK  5.36
+- IAR embedded Workbench  9.20.2
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/wifi_examples/wifi_serial_demo/cm33_core0/readme.txt b/boards/lpcxpresso55s69/wifi_examples/wifi_serial_demo/cm33_core0/readme.txt
index 71e8e0d7a..8e07c0015 100644
--- a/boards/lpcxpresso55s69/wifi_examples/wifi_serial_demo/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/wifi_examples/wifi_serial_demo/cm33_core0/readme.txt
@@ -91,9 +91,9 @@ More information about the SerialMWM Wi-Fi module and the UART communication pro
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69/wifi_examples/wifi_serial_iperf3/cm33_core0/readme.txt b/boards/lpcxpresso55s69/wifi_examples/wifi_serial_iperf3/cm33_core0/readme.txt
index ced9a400a..4a093230a 100644
--- a/boards/lpcxpresso55s69/wifi_examples/wifi_serial_iperf3/cm33_core0/readme.txt
+++ b/boards/lpcxpresso55s69/wifi_examples/wifi_serial_iperf3/cm33_core0/readme.txt
@@ -18,9 +18,9 @@ The network throughput is limited by UART interface between board and Wi-Fi modu
 
 Toolchain supported
 ===================
-- IAR embedded Workbench  9.10.2
-- Keil MDK  5.34
-- GCC ARM Embedded  10.2.1
+- IAR embedded Workbench  9.20.2
+- Keil MDK  5.36
+- GCC ARM Embedded  10.3.1
 - MCUXpresso  11.5.0
 
 Hardware requirements
diff --git a/boards/lpcxpresso55s69_agm01/RTE_Device.h b/boards/lpcxpresso55s69_agm01/RTE_Device.h
deleted file mode 100644
index 5342eb0db..000000000
--- a/boards/lpcxpresso55s69_agm01/RTE_Device.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright 2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef _RTE_DEVICE_H
-#define _RTE_DEVICE_H
-
-extern void I2C4_InitPins();
-extern void I2C4_DeinitPins();
-extern void USART0_InitPins();
-extern void USART0_DeinitPins();
-extern void SPI7_InitPins();
-extern void SPI7_DeinitPins();
-extern void USART0_InitPins();
-extern void USART0_DeinitPins();
-extern void SPI7_InitPins();
-extern void SPI7_DeinitPins();
-
-/*I2C Driver name mapping*/
-/* User needs to provide the implementation of I2CX_GetFreq/I2CX_InitPins/I2CX_DeinitPins for the enabled I2C instance.
- */
-#define RTE_I2C4            1
-#define RTE_I2C4_PIN_INIT   I2C4_InitPins
-#define RTE_I2C4_PIN_DEINIT I2C4_DeinitPins
-#define RTE_I2C4_DMA_EN     0
-
-/*USART Driver name mapping. */
-/* User needs to provide the implementation of USARTX_GetFreq/USARTX_InitPins/USARTX_DeinitPins for the enabled USART
- * instance. */
-#define RTE_USART0            1
-#define RTE_USART0_PIN_INIT   USART0_InitPins
-#define RTE_USART0_PIN_DEINIT USART0_DeinitPins
-#define RTE_USART0_DMA_EN     0
-
-/*SPI Driver name mapping*/
-/* User needs to provide the implementation of SPIX_GetFreq/SPIX_InitPins/SPIX_DeinitPins for the enabled SPI instance.
- */
-#define RTE_SPI7            1
-#define RTE_SPI7_PIN_INIT   SPI7_InitPins
-#define RTE_SPI7_PIN_DEINIT SPI7_DeinitPins
-#define RTE_SPI7_DMA_EN     0
-
-/*I2C configuration*/
-#define RTE_I2C4_Master_DMA_BASE DMA0
-#define RTE_I2C4_Master_DMA_CH   21
-
-/* USART configuration. */
-#define USART_RX_BUFFER_LEN     64
-#define USART0_RX_BUFFER_ENABLE 1
-#define USART1_RX_BUFFER_ENABLE 0
-#define USART2_RX_BUFFER_ENABLE 0
-#define USART3_RX_BUFFER_ENABLE 0
-#define USART4_RX_BUFFER_ENABLE 0
-#define USART5_RX_BUFFER_ENABLE 0
-#define USART6_RX_BUFFER_ENABLE 0
-#define USART7_RX_BUFFER_ENABLE 0
-
-#define RTE_USART0_PIN_INIT        USART0_InitPins
-#define RTE_USART0_PIN_DEINIT      USART0_DeinitPins
-#define RTE_USART0_DMA_TX_CH       5
-#define RTE_USART0_DMA_TX_DMA_BASE DMA0
-#define RTE_USART0_DMA_RX_CH       4
-#define RTE_USART0_DMA_RX_DMA_BASE DMA0
-
-/* SPI configuration. */
-
-#define RTE_SPI7_SSEL_NUM        kSPI_Ssel1
-#define RTE_SPI7_PIN_INIT        SPI7_InitPins
-#define RTE_SPI7_PIN_DEINIT      SPI7_DeinitPins
-#define RTE_SPI7_DMA_TX_CH       19
-#define RTE_SPI7_DMA_TX_DMA_BASE DMA0
-#define RTE_SPI7_DMA_RX_CH       18
-#define RTE_SPI7_DMA_RX_DMA_BASE DMA0
-#endif /* _RTE_DEVICE_H */
diff --git a/boards/lpcxpresso55s69_agm01/frdm_stbc_agm01_shield.h b/boards/lpcxpresso55s69_agm01/frdm_stbc_agm01_shield.h
deleted file mode 100644
index 9914d28d4..000000000
--- a/boards/lpcxpresso55s69_agm01/frdm_stbc_agm01_shield.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2015, Freescale Semiconductor, Inc.
- * Copyright 2016-2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/**
- * @file frdm_stbc_agm01_shield.h
- * @brief The frdm_stbc_agm01_shield.h file declares mapping of the Kinetis
-         Device peripherals to the lpcxpresso54114 and frmd-stbc-agm01 shield
- */
-
-#ifndef _FRDM_STBC_AGM01_SHIELD_H_
-#define _FRDM_STBC_AGM01_SHIELD_H_
-
-/* The shield name */
-#define SHIELD_NAME "FRDM-STBC-AGM01"
-
-// FXOS8700 Sensor Information
-#define FXOS8700_I2C_ADDR 0x1E
-#define FXOS8700_INT1     D2
-#define FXOS8700_INT2     D4
-#define FXOS8700_CS       A2
-
-// FXAS21002 Sensor Information
-#define FXAS21002_I2C_ADDR 0x20
-#define FXAS21002_INT1     D5
-#define FXAS21002_CS       D10
-
-// FRDM-STBC-AGM01 Shield Reset
-#define RESET_GPIO A3
-
-///@name Shield Parameters
-/// Use this section to define the shield board: 3 bit code 0 to 7 inclusive
-/// transmitted in bits 7-5 for display purposes only.
-///@{
-#define SHIELD_MULTIB 0
-#define SHIELD_NONE   1
-#define SHIELD_AGM01  2
-#define SHIELD_AGM02  3
-#define SHIELD_AGMP03 4
-#define SHIELD_AGM04  5
-#define THIS_SHIELD   SHIELD_AGM01
-
-// spare 5 to 7 inclusive
-///@}
-
-#endif /* _FRDM_STBC_AGM01_SHIELD_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/CMakeLists.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/CMakeLists.txt
deleted file mode 100644
index d77fafb22..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/CMakeLists.txt
+++ /dev/null
@@ -1,160 +0,0 @@
-# CROSS COMPILER SETTING
-SET(CMAKE_SYSTEM_NAME Generic)
-CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
-
-# THE VERSION NUMBER
-SET (Tutorial_VERSION_MAJOR 1)
-SET (Tutorial_VERSION_MINOR 0)
-
-# ENABLE ASM
-ENABLE_LANGUAGE(ASM)
-
-SET(CMAKE_STATIC_LIBRARY_PREFIX)
-SET(CMAKE_STATIC_LIBRARY_SUFFIX)
-
-SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
-SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
-
-# CURRENT DIRECTORY
-SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
-
-SET(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-SET(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-
-
-project(fxas21002_fifo_niobe4)
-
-set(MCUX_SDK_PROJECT_NAME fxas21002_fifo_niobe4.elf)
-
-include(${ProjDirPath}/flags.cmake)
-
-include(${ProjDirPath}/config.cmake)
-
-add_executable(${MCUX_SDK_PROJECT_NAME} 
-"${ProjDirPath}/../../../../../lpc55s69.c"
-"${ProjDirPath}/../../../../../lpc55s69.h"
-"${ProjDirPath}/../../../../../frdm_stbc_agm01_shield.h"
-"${ProjDirPath}/../../../../../issdk_hal.h"
-"${ProjDirPath}/../../../../../RTE_Device.h"
-"${ProjDirPath}/../fxas21002_fifo.c"
-"${ProjDirPath}/../pin_mux.c"
-"${ProjDirPath}/../pin_mux.h"
-"${ProjDirPath}/../board.c"
-"${ProjDirPath}/../board.h"
-"${ProjDirPath}/../clock_config.c"
-"${ProjDirPath}/../clock_config.h"
-)
-
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
-    ${ProjDirPath}/../../../../..
-    ${ProjDirPath}/..
-)
-
-set(CMAKE_MODULE_PATH
-    ${ProjDirPath}/../../../../../../../middleware/issdk
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/cmsis_drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/utilities
-    ${ProjDirPath}/../../../../../../../components/uart
-    ${ProjDirPath}/../../../../../../../components/serial_manager
-    ${ProjDirPath}/../../../../../../../components/lists
-    ${ProjDirPath}/../../../../../../../CMSIS/Core/Include
-    ${ProjDirPath}/../../../../../../../CMSIS/Driver/Include
-)
-
-# include modules
-include(middleware_issdk_drivers_gpio_lpc_LPC55S69_cm33_core0)
-
-include(driver_lpc_dma_LPC55S69_cm33_core0)
-
-include(driver_gint_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(middleware_issdk_drivers_systick_utils_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_interface_common_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_fxas21002_LPC55S69_cm33_core0)
-
-include(driver_common_LPC55S69_cm33_core0)
-
-include(driver_clock_LPC55S69_cm33_core0)
-
-include(driver_power_LPC55S69_cm33_core0)
-
-include(driver_lpc_iocon_LPC55S69_cm33_core0)
-
-include(driver_inputmux_LPC55S69_cm33_core0)
-
-include(driver_inputmux_connections_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_CMSIS_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_startup_LPC55S69_cm33_core0)
-
-include(driver_lpc_gpio_LPC55S69_cm33_core0)
-
-include(utility_assert_LPC55S69_cm33_core0)
-
-include(utility_debug_console_LPC55S69_cm33_core0)
-
-include(component_usart_adapter_LPC55S69_cm33_core0)
-
-include(component_serial_manager_LPC55S69_cm33_core0)
-
-include(component_lists_LPC55S69_cm33_core0)
-
-include(component_serial_manager_uart_LPC55S69_cm33_core0)
-
-include(driver_reset_LPC55S69_cm33_core0)
-
-include(CMSIS_Include_core_cm_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_I2C_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_Common_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_SPI_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_USART_LPC55S69_cm33_core0)
-
-include(utilities_misc_utilities_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_system_LPC55S69_cm33_core0)
-
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--start-group)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE m)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE c)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE gcc)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE nosys)
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
-
-ADD_CUSTOM_COMMAND(TARGET ${MCUX_SDK_PROJECT_NAME} POST_BUILD COMMAND ${CMAKE_OBJCOPY}
--Obinary ${EXECUTABLE_OUTPUT_PATH}/${MCUX_SDK_PROJECT_NAME} ${EXECUTABLE_OUTPUT_PATH}/LPC55S69-AGM01-FXAS21002-FIFO-CORE0.bin)
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/LPC55S69_cm33_core0_flash.ld b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/LPC55S69_cm33_core0_flash.ld
deleted file mode 100644
index ef9bc99b6..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/LPC55S69_cm33_core0_flash.ld
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
-** ###################################################################
-**     Processors:          LPC55S69JBD100_cm33_core0
-**                          LPC55S69JBD64_cm33_core0
-**                          LPC55S69JEV98_cm33_core0
-**
-**     Compiler:            GNU C Compiler
-**     Reference manual:    LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3  16 May 2019
-**     Version:             rev. 1.1, 2019-05-16
-**     Build:               b210928
-**
-**     Abstract:
-**         Linker file for the GNU C Compiler
-**
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2021 NXP
-**     All rights reserved.
-**
-**     SPDX-License-Identifier: BSD-3-Clause
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800;
-RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0;
-
-/* Specify the memory areas */
-MEMORY
-{
-  m_interrupts          (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000200
-  m_text                (RX)  : ORIGIN = 0x00000200, LENGTH = 0x00071E00
-  m_core1_image         (RX)  : ORIGIN = 0x00072000, LENGTH = 0x0002B800
-  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00033000 - RPMSG_SHMEM_SIZE
-  rpmsg_sh_mem          (RW)  : ORIGIN = 0x20033000 - RPMSG_SHMEM_SIZE, LENGTH = RPMSG_SHMEM_SIZE
-  m_usb_sram            (RW)  : ORIGIN = 0x40100000, LENGTH = 0x00004000
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* section for storing the secondary core image */
-  .core1_code :
-  {
-     . = ALIGN(4) ;
-    KEEP (*(.core1_code))
-     *(.core1_code*)
-     . = ALIGN(4) ;
-  } > m_core1_image
-
-  /* NOINIT section for rpmsg_sh_mem */
-  .noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4)
-  {
-     __RPMSG_SH_MEM_START__ = .;
-     *(.noinit.$rpmsg_sh_mem*)
-     . = ALIGN(4) ;
-     __RPMSG_SH_MEM_END__ = .;
-  } > rpmsg_sh_mem
-
-  /* The startup code goes first into internal flash */
-  .interrupts :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector))     /* Startup code */
-    . = ALIGN(4);
-  } > m_interrupts
-
-  /* The program code and other data goes into internal flash */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)                 /* .text sections (code) */
-    *(.text*)                /* .text* sections (code) */
-    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
-    *(.glue_7)               /* glue arm to thumb code */
-    *(.glue_7t)              /* glue thumb to arm code */
-    *(.eh_frame)
-    KEEP (*(.init))
-    KEEP (*(.fini))
-    . = ALIGN(4);
-  } > m_text
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } > m_text
-
- .ctors :
-  {
-    __CTOR_LIST__ = .;
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       from the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __CTOR_END__ = .;
-  } > m_text
-
-  .dtors :
-  {
-    __DTOR_LIST__ = .;
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    __DTOR_END__ = .;
-  } > m_text
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text
-
-  __etext = .;    /* define a global symbol at end of code */
-  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
-
-  .data : AT(__DATA_ROM)
-  {
-    . = ALIGN(4);
-    __DATA_RAM = .;
-    __data_start__ = .;      /* create a global symbol at data start */
-    *(.ramfunc*)             /* for functions in ram */
-    *(.data)                 /* .data sections */
-    *(.data*)                /* .data* sections */
-    KEEP(*(.jcr*))
-    . = ALIGN(4);
-    __data_end__ = .;        /* define a global symbol at data end */
-  } > m_data
-
-  __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
-  text_end = ORIGIN(m_text) + LENGTH(m_text);
-  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
-
-  /* Uninitialized data section */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    . = ALIGN(4);
-    __START_BSS = .;
-    __bss_start__ = .;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-    . = ALIGN(4);
-    __bss_end__ = .;
-    __END_BSS = .;
-  } > m_data
-
-  .heap :
-  {
-    . = ALIGN(8);
-    __end__ = .;
-    PROVIDE(end = .);
-    __HeapBase = .;
-    . += HEAP_SIZE;
-    __HeapLimit = .;
-    __heap_limit = .; /* Add for _sbrk */
-  } > m_data
-
-  .stack :
-  {
-    . = ALIGN(8);
-    . += STACK_SIZE;
-  } > m_data
-
-  m_usb_bdt (NOLOAD) :
-  {
-    . = ALIGN(512);
-    *(m_usb_bdt)
-  } > m_usb_sram
-
-  m_usb_global (NOLOAD) :
-  {
-    *(m_usb_global)
-  } > m_usb_sram
-
-  /* Initializes stack on the end of block */
-  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
-  __StackLimit = __StackTop - STACK_SIZE;
-  PROVIDE(__stack = __StackTop);
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-
-  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
-}
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_all.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_all.sh
deleted file mode 100755
index 5702db0cf..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_all.sh
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-make -j
-
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
-make -j
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_release.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_release.bat
deleted file mode 100644
index a34003e0e..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_release.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
-mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_release.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_release.sh
deleted file mode 100755
index 012619cda..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/build_release.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
-make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/config.cmake b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/config.cmake
deleted file mode 100755
index bcbaf4174..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc/config.cmake
+++ /dev/null
@@ -1,4 +0,0 @@
-# config to select component, the format is CONFIG_USE_${component}
-set(CONFIG_USE_driver_power_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_component_serial_manager_uart_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_driver_flexcomm_usart_LPC55S69_cm33_core0 true)
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/fxas21002_fifo.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/fxas21002_fifo.c
deleted file mode 100644
index 93b931048..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/fxas21002_fifo.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
- * Copyright 2016-2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/**
- * @file fxas21002_fifo.c
- * @brief The fxas21002_fifo.c file implements the ISSDK FXAS21002 sensor driver
- *        example demonstration with FIFO mode.
- */
-
-/*  SDK Includes */
-#include "pin_mux.h"
-#include "clock_config.h"
-#include "board.h"
-#include "fsl_debug_console.h"
-
-/* CMSIS Includes */
-#include "Driver_I2C.h"
-
-/* ISSDK Includes */
-#include "issdk_hal.h"
-#include "fxas21002_drv.h"
-
-/*******************************************************************************
- * Macro Definitions
- ******************************************************************************/
-/*---------------------------------------------------------------------------*/
-/*! @def    FIFO_SIZE
- *  @brief  The watermark value configured for FXAS21002 FIFO Buffer.
- */
-#define FIFO_SIZE 4
-
-/*******************************************************************************
- * Constants
- ******************************************************************************/
-/*! Prepare the register write list to configure FXAS21002 in FIFO mode. */
-const registerwritelist_t fxas21002_Config_with_Fifo[] = {
-    /*! Configure CTRL_REG1 register to put FXAS21002 to 12.5Hz sampling rate. */
-    {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
-    /*! Configure F_SETUP register to set FIFO in Stop mode, Watermark of 16. */
-    {FXAS21002_F_SETUP, FXAS21002_F_SETUP_F_MODE_STOP_MODE | (FIFO_SIZE << FXAS21002_F_SETUP_F_WMRK_SHIFT),
-     FXAS21002_F_SETUP_F_MODE_MASK | FXAS21002_F_SETUP_F_WMRK_MASK},
-    {FXAS21002_CTRL_REG3, FXAS21002_CTRL_REG3_WRAPTOONE_ROLL_DATA, FXAS21002_CTRL_REG3_WRAPTOONE_MASK},
-    __END_WRITE_DATA__};
-
-/*! Prepare the register read list to read FXAS21002 FIFO event. */
-const registerreadlist_t fxas21002_Fifo_Event[] = {{.readFrom = FXAS21002_F_EVENT, .numBytes = 1}, __END_READ_DATA__};
-
-/*! Prepare the register read list to read the raw gyro data from the FXAS21002. */
-const registerreadlist_t fxas21002_Output_Values[] = {
-    {.readFrom = FXAS21002_OUT_X_MSB, .numBytes = FXAS21002_GYRO_DATA_SIZE * FIFO_SIZE}, __END_READ_DATA__};
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/*!
- * @brief Main function
- */
-int main(void)
-{
-    int32_t status;
-    uint8_t fifoEvent;
-    uint8_t data[FXAS21002_GYRO_DATA_SIZE * FIFO_SIZE];
-    fxas21002_gyrodata_t rawData;
-
-    ARM_DRIVER_I2C *I2Cdrv = &I2C_S_DRIVER; // Now using the shield.h value!!!
-    fxas21002_i2c_sensorhandle_t FXAS21002drv;
-
-    /*! Initialize the MCU hardware. */
-    BOARD_InitPins();
-    BOARD_BootClockRUN();
-    BOARD_InitDebugConsole();
-
-    PRINTF("\r\n ISSDK FXAS21002 sensor driver example demonstration with fifo mode\r\n");
-
-    /*! Initialize the I2C driver. */
-    status = I2Cdrv->Initialize(I2C_S_SIGNAL_EVENT);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Initialization Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C Power mode. */
-    status = I2Cdrv->PowerControl(ARM_POWER_FULL);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Power Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C bus speed. */
-    status = I2Cdrv->Control(ARM_I2C_BUS_SPEED, ARM_I2C_BUS_SPEED_FAST);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Control Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Initialize the FXAS21002 sensor driver. */
-    status = FXAS21002_I2C_Initialize(&FXAS21002drv, &I2C_S_DRIVER, I2C_S_DEVICE_INDEX, FXAS21002_I2C_ADDR,
-                                      FXAS21002_WHO_AM_I_WHOAMI_PROD_VALUE);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n Sensor Initialization Failed\r\n");
-        return -1;
-    }
-    PRINTF("\r\n Successfully Initiliazed Sensor\r\n");
-
-    /*!  Set the task to be executed while waiting for I2C transactions to complete. */
-    //FXAS21002_I2C_SetIdleTask(&FXAS21002drv, (registeridlefunction_t)SMC_SetPowerModeVlpr, SMC);
-
-    /*! Configure the FXAS21002 sensor driver. */
-    status = FXAS21002_I2C_Configure(&FXAS21002drv, fxas21002_Config_with_Fifo);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n FXAS21002 Sensor Configuration Failed, Err = %d\r\n", status);
-        return -1;
-    }
-    PRINTF("\r\n Successfully Applied FXAS21002 Sensor Configuration\r\n");
-
-    for (;;) /* Forever loop */
-    {
-        /*! Wait for the FIFO watermark event. */
-        status = FXAS21002_I2C_ReadData(&FXAS21002drv, fxas21002_Fifo_Event, &fifoEvent);
-        if (0 == (fifoEvent & FXAS21002_F_EVENT_F_EVENT_MASK))
-        {
-            continue;
-        }
-
-        /*! Read the raw sensor data from the FXAS21002. */
-        status = FXAS21002_I2C_ReadData(&FXAS21002drv, fxas21002_Output_Values, data);
-        if (ARM_DRIVER_OK != status)
-        {
-            PRINTF("\r\n Read Failed. \r\n");
-            return -1;
-        }
-
-        for (uint8_t i = 0; i < FIFO_SIZE; i++)
-        {
-            /*! Convert the raw sensor data to signed 16-bit container for display to the debug port. */
-            rawData.gyro[0] =
-                ((int16_t)data[i * FXAS21002_GYRO_DATA_SIZE + 0] << 8) | data[i * FXAS21002_GYRO_DATA_SIZE + 1];
-            rawData.gyro[1] =
-                ((int16_t)data[i * FXAS21002_GYRO_DATA_SIZE + 2] << 8) | data[i * FXAS21002_GYRO_DATA_SIZE + 3];
-            rawData.gyro[2] =
-                ((int16_t)data[i * FXAS21002_GYRO_DATA_SIZE + 4] << 8) | data[i * FXAS21002_GYRO_DATA_SIZE + 5];
-        }
-        /* NOTE: PRINTF is relatively expensive in terms of CPU time, specially when used with-in execution loop. */
-        PRINTF("\r\n Gyro X = %d  Y = %d  Z = %d\r\n", rawData.gyro[0], rawData.gyro[1], rawData.gyro[2]);
-        ASK_USER_TO_RESUME(100 / FIFO_SIZE); /* Ask for user input after processing 100 samples. */
-    }
-}
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/fxas21002_fifo_niobe4_v3_9.xml b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/fxas21002_fifo_niobe4_v3_9.xml
deleted file mode 100644
index ed738efe2..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/fxas21002_fifo_niobe4_v3_9.xml
+++ /dev/null
@@ -1,159 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<ksdk:examples xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd manifest.xsd">
-  <externalDefinitions>
-    <definition extID="cm33_core0_LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.gpio_lpc.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_dma.LPC55S69"/>
-    <definition extID="platform.drivers.gint.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_cmsis.LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.systick_utils.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.interface.common.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.fxas21002.LPC55S69"/>
-    <definition extID="platform.drivers.common.LPC55S69"/>
-    <definition extID="platform.drivers.clock.LPC55S69"/>
-    <definition extID="platform.drivers.power.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_iocon.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux_connections.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_CMSIS.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_startup.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_gpio.LPC55S69"/>
-    <definition extID="platform.utilities.assert.LPC55S69"/>
-    <definition extID="utility.debug_console.LPC55S69"/>
-    <definition extID="component.usart_adapter.LPC55S69"/>
-    <definition extID="component.serial_manager.LPC55S69"/>
-    <definition extID="component.lists.LPC55S69"/>
-    <definition extID="component.serial_manager_uart.LPC55S69"/>
-    <definition extID="platform.drivers.reset.LPC55S69"/>
-    <definition extID="CMSIS_Include_core_cm.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.I2C.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.Common.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.SPI.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.USART.LPC55S69"/>
-    <definition extID="platform.utilities.misc_utilities.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_system.LPC55S69"/>
-    <definition extID="iar"/>
-    <definition extID="mdk"/>
-    <definition extID="armgcc"/>
-    <definition extID="mcuxpresso"/>
-    <definition extID="com.nxp.mcuxpresso"/>
-  </externalDefinitions>
-  <example id="lpcxpresso55s69_agm01_fxas21002_fifo_niobe4" name="fxas21002_fifo_niobe4" device_core="cm33_core0_LPC55S69" dependency="middleware.issdk.drivers.gpio_lpc.LPC55S69 platform.drivers.lpc_dma.LPC55S69 platform.drivers.gint.LPC55S69 platform.drivers.flexcomm.LPC55S69 platform.drivers.flexcomm_i2c.LPC55S69 platform.drivers.flexcomm_i2c_dma.LPC55S69 platform.drivers.flexcomm_i2c_cmsis.LPC55S69 platform.drivers.flexcomm_spi.LPC55S69 platform.drivers.flexcomm_spi_dma.LPC55S69 platform.drivers.flexcomm_spi_cmsis.LPC55S69 platform.drivers.flexcomm_usart.LPC55S69 platform.drivers.flexcomm_usart_dma.LPC55S69 platform.drivers.flexcomm_usart_cmsis.LPC55S69 middleware.issdk.drivers.systick_utils.LPC55S69 middleware.issdk.sensor.interface.common.LPC55S69 middleware.issdk.sensor.fxas21002.LPC55S69 platform.drivers.common.LPC55S69 platform.drivers.clock.LPC55S69 platform.drivers.power.LPC55S69 platform.drivers.lpc_iocon.LPC55S69 platform.drivers.inputmux.LPC55S69 platform.drivers.inputmux_connections.LPC55S69 platform.devices.LPC55S69_CMSIS.LPC55S69 platform.devices.LPC55S69_startup.LPC55S69 platform.drivers.lpc_gpio.LPC55S69 platform.utilities.assert.LPC55S69 utility.debug_console.LPC55S69 component.usart_adapter.LPC55S69 component.serial_manager.LPC55S69 component.lists.LPC55S69 component.serial_manager_uart.LPC55S69 platform.drivers.reset.LPC55S69 CMSIS_Include_core_cm.LPC55S69 CMSIS_Driver_Include.I2C.LPC55S69 CMSIS_Driver_Include.Common.LPC55S69 CMSIS_Driver_Include.SPI.LPC55S69 CMSIS_Driver_Include.USART.LPC55S69 platform.utilities.misc_utilities.LPC55S69 platform.devices.LPC55S69_system.LPC55S69" category="issdk/sensors">
-    <projects>
-      <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
-    </projects>
-    <toolchainSettings>
-      <toolchainSetting id_refs="com.nxp.mcuxpresso">
-        <option id="gnu.c.compiler.option.preprocessor.def.symbols" type="stringList">
-          <value>CPU_LPC55S69JBD100_cm33_core0</value>
-          <value>PRINTF_ADVANCED_ENABLE=1</value>
-          <value>SERIAL_PORT_TYPE_UART=1</value>
-          <value>MCUXPRESSO_SDK</value>
-        </option>
-        <option id="com.crt.advproject.gas.fpu" type="enum">
-          <value>com.crt.advproject.gas.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="com.crt.advproject.gcc.fpu" type="enum">
-          <value>com.crt.advproject.gcc.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.compiler.option.optimization.flags" type="string">
-          <value>-fno-common</value>
-        </option>
-        <option id="com.crt.advproject.c.misc.dialect" type="enum">
-          <value>com.crt.advproject.misc.dialect.gnu99</value>
-        </option>
-        <option id="gnu.c.compiler.option.misc.other" type="string">
-          <value>-mcpu=cortex-m33 -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin</value>
-        </option>
-        <option id="gnu.c.compiler.option.warnings.allwarn" type="boolean">
-          <value>false</value>
-        </option>
-        <option id="com.crt.advproject.link.fpu" type="enum">
-          <value>com.crt.advproject.link.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.link.option.nostdlibs" type="boolean">
-          <value>true</value>
-        </option>
-      </toolchainSetting>
-    </toolchainSettings>
-    <include_paths>
-      <include_path path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include"/>
-      <include_path path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="board" type="c_include"/>
-    </include_paths>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/iar" project_relative_path="./" type="workspace" toolchain="iar">
-      <files mask="fxas21002_fifo_niobe4.ewd"/>
-      <files mask="fxas21002_fifo_niobe4.ewp"/>
-      <files mask="fxas21002_fifo_niobe4.eww"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/mdk" project_relative_path="./" type="workspace" toolchain="mdk">
-      <files mask="fxas21002_fifo_niobe4.uvprojx"/>
-      <files mask="fxas21002_fifo_niobe4.uvoptx"/>
-      <files mask="JLinkSettings.JLinkScript"/>
-      <files mask="JLinkSettings.ini"/>
-      <files mask="fxas21002_fifo_niobe4.uvmpw"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc" project_relative_path="./" type="workspace" toolchain="armgcc">
-      <files mask="build_all.bat"/>
-      <files mask="build_all.sh"/>
-      <files mask="clean.bat"/>
-      <files mask="clean.sh"/>
-      <files mask="CMakeLists.txt"/>
-      <files mask="flags.cmake"/>
-      <files mask="config.cmake"/>
-      <files mask="build_debug.bat"/>
-      <files mask="build_debug.sh"/>
-      <files mask="build_release.bat"/>
-      <files mask="build_release.sh"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="src">
-      <files mask="lpc55s69.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include">
-      <files mask="lpc55s69.h"/>
-      <files mask="frdm_stbc_agm01_shield.h"/>
-      <files mask="issdk_hal.h"/>
-      <files mask="RTE_Device.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="source" type="src">
-      <files mask="fxas21002_fifo.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="board" type="src">
-      <files mask="pin_mux.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="board" type="c_include">
-      <files mask="pin_mux.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="doc" type="doc">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="board" type="src">
-      <files mask="board.c"/>
-      <files mask="clock_config.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="board" type="c_include">
-      <files mask="board.h"/>
-      <files mask="clock_config.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo" project_relative_path="doc" type="doc" toolchain="iar mdk mcuxpresso">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/iar" project_relative_path="LPC55S69/iar" type="linker" toolchain="iar">
-      <files mask="LPC55S69_cm33_core0_flash.icf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/mdk" project_relative_path="LPC55S69/arm" type="linker" toolchain="mdk">
-      <files mask="LPC55S69_cm33_core0_flash.scf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/armgcc" project_relative_path="LPC55S69/gcc" type="linker" toolchain="armgcc">
-      <files mask="LPC55S69_cm33_core0_flash.ld"/>
-    </source>
-  </example>
-</ksdk:examples>
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/pin_mux.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/pin_mux.c
deleted file mode 100644
index e68e17d70..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/pin_mux.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v6.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 0.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_iocon.h"
-#include "pin_mux.h"
-#include "fsl_power.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitPins(void)
-{
-    /* set BOD VBAT level to 1.65V */
-    POWER_SetBodVbatLevel(kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false);
-
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: enabled}
-  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: enabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '30', peripheral: GPIO, signal: 'PIO1, 21', pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as PIO1_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN21 (coords: 30) is configured as PIO1_21 */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '92', peripheral: GPIO, signal: 'PIO0, 29', pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '94', peripheral: GPIO, signal: 'PIO0, 30', pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as PIO0_29 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as PIO0_29 */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as PIO0_30 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as PIO0_30 */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: FLEXCOMM7, signal: RTS_SCL_SSEL1, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC7_RTS_SCL_SSEL1 */
-                                         IOCON_PIO_FUNC1 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as FC7_RTS_SCL_SSEL1 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: GPIO, signal: 'PIO0, 20', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as PIO0_19 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as PIO0_19 */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as PIO0_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as PIO0_20 */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as PIO0_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as PIO0_21 */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/pin_mux.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/pin_mux.h
deleted file mode 100644
index 8c1307b13..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/pin_mux.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u   /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC5 0x05u          /*!<@brief Selects pin function 5 */
-#define IOCON_PIO_INV_DI 0x00u         /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u    /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_EN 0x0200u /*!<@brief Open drain is enabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u  /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/readme.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/readme.txt
deleted file mode 100644
index c4153b291..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_fifo/readme.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-Hardware requirements
-===================
-- Mini/micro USB cable
-- LPCXpresso55s69 board
-- FRDM-STBC-AGM01 board
-- Personal Computer
-
-Board settings
-==============
-On FRDM-STBC-AGM01 sensor shield board:
---------------------------------------
-For I2C Mode: The examples use I2C1 and Pins 2-3 of Jumpers J6 and J7 on FRDM-STBC-AGM01 should be connected.
-For SPI Mode: The examples use SPI0 and the FRDM-STBC-AGM01 needs to be rewired for SPI which requires removal of Resistor R3.
-
-Demo Overview
-============
-The FXAS21002 FIFO example application demonstrates the use of the FXAS21002 sensor in Buffered (FIFO) Mode.
-The example demonstrates configuration of all registers reguired to put the sensor in FIFO Mode and read out samples.
-
-The sensor reads samples and are buffered upto the configured Water Mark Level and then a Flag is set.
-The application consistently checks the Flag and when set, reads out all(count=Water Mark Level) samples.
-
-Prepare the Demo
-===============
-1.  Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
-2.  Open a serial terminal with the following settings:
-    - 115200 baud rate
-    - 8 data bits
-    - No parity
-    - One stop bit
-    - No flow control
-3.  Download the program to the target board.
-4.  Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
-
-Running the demo
-===============
-When the demo runs successfully, you can see the Samples printed to the terminal.
-
-Note: you must rotate the board to get the samples to change.
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/CMakeLists.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/CMakeLists.txt
deleted file mode 100644
index c8cacfa73..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/CMakeLists.txt
+++ /dev/null
@@ -1,160 +0,0 @@
-# CROSS COMPILER SETTING
-SET(CMAKE_SYSTEM_NAME Generic)
-CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
-
-# THE VERSION NUMBER
-SET (Tutorial_VERSION_MAJOR 1)
-SET (Tutorial_VERSION_MINOR 0)
-
-# ENABLE ASM
-ENABLE_LANGUAGE(ASM)
-
-SET(CMAKE_STATIC_LIBRARY_PREFIX)
-SET(CMAKE_STATIC_LIBRARY_SUFFIX)
-
-SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
-SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
-
-# CURRENT DIRECTORY
-SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
-
-SET(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-SET(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-
-
-project(fxas21002_poll_niobe4)
-
-set(MCUX_SDK_PROJECT_NAME fxas21002_poll_niobe4.elf)
-
-include(${ProjDirPath}/flags.cmake)
-
-include(${ProjDirPath}/config.cmake)
-
-add_executable(${MCUX_SDK_PROJECT_NAME} 
-"${ProjDirPath}/../../../../../lpc55s69.c"
-"${ProjDirPath}/../../../../../lpc55s69.h"
-"${ProjDirPath}/../../../../../frdm_stbc_agm01_shield.h"
-"${ProjDirPath}/../../../../../issdk_hal.h"
-"${ProjDirPath}/../../../../../RTE_Device.h"
-"${ProjDirPath}/../fxas21002_poll.c"
-"${ProjDirPath}/../pin_mux.c"
-"${ProjDirPath}/../pin_mux.h"
-"${ProjDirPath}/../board.c"
-"${ProjDirPath}/../board.h"
-"${ProjDirPath}/../clock_config.c"
-"${ProjDirPath}/../clock_config.h"
-)
-
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
-    ${ProjDirPath}/../../../../..
-    ${ProjDirPath}/..
-)
-
-set(CMAKE_MODULE_PATH
-    ${ProjDirPath}/../../../../../../../middleware/issdk
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/cmsis_drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/utilities
-    ${ProjDirPath}/../../../../../../../components/uart
-    ${ProjDirPath}/../../../../../../../components/serial_manager
-    ${ProjDirPath}/../../../../../../../components/lists
-    ${ProjDirPath}/../../../../../../../CMSIS/Core/Include
-    ${ProjDirPath}/../../../../../../../CMSIS/Driver/Include
-)
-
-# include modules
-include(middleware_issdk_drivers_gpio_lpc_LPC55S69_cm33_core0)
-
-include(driver_lpc_dma_LPC55S69_cm33_core0)
-
-include(driver_gint_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(middleware_issdk_drivers_systick_utils_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_interface_common_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_fxas21002_LPC55S69_cm33_core0)
-
-include(driver_common_LPC55S69_cm33_core0)
-
-include(driver_clock_LPC55S69_cm33_core0)
-
-include(driver_power_LPC55S69_cm33_core0)
-
-include(driver_lpc_iocon_LPC55S69_cm33_core0)
-
-include(driver_inputmux_LPC55S69_cm33_core0)
-
-include(driver_inputmux_connections_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_CMSIS_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_startup_LPC55S69_cm33_core0)
-
-include(driver_lpc_gpio_LPC55S69_cm33_core0)
-
-include(utility_assert_LPC55S69_cm33_core0)
-
-include(utility_debug_console_LPC55S69_cm33_core0)
-
-include(component_usart_adapter_LPC55S69_cm33_core0)
-
-include(component_serial_manager_LPC55S69_cm33_core0)
-
-include(component_lists_LPC55S69_cm33_core0)
-
-include(component_serial_manager_uart_LPC55S69_cm33_core0)
-
-include(driver_reset_LPC55S69_cm33_core0)
-
-include(CMSIS_Include_core_cm_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_I2C_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_Common_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_SPI_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_USART_LPC55S69_cm33_core0)
-
-include(utilities_misc_utilities_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_system_LPC55S69_cm33_core0)
-
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--start-group)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE m)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE c)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE gcc)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE nosys)
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
-
-ADD_CUSTOM_COMMAND(TARGET ${MCUX_SDK_PROJECT_NAME} POST_BUILD COMMAND ${CMAKE_OBJCOPY}
--Obinary ${EXECUTABLE_OUTPUT_PATH}/${MCUX_SDK_PROJECT_NAME} ${EXECUTABLE_OUTPUT_PATH}/LPC55S69-AGM01-FXAS21002-POLL-CORE0.bin)
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/LPC55S69_cm33_core0_flash.ld b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/LPC55S69_cm33_core0_flash.ld
deleted file mode 100644
index ef9bc99b6..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/LPC55S69_cm33_core0_flash.ld
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
-** ###################################################################
-**     Processors:          LPC55S69JBD100_cm33_core0
-**                          LPC55S69JBD64_cm33_core0
-**                          LPC55S69JEV98_cm33_core0
-**
-**     Compiler:            GNU C Compiler
-**     Reference manual:    LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3  16 May 2019
-**     Version:             rev. 1.1, 2019-05-16
-**     Build:               b210928
-**
-**     Abstract:
-**         Linker file for the GNU C Compiler
-**
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2021 NXP
-**     All rights reserved.
-**
-**     SPDX-License-Identifier: BSD-3-Clause
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800;
-RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0;
-
-/* Specify the memory areas */
-MEMORY
-{
-  m_interrupts          (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000200
-  m_text                (RX)  : ORIGIN = 0x00000200, LENGTH = 0x00071E00
-  m_core1_image         (RX)  : ORIGIN = 0x00072000, LENGTH = 0x0002B800
-  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00033000 - RPMSG_SHMEM_SIZE
-  rpmsg_sh_mem          (RW)  : ORIGIN = 0x20033000 - RPMSG_SHMEM_SIZE, LENGTH = RPMSG_SHMEM_SIZE
-  m_usb_sram            (RW)  : ORIGIN = 0x40100000, LENGTH = 0x00004000
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* section for storing the secondary core image */
-  .core1_code :
-  {
-     . = ALIGN(4) ;
-    KEEP (*(.core1_code))
-     *(.core1_code*)
-     . = ALIGN(4) ;
-  } > m_core1_image
-
-  /* NOINIT section for rpmsg_sh_mem */
-  .noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4)
-  {
-     __RPMSG_SH_MEM_START__ = .;
-     *(.noinit.$rpmsg_sh_mem*)
-     . = ALIGN(4) ;
-     __RPMSG_SH_MEM_END__ = .;
-  } > rpmsg_sh_mem
-
-  /* The startup code goes first into internal flash */
-  .interrupts :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector))     /* Startup code */
-    . = ALIGN(4);
-  } > m_interrupts
-
-  /* The program code and other data goes into internal flash */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)                 /* .text sections (code) */
-    *(.text*)                /* .text* sections (code) */
-    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
-    *(.glue_7)               /* glue arm to thumb code */
-    *(.glue_7t)              /* glue thumb to arm code */
-    *(.eh_frame)
-    KEEP (*(.init))
-    KEEP (*(.fini))
-    . = ALIGN(4);
-  } > m_text
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } > m_text
-
- .ctors :
-  {
-    __CTOR_LIST__ = .;
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       from the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __CTOR_END__ = .;
-  } > m_text
-
-  .dtors :
-  {
-    __DTOR_LIST__ = .;
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    __DTOR_END__ = .;
-  } > m_text
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text
-
-  __etext = .;    /* define a global symbol at end of code */
-  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
-
-  .data : AT(__DATA_ROM)
-  {
-    . = ALIGN(4);
-    __DATA_RAM = .;
-    __data_start__ = .;      /* create a global symbol at data start */
-    *(.ramfunc*)             /* for functions in ram */
-    *(.data)                 /* .data sections */
-    *(.data*)                /* .data* sections */
-    KEEP(*(.jcr*))
-    . = ALIGN(4);
-    __data_end__ = .;        /* define a global symbol at data end */
-  } > m_data
-
-  __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
-  text_end = ORIGIN(m_text) + LENGTH(m_text);
-  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
-
-  /* Uninitialized data section */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    . = ALIGN(4);
-    __START_BSS = .;
-    __bss_start__ = .;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-    . = ALIGN(4);
-    __bss_end__ = .;
-    __END_BSS = .;
-  } > m_data
-
-  .heap :
-  {
-    . = ALIGN(8);
-    __end__ = .;
-    PROVIDE(end = .);
-    __HeapBase = .;
-    . += HEAP_SIZE;
-    __HeapLimit = .;
-    __heap_limit = .; /* Add for _sbrk */
-  } > m_data
-
-  .stack :
-  {
-    . = ALIGN(8);
-    . += STACK_SIZE;
-  } > m_data
-
-  m_usb_bdt (NOLOAD) :
-  {
-    . = ALIGN(512);
-    *(m_usb_bdt)
-  } > m_usb_sram
-
-  m_usb_global (NOLOAD) :
-  {
-    *(m_usb_global)
-  } > m_usb_sram
-
-  /* Initializes stack on the end of block */
-  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
-  __StackLimit = __StackTop - STACK_SIZE;
-  PROVIDE(__stack = __StackTop);
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-
-  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
-}
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_all.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_all.bat
deleted file mode 100644
index f90389d0b..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_all.bat
+++ /dev/null
@@ -1,15 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-mingw32-make -j
-
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
-mingw32-make -j
-
-IF "%1" == "" ( pause )
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_release.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_release.bat
deleted file mode 100644
index a34003e0e..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_release.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
-mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_release.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_release.sh
deleted file mode 100755
index 012619cda..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/build_release.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
-make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/clean.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/clean.bat
deleted file mode 100644
index f391a79b5..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/clean.bat
+++ /dev/null
@@ -1,3 +0,0 @@
-RD /s /Q debug release CMakeFiles
-DEL /s /Q /F Makefile cmake_install.cmake CMakeCache.txt
-pause
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/clean.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/clean.sh
deleted file mode 100755
index 795ad8716..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/clean.sh
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/bin/sh
-rm -rf debug release CMakeFiles
-rm -rf Makefile cmake_install.cmake CMakeCache.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/config.cmake b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/config.cmake
deleted file mode 100755
index bcbaf4174..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/config.cmake
+++ /dev/null
@@ -1,4 +0,0 @@
-# config to select component, the format is CONFIG_USE_${component}
-set(CONFIG_USE_driver_power_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_component_serial_manager_uart_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_driver_flexcomm_usart_LPC55S69_cm33_core0 true)
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/flags.cmake b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/flags.cmake
deleted file mode 100755
index 6ad254f08..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc/flags.cmake
+++ /dev/null
@@ -1,186 +0,0 @@
-SET(CMAKE_ASM_FLAGS_DEBUG " \
-    ${CMAKE_ASM_FLAGS_DEBUG} \
-    -DDEBUG \
-    -D__STARTUP_CLEAR_BSS \
-    -g \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_ASM_FLAGS_RELEASE " \
-    ${CMAKE_ASM_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -D__STARTUP_CLEAR_BSS \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_C_FLAGS_DEBUG " \
-    ${CMAKE_C_FLAGS_DEBUG} \
-    -DDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DPRINTF_ADVANCED_ENABLE=1 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -g \
-    -O0 \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_C_FLAGS_RELEASE " \
-    ${CMAKE_C_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DPRINTF_ADVANCED_ENABLE=1 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -Os \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_CXX_FLAGS_DEBUG " \
-    ${CMAKE_CXX_FLAGS_DEBUG} \
-    -DDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -g \
-    -O0 \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -fno-rtti \
-    -fno-exceptions \
-")
-SET(CMAKE_CXX_FLAGS_RELEASE " \
-    ${CMAKE_CXX_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -Os \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -fno-rtti \
-    -fno-exceptions \
-")
-SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-    ${CMAKE_EXE_LINKER_FLAGS_DEBUG} \
-    -g \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    --specs=nano.specs \
-    --specs=nosys.specs \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mthumb \
-    -mapcs \
-    -Xlinker \
-    --gc-sections \
-    -Xlinker \
-    -static \
-    -Xlinker \
-    -z \
-    -Xlinker \
-    muldefs \
-    -Xlinker \
-    -Map=output.map \
-    -Wl,--print-memory-usage \
-    -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
-")
-SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-    ${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    --specs=nano.specs \
-    --specs=nosys.specs \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mthumb \
-    -mapcs \
-    -Xlinker \
-    --gc-sections \
-    -Xlinker \
-    -static \
-    -Xlinker \
-    -z \
-    -Xlinker \
-    muldefs \
-    -Xlinker \
-    -Map=output.map \
-    -Wl,--print-memory-usage \
-    -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
-")
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/board.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/board.c
deleted file mode 100644
index 2d8c30a43..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/board.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <stdint.h>
-#include "fsl_common.h"
-#include "fsl_debug_console.h"
-#include "board.h"
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-#include "fsl_i2c.h"
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/* Initialize debug console. */
-void BOARD_InitDebugConsole(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM0 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
-}
-
-void BOARD_InitDebugConsole_Core1(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM1 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ_CORE1;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1, BOARD_DEBUG_UART_TYPE_CORE1,
-                    uartClkSrcFreq);
-}
-
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz)
-{
-    i2c_master_config_t i2cConfig = {0};
-
-    I2C_MasterGetDefaultConfig(&i2cConfig);
-    I2C_MasterInit(base, &i2cConfig, clkSrc_Hz);
-}
-
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.direction      = kI2C_Write;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = txBuff;
-    masterXfer.dataSize       = txBuffSize;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = rxBuff;
-    masterXfer.dataSize       = rxBuffSize;
-    masterXfer.direction      = kI2C_Read;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-void BOARD_Accel_I2C_Init(void)
-{
-    BOARD_I2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
-{
-    uint8_t data = (uint8_t)txBuff;
-
-    return BOARD_I2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
-}
-
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_I2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
-}
-
-void BOARD_Codec_I2C_Init(void)
-{
-    BOARD_I2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
-{
-    return BOARD_I2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
-                          txBuffSize);
-}
-
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_I2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
-}
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/board.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/board.h
deleted file mode 100644
index adf1e7dfb..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/board.h
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include "clock_config.h"
-#include "fsl_common.h"
-#include "fsl_reset.h"
-#include "fsl_gpio.h"
-#include "fsl_iocon.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-/*! @brief The board name */
-#define BOARD_NAME "LPCXpresso55S69"
-
-/*! @brief The UART to use for debug messages. */
-/* TODO: rename UART to USART */
-#define BOARD_DEBUG_UART_TYPE       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR   (uint32_t) USART0
-#define BOARD_DEBUG_UART_INSTANCE   0U
-#define BOARD_DEBUG_UART_CLK_FREQ   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM0
-#define BOARD_DEBUG_UART_RST        kFC0_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC     kCLOCK_Flexcomm0
-#define BOARD_UART_IRQ_HANDLER      FLEXCOMM0_IRQHandler
-#define BOARD_UART_IRQ              FLEXCOMM0_IRQn
-
-#define BOARD_ACCEL_I2C_BASEADDR   I2C4
-#define BOARD_ACCEL_I2C_CLOCK_FREQ 12000000
-
-#define BOARD_DEBUG_UART_TYPE_CORE1       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR_CORE1   (uint32_t) USART1
-#define BOARD_DEBUG_UART_INSTANCE_CORE1   1U
-#define BOARD_DEBUG_UART_CLK_FREQ_CORE1   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM1
-#define BOARD_DEBUG_UART_RST_CORE1        kFC1_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC_CORE1     kCLOCK_Flexcomm1
-#define BOARD_UART_IRQ_HANDLER_CORE1      FLEXCOMM1_IRQHandler
-#define BOARD_UART_IRQ_CORE1              FLEXCOMM1_IRQn
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE
-#define BOARD_DEBUG_UART_BAUDRATE 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE */
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
-#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
-
-#define BOARD_CODEC_I2C_BASEADDR   I2C4
-#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
-#define BOARD_CODEC_I2C_INSTANCE   4
-#ifndef BOARD_LED_RED_GPIO
-#define BOARD_LED_RED_GPIO GPIO
-#endif
-#define BOARD_LED_RED_GPIO_PORT 1U
-#ifndef BOARD_LED_RED_GPIO_PIN
-#define BOARD_LED_RED_GPIO_PIN 6U
-#endif
-
-#ifndef BOARD_LED_BLUE_GPIO
-#define BOARD_LED_BLUE_GPIO GPIO
-#endif
-#define BOARD_LED_BLUE_GPIO_PORT 1U
-#ifndef BOARD_LED_BLUE_GPIO_PIN
-#define BOARD_LED_BLUE_GPIO_PIN 4U
-#endif
-
-#ifndef BOARD_LED_GREEN_GPIO
-#define BOARD_LED_GREEN_GPIO GPIO
-#endif
-#define BOARD_LED_GREEN_GPIO_PORT 1U
-#ifndef BOARD_LED_GREEN_GPIO_PIN
-#define BOARD_LED_GREEN_GPIO_PIN 7U
-#endif
-
-#ifndef BOARD_SW1_GPIO
-#define BOARD_SW1_GPIO GPIO
-#endif
-#define BOARD_SW1_GPIO_PORT 0U
-#ifndef BOARD_SW1_GPIO_PIN
-#define BOARD_SW1_GPIO_PIN 5U
-#endif
-#define BOARD_SW1_NAME        "SW1"
-#define BOARD_SW1_IRQ         PIN_INT0_IRQn
-#define BOARD_SW1_IRQ_HANDLER PIN_INT0_IRQHandler
-
-#ifndef BOARD_SW2_GPIO
-#define BOARD_SW2_GPIO GPIO
-#endif
-#define BOARD_SW2_GPIO_PORT 1U
-#ifndef BOARD_SW2_GPIO_PIN
-#define BOARD_SW2_GPIO_PIN 18U
-#endif
-#define BOARD_SW2_NAME              "SW2"
-#define BOARD_SW2_IRQ               PIN_INT1_IRQn
-#define BOARD_SW2_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW2_GPIO_PININT_INDEX 1
-
-#ifndef BOARD_SW3_GPIO
-#define BOARD_SW3_GPIO GPIO
-#endif
-#define BOARD_SW3_GPIO_PORT 1U
-#ifndef BOARD_SW3_GPIO_PIN
-#define BOARD_SW3_GPIO_PIN 9U
-#endif
-#define BOARD_SW3_NAME              "SW3"
-#define BOARD_SW3_IRQ               PIN_INT1_IRQn
-#define BOARD_SW3_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW3_GPIO_PININT_INDEX 1
-
-/* USB PHY condfiguration */
-#define BOARD_USB_PHY_D_CAL     (0x05U)
-#define BOARD_USB_PHY_TXCAL45DP (0x0AU)
-#define BOARD_USB_PHY_TXCAL45DM (0x0AU)
-
-/* Board led color mapping */
-#define LOGIC_LED_ON  0U
-#define LOGIC_LED_OFF 1U
-
-#define LED_RED_INIT(output)                                                                          \
-    {                                                                                                 \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, IOCON_DIGITAL_EN);    \
-        GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN,             \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */ \
-    }
-#define LED_RED_ON()                                            \
-    GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                   1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_RED_OFF()                                                                        \
-    GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT,                                \
-                 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED1 \ \ \ \ \ \ \ \ \ \ \
-                                                */
-#define LED_RED_TOGGLE()                                         \
-    GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                    1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_BLUE_INIT(output)                                                                         \
-    {                                                                                                 \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, IOCON_DIGITAL_EN);  \
-        GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN,          \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */ \
-    }
-#define LED_BLUE_ON()                                             \
-    GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                   1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_BLUE_OFF()                                          \
-    GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_BLUE_TOGGLE()                                          \
-    GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                    1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_GREEN_INIT(output)                                                              \
-    GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
-                 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED1 */
-#define LED_GREEN_ON()                                              \
-    GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                   1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_GREEN_OFF()                                           \
-    GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_GREEN_TOGGLE()                                           \
-    GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                    1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED1 */
-
-/* Display. */
-#define BOARD_LCD_DC_GPIO      GPIO
-#define BOARD_LCD_DC_GPIO_PORT 1U
-#define BOARD_LCD_DC_GPIO_PIN  5U
-
-/* Serial MWM WIFI */
-#define BOARD_SERIAL_MWM_PORT_CLK_FREQ CLOCK_GetFlexCommClkFreq(2)
-#define BOARD_SERIAL_MWM_PORT          USART2
-#define BOARD_SERIAL_MWM_PORT_IRQn     FLEXCOMM2_IRQn
-#define BOARD_SERIAL_MWM_RST_WRITE(output)
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus */
-
-/*******************************************************************************
- * API
- ******************************************************************************/
-
-void BOARD_InitDebugConsole(void);
-void BOARD_InitDebugConsole_Core1(void);
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz);
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize);
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize);
-void BOARD_Accel_I2C_Init(void);
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-void BOARD_Codec_I2C_Init(void);
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus */
-
-#endif /* _BOARD_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/clock_config.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/clock_config.c
deleted file mode 100644
index 190f4a898..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/clock_config.c
+++ /dev/null
@@ -1,374 +0,0 @@
-/*
- * Copyright 2017-2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to set up clock using clock driver functions:
- *
- * 1. Setup clock sources.
- *
- * 2. Set up wait states of the flash.
- *
- * 3. Set up all dividers.
- *
- * 4. Set up all selectors to provide selected clocks.
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v7.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 9.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_power.h"
-#include "fsl_clock.h"
-#include "clock_config.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockPLL150M();
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO12M
-outputs:
-- {id: System_clock.outFreq, value: 12 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO12M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(12000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(12000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFROHF96M
-outputs:
-- {id: System_clock.outFreq, value: 96 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-void BOARD_BootClockFROHF96M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(96000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(96000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL100M
-outputs:
-- {id: System_clock.outFreq, value: 100 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL100M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
-        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 100000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL150M
-called_from_default_init: true
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(150000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
-        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 150000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL1_150M
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL1_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
-- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL1M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL1N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL1_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL1_150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(150000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL1 */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
-    const pll_setup_t pll1Setup = {
-        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(53U) | SYSCON_PLL1CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL1NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
-        .pllmdec = SYSCON_PLL1MDEC_MDIV(150U),
-        .pllRate = 150000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK;
-#endif
-}
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/clock_config.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/clock_config.h
deleted file mode 100644
index 2d82e9a01..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/clock_config.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * Copyright 2017-2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
-#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO12M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFROHF96M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL100M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         150000000U  /*!< Core clock frequency: 150000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK       150000000U  /*!< Core clock frequency: 150000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL1_150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/fxas21002_poll.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/fxas21002_poll.c
deleted file mode 100644
index b5347e706..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/fxas21002_poll.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
- * Copyright 2016-2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/**
- * @file fxas21002_poll.c
- * @brief The fxas21002_poll.c file implements the ISSDK FXAS21002 sensor driver
- *        example demonstration with polling mode.
- */
-
-/*  SDK Includes */
-#include "pin_mux.h"
-#include "clock_config.h"
-#include "board.h"
-#include "fsl_debug_console.h"
-
-/* CMSIS Includes */
-#include "Driver_I2C.h"
-
-/* ISSDK Includes */
-#include "issdk_hal.h"
-#include "fxas21002_drv.h"
-
-/*******************************************************************************
- * Constants
- ******************************************************************************/
-/*! Prepare the register write list to configure FXAS21002 in non-FIFO mode. */
-const registerwritelist_t fxas21002_Config_Normal[] = {
-    /*! Configure CTRL_REG1 register to put FXAS21002 to 12.5Hz sampling rate. */
-    {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
-    __END_WRITE_DATA__};
-
-/*! Prepare the register read list to read FXAS21002 DataReady status. */
-const registerreadlist_t fxas21002_DRDY[] = {{.readFrom = FXAS21002_STATUS, .numBytes = 1}, __END_READ_DATA__};
-
-/*! Prepare the register read list to read the raw gyro data from the FXAS21002. */
-const registerreadlist_t fxas21002_Output_Values[] = {
-    {.readFrom = FXAS21002_OUT_X_MSB, .numBytes = FXAS21002_GYRO_DATA_SIZE}, __END_READ_DATA__};
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/*!
- * @brief Main function
- */
-int main(void)
-{
-    int32_t status;
-    uint8_t dataReady;
-    uint8_t data[FXAS21002_GYRO_DATA_SIZE];
-    fxas21002_gyrodata_t rawData;
-
-    ARM_DRIVER_I2C *I2Cdrv = &I2C_S_DRIVER; // Now using the shield.h value!!!
-    fxas21002_i2c_sensorhandle_t FXAS21002drv;
-
-    /*! Initialize the MCU hardware. */
-    BOARD_InitPins();
-    BOARD_BootClockRUN();
-    BOARD_InitDebugConsole();
-
-    PRINTF("\r\n ISSDK FXAS21002 sensor driver example demonstration with poll mode\r\n");
-
-    /*! Initialize the I2C driver. */
-    status = I2Cdrv->Initialize(I2C_S_SIGNAL_EVENT);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Initialization Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C Power mode. */
-    status = I2Cdrv->PowerControl(ARM_POWER_FULL);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Power Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C bus speed. */
-    status = I2Cdrv->Control(ARM_I2C_BUS_SPEED, ARM_I2C_BUS_SPEED_FAST);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Control Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Initialize the FXAS21002 sensor driver. */
-    status = FXAS21002_I2C_Initialize(&FXAS21002drv, &I2C_S_DRIVER, I2C_S_DEVICE_INDEX, FXAS21002_I2C_ADDR,
-                                      FXAS21002_WHO_AM_I_WHOAMI_PROD_VALUE);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n Sensor Initialization Failed\r\n");
-        return -1;
-    }
-    PRINTF("\r\n Successfully Initiliazed Sensor\r\n");
-
-    /*!  Set the task to be executed while waiting for I2C transactions to complete. */
-    //FXAS21002_I2C_SetIdleTask(&FXAS21002drv, (registeridlefunction_t)SMC_SetPowerModeVlpr, SMC);
-
-    /*! Configure the FXAS21002 sensor driver. */
-    status = FXAS21002_I2C_Configure(&FXAS21002drv, fxas21002_Config_Normal);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n FXAS21002 Sensor Configuration Failed, Err = %d\r\n", status);
-        return -1;
-    }
-    PRINTF("\r\n Successfully Applied FXAS21002 Sensor Configuration\r\n");
-
-    for (;;) /* Forever loop */
-    {
-        /*! Wait for data ready from the FXAS21002. */
-        status = FXAS21002_I2C_ReadData(&FXAS21002drv, fxas21002_DRDY, &dataReady);
-        if (0 == (dataReady & FXAS21002_DR_STATUS_ZYXDR_MASK))
-        {
-            continue;
-        }
-
-        /*! Read the raw sensor data from the FXAS21002. */
-        status = FXAS21002_I2C_ReadData(&FXAS21002drv, fxas21002_Output_Values, data);
-        if (ARM_DRIVER_OK != status)
-        {
-            PRINTF("\r\n Read Failed. \r\n");
-            return -1;
-        }
-
-        /*! Convert the raw sensor data to signed 16-bit container for display to the debug port. */
-        rawData.gyro[0] = ((int16_t)data[0] << 8) | data[1];
-        rawData.gyro[1] = ((int16_t)data[2] << 8) | data[3];
-        rawData.gyro[2] = ((int16_t)data[4] << 8) | data[5];
-
-        /* NOTE: PRINTF is relatively expensive in terms of CPU time, specially when used with-in execution loop. */
-        PRINTF("\r\n Gyro X = %d  Y = %d  Z = %d\r\n", rawData.gyro[0], rawData.gyro[1], rawData.gyro[2]);
-        ASK_USER_TO_RESUME(100); /* Ask for user input after processing 100 samples. */
-    }
-}
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/fxas21002_poll_niobe4_v3_9.xml b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/fxas21002_poll_niobe4_v3_9.xml
deleted file mode 100644
index 5facdf2a2..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/fxas21002_poll_niobe4_v3_9.xml
+++ /dev/null
@@ -1,159 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<ksdk:examples xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd manifest.xsd">
-  <externalDefinitions>
-    <definition extID="cm33_core0_LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.gpio_lpc.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_dma.LPC55S69"/>
-    <definition extID="platform.drivers.gint.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_cmsis.LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.systick_utils.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.interface.common.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.fxas21002.LPC55S69"/>
-    <definition extID="platform.drivers.common.LPC55S69"/>
-    <definition extID="platform.drivers.clock.LPC55S69"/>
-    <definition extID="platform.drivers.power.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_iocon.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux_connections.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_CMSIS.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_startup.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_gpio.LPC55S69"/>
-    <definition extID="platform.utilities.assert.LPC55S69"/>
-    <definition extID="utility.debug_console.LPC55S69"/>
-    <definition extID="component.usart_adapter.LPC55S69"/>
-    <definition extID="component.serial_manager.LPC55S69"/>
-    <definition extID="component.lists.LPC55S69"/>
-    <definition extID="component.serial_manager_uart.LPC55S69"/>
-    <definition extID="platform.drivers.reset.LPC55S69"/>
-    <definition extID="CMSIS_Include_core_cm.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.I2C.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.Common.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.SPI.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.USART.LPC55S69"/>
-    <definition extID="platform.utilities.misc_utilities.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_system.LPC55S69"/>
-    <definition extID="iar"/>
-    <definition extID="mdk"/>
-    <definition extID="armgcc"/>
-    <definition extID="mcuxpresso"/>
-    <definition extID="com.nxp.mcuxpresso"/>
-  </externalDefinitions>
-  <example id="lpcxpresso55s69_agm01_fxas21002_poll_niobe4" name="fxas21002_poll_niobe4" device_core="cm33_core0_LPC55S69" dependency="middleware.issdk.drivers.gpio_lpc.LPC55S69 platform.drivers.lpc_dma.LPC55S69 platform.drivers.gint.LPC55S69 platform.drivers.flexcomm.LPC55S69 platform.drivers.flexcomm_i2c.LPC55S69 platform.drivers.flexcomm_i2c_dma.LPC55S69 platform.drivers.flexcomm_i2c_cmsis.LPC55S69 platform.drivers.flexcomm_spi.LPC55S69 platform.drivers.flexcomm_spi_dma.LPC55S69 platform.drivers.flexcomm_spi_cmsis.LPC55S69 platform.drivers.flexcomm_usart.LPC55S69 platform.drivers.flexcomm_usart_dma.LPC55S69 platform.drivers.flexcomm_usart_cmsis.LPC55S69 middleware.issdk.drivers.systick_utils.LPC55S69 middleware.issdk.sensor.interface.common.LPC55S69 middleware.issdk.sensor.fxas21002.LPC55S69 platform.drivers.common.LPC55S69 platform.drivers.clock.LPC55S69 platform.drivers.power.LPC55S69 platform.drivers.lpc_iocon.LPC55S69 platform.drivers.inputmux.LPC55S69 platform.drivers.inputmux_connections.LPC55S69 platform.devices.LPC55S69_CMSIS.LPC55S69 platform.devices.LPC55S69_startup.LPC55S69 platform.drivers.lpc_gpio.LPC55S69 platform.utilities.assert.LPC55S69 utility.debug_console.LPC55S69 component.usart_adapter.LPC55S69 component.serial_manager.LPC55S69 component.lists.LPC55S69 component.serial_manager_uart.LPC55S69 platform.drivers.reset.LPC55S69 CMSIS_Include_core_cm.LPC55S69 CMSIS_Driver_Include.I2C.LPC55S69 CMSIS_Driver_Include.Common.LPC55S69 CMSIS_Driver_Include.SPI.LPC55S69 CMSIS_Driver_Include.USART.LPC55S69 platform.utilities.misc_utilities.LPC55S69 platform.devices.LPC55S69_system.LPC55S69" category="issdk/sensors">
-    <projects>
-      <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
-    </projects>
-    <toolchainSettings>
-      <toolchainSetting id_refs="com.nxp.mcuxpresso">
-        <option id="gnu.c.compiler.option.preprocessor.def.symbols" type="stringList">
-          <value>CPU_LPC55S69JBD100_cm33_core0</value>
-          <value>PRINTF_ADVANCED_ENABLE=1</value>
-          <value>SERIAL_PORT_TYPE_UART=1</value>
-          <value>MCUXPRESSO_SDK</value>
-        </option>
-        <option id="com.crt.advproject.gas.fpu" type="enum">
-          <value>com.crt.advproject.gas.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="com.crt.advproject.gcc.fpu" type="enum">
-          <value>com.crt.advproject.gcc.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.compiler.option.optimization.flags" type="string">
-          <value>-fno-common</value>
-        </option>
-        <option id="com.crt.advproject.c.misc.dialect" type="enum">
-          <value>com.crt.advproject.misc.dialect.gnu99</value>
-        </option>
-        <option id="gnu.c.compiler.option.misc.other" type="string">
-          <value>-mcpu=cortex-m33 -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin</value>
-        </option>
-        <option id="gnu.c.compiler.option.warnings.allwarn" type="boolean">
-          <value>false</value>
-        </option>
-        <option id="com.crt.advproject.link.fpu" type="enum">
-          <value>com.crt.advproject.link.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.link.option.nostdlibs" type="boolean">
-          <value>true</value>
-        </option>
-      </toolchainSetting>
-    </toolchainSettings>
-    <include_paths>
-      <include_path path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include"/>
-      <include_path path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="board" type="c_include"/>
-    </include_paths>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/iar" project_relative_path="./" type="workspace" toolchain="iar">
-      <files mask="fxas21002_poll_niobe4.ewd"/>
-      <files mask="fxas21002_poll_niobe4.ewp"/>
-      <files mask="fxas21002_poll_niobe4.eww"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/mdk" project_relative_path="./" type="workspace" toolchain="mdk">
-      <files mask="fxas21002_poll_niobe4.uvprojx"/>
-      <files mask="fxas21002_poll_niobe4.uvoptx"/>
-      <files mask="JLinkSettings.JLinkScript"/>
-      <files mask="JLinkSettings.ini"/>
-      <files mask="fxas21002_poll_niobe4.uvmpw"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc" project_relative_path="./" type="workspace" toolchain="armgcc">
-      <files mask="build_all.bat"/>
-      <files mask="build_all.sh"/>
-      <files mask="clean.bat"/>
-      <files mask="clean.sh"/>
-      <files mask="CMakeLists.txt"/>
-      <files mask="flags.cmake"/>
-      <files mask="config.cmake"/>
-      <files mask="build_debug.bat"/>
-      <files mask="build_debug.sh"/>
-      <files mask="build_release.bat"/>
-      <files mask="build_release.sh"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="src">
-      <files mask="lpc55s69.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include">
-      <files mask="lpc55s69.h"/>
-      <files mask="frdm_stbc_agm01_shield.h"/>
-      <files mask="issdk_hal.h"/>
-      <files mask="RTE_Device.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="source" type="src">
-      <files mask="fxas21002_poll.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="board" type="src">
-      <files mask="pin_mux.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="board" type="c_include">
-      <files mask="pin_mux.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="doc" type="doc">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="board" type="src">
-      <files mask="board.c"/>
-      <files mask="clock_config.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="board" type="c_include">
-      <files mask="board.h"/>
-      <files mask="clock_config.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll" project_relative_path="doc" type="doc" toolchain="iar mdk mcuxpresso">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/iar" project_relative_path="LPC55S69/iar" type="linker" toolchain="iar">
-      <files mask="LPC55S69_cm33_core0_flash.icf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/mdk" project_relative_path="LPC55S69/arm" type="linker" toolchain="mdk">
-      <files mask="LPC55S69_cm33_core0_flash.scf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/armgcc" project_relative_path="LPC55S69/gcc" type="linker" toolchain="armgcc">
-      <files mask="LPC55S69_cm33_core0_flash.ld"/>
-    </source>
-  </example>
-</ksdk:examples>
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/pin_mux.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/pin_mux.c
deleted file mode 100644
index e68e17d70..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/pin_mux.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v6.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 0.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_iocon.h"
-#include "pin_mux.h"
-#include "fsl_power.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitPins(void)
-{
-    /* set BOD VBAT level to 1.65V */
-    POWER_SetBodVbatLevel(kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false);
-
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: enabled}
-  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: enabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '30', peripheral: GPIO, signal: 'PIO1, 21', pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as PIO1_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN21 (coords: 30) is configured as PIO1_21 */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '92', peripheral: GPIO, signal: 'PIO0, 29', pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '94', peripheral: GPIO, signal: 'PIO0, 30', pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as PIO0_29 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as PIO0_29 */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as PIO0_30 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as PIO0_30 */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: FLEXCOMM7, signal: RTS_SCL_SSEL1, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC7_RTS_SCL_SSEL1 */
-                                         IOCON_PIO_FUNC1 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as FC7_RTS_SCL_SSEL1 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: GPIO, signal: 'PIO0, 20', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as PIO0_19 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as PIO0_19 */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as PIO0_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as PIO0_20 */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as PIO0_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as PIO0_21 */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/pin_mux.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/pin_mux.h
deleted file mode 100644
index 8c1307b13..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/pin_mux.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u   /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC5 0x05u          /*!<@brief Selects pin function 5 */
-#define IOCON_PIO_INV_DI 0x00u         /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u    /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_EN 0x0200u /*!<@brief Open drain is enabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u  /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/readme.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/readme.txt
deleted file mode 100644
index 2819da315..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxas21002/fxas21002_poll/readme.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-Hardware requirements
-===================
-- Mini/micro USB cable
-- LPCXpresso54S69 board
-- FRDM-STBC-AGM01 board
-- Personal Computer
-
-Board settings
-==============
-On FRDM-STBC-AGM01 sensor shield board:
---------------------------------------
-For I2C Mode: The examples use I2C1 and Pins 2-3 of Jumpers J6 and J7 on FRDM-STBC-AGM01 should be connected.
-For SPI Mode: The examples use SPI0 and the FRDM-STBC-AGM01 needs to be rewired for SPI which requires removal of Resistor R3.
-
-Demo Overview
-============
-The FXAS21002 Normal example application demonstrates the use of the FXAS21002 sensor in the Poll (Non-Buffered) Mode.
-The example demonstrates configuration of all registers reguired to put the sensor into Standard Mode and read out a sample.
-
-The sensor reads samples as per the configured ODR and sets a Flag.
-The application consistently checks the Flag and when set reads out the sample.s.
-
-Prepare the Demo
-===============
-1.  Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
-2.  Open a serial terminal with the following settings:
-    - 115200 baud rate
-    - 8 data bits
-    - No parity
-    - One stop bit
-    - No flow control
-3.  Download the program to the target board.
-4.  Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
-
-Running the demo
-===============
-When the demo runs successfully, you can see the Samples printed to the terminal.
-
-Note: you must rotate the board to get the samples to change.
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/CMakeLists.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/CMakeLists.txt
deleted file mode 100644
index 6a79e6692..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/CMakeLists.txt
+++ /dev/null
@@ -1,160 +0,0 @@
-# CROSS COMPILER SETTING
-SET(CMAKE_SYSTEM_NAME Generic)
-CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
-
-# THE VERSION NUMBER
-SET (Tutorial_VERSION_MAJOR 1)
-SET (Tutorial_VERSION_MINOR 0)
-
-# ENABLE ASM
-ENABLE_LANGUAGE(ASM)
-
-SET(CMAKE_STATIC_LIBRARY_PREFIX)
-SET(CMAKE_STATIC_LIBRARY_SUFFIX)
-
-SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
-SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
-
-# CURRENT DIRECTORY
-SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
-
-SET(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-SET(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-
-
-project(fxos8700_fifo_niobe4)
-
-set(MCUX_SDK_PROJECT_NAME fxos8700_fifo_niobe4.elf)
-
-include(${ProjDirPath}/flags.cmake)
-
-include(${ProjDirPath}/config.cmake)
-
-add_executable(${MCUX_SDK_PROJECT_NAME} 
-"${ProjDirPath}/../../../../../lpc55s69.c"
-"${ProjDirPath}/../../../../../lpc55s69.h"
-"${ProjDirPath}/../../../../../frdm_stbc_agm01_shield.h"
-"${ProjDirPath}/../../../../../issdk_hal.h"
-"${ProjDirPath}/../../../../../RTE_Device.h"
-"${ProjDirPath}/../fxos8700_fifo.c"
-"${ProjDirPath}/../pin_mux.c"
-"${ProjDirPath}/../pin_mux.h"
-"${ProjDirPath}/../board.c"
-"${ProjDirPath}/../board.h"
-"${ProjDirPath}/../clock_config.c"
-"${ProjDirPath}/../clock_config.h"
-)
-
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
-    ${ProjDirPath}/../../../../..
-    ${ProjDirPath}/..
-)
-
-set(CMAKE_MODULE_PATH
-    ${ProjDirPath}/../../../../../../../middleware/issdk
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/cmsis_drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/utilities
-    ${ProjDirPath}/../../../../../../../components/uart
-    ${ProjDirPath}/../../../../../../../components/serial_manager
-    ${ProjDirPath}/../../../../../../../components/lists
-    ${ProjDirPath}/../../../../../../../CMSIS/Core/Include
-    ${ProjDirPath}/../../../../../../../CMSIS/Driver/Include
-)
-
-# include modules
-include(middleware_issdk_drivers_gpio_lpc_LPC55S69_cm33_core0)
-
-include(driver_lpc_dma_LPC55S69_cm33_core0)
-
-include(driver_gint_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(middleware_issdk_drivers_systick_utils_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_interface_common_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_fxos8700_LPC55S69_cm33_core0)
-
-include(driver_common_LPC55S69_cm33_core0)
-
-include(driver_clock_LPC55S69_cm33_core0)
-
-include(driver_power_LPC55S69_cm33_core0)
-
-include(driver_lpc_iocon_LPC55S69_cm33_core0)
-
-include(driver_inputmux_LPC55S69_cm33_core0)
-
-include(driver_inputmux_connections_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_CMSIS_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_startup_LPC55S69_cm33_core0)
-
-include(driver_lpc_gpio_LPC55S69_cm33_core0)
-
-include(utility_assert_LPC55S69_cm33_core0)
-
-include(utility_debug_console_LPC55S69_cm33_core0)
-
-include(component_usart_adapter_LPC55S69_cm33_core0)
-
-include(component_serial_manager_LPC55S69_cm33_core0)
-
-include(component_lists_LPC55S69_cm33_core0)
-
-include(component_serial_manager_uart_LPC55S69_cm33_core0)
-
-include(driver_reset_LPC55S69_cm33_core0)
-
-include(CMSIS_Include_core_cm_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_I2C_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_Common_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_SPI_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_USART_LPC55S69_cm33_core0)
-
-include(utilities_misc_utilities_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_system_LPC55S69_cm33_core0)
-
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--start-group)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE m)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE c)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE gcc)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE nosys)
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
-
-ADD_CUSTOM_COMMAND(TARGET ${MCUX_SDK_PROJECT_NAME} POST_BUILD COMMAND ${CMAKE_OBJCOPY}
--Obinary ${EXECUTABLE_OUTPUT_PATH}/${MCUX_SDK_PROJECT_NAME} ${EXECUTABLE_OUTPUT_PATH}/LPC55S69-AGM01-FXOS8700-FIFO-CORE0.bin)
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_all.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_all.bat
deleted file mode 100644
index f90389d0b..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_all.bat
+++ /dev/null
@@ -1,15 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-mingw32-make -j
-
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
-mingw32-make -j
-
-IF "%1" == "" ( pause )
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_all.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_all.sh
deleted file mode 100755
index 5702db0cf..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_all.sh
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-make -j
-
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
-make -j
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_debug.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_debug.bat
deleted file mode 100644
index 0636e21b5..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_debug.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_debug.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_debug.sh
deleted file mode 100755
index 30c0ab2d5..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_debug.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_release.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_release.bat
deleted file mode 100644
index a34003e0e..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_release.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
-mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_release.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_release.sh
deleted file mode 100755
index 012619cda..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/build_release.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
-make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/clean.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/clean.bat
deleted file mode 100644
index f391a79b5..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/clean.bat
+++ /dev/null
@@ -1,3 +0,0 @@
-RD /s /Q debug release CMakeFiles
-DEL /s /Q /F Makefile cmake_install.cmake CMakeCache.txt
-pause
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/clean.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/clean.sh
deleted file mode 100755
index 795ad8716..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/clean.sh
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/bin/sh
-rm -rf debug release CMakeFiles
-rm -rf Makefile cmake_install.cmake CMakeCache.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/config.cmake b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/config.cmake
deleted file mode 100755
index bcbaf4174..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/config.cmake
+++ /dev/null
@@ -1,4 +0,0 @@
-# config to select component, the format is CONFIG_USE_${component}
-set(CONFIG_USE_driver_power_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_component_serial_manager_uart_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_driver_flexcomm_usart_LPC55S69_cm33_core0 true)
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/flags.cmake b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/flags.cmake
deleted file mode 100755
index 6ad254f08..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc/flags.cmake
+++ /dev/null
@@ -1,186 +0,0 @@
-SET(CMAKE_ASM_FLAGS_DEBUG " \
-    ${CMAKE_ASM_FLAGS_DEBUG} \
-    -DDEBUG \
-    -D__STARTUP_CLEAR_BSS \
-    -g \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_ASM_FLAGS_RELEASE " \
-    ${CMAKE_ASM_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -D__STARTUP_CLEAR_BSS \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_C_FLAGS_DEBUG " \
-    ${CMAKE_C_FLAGS_DEBUG} \
-    -DDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DPRINTF_ADVANCED_ENABLE=1 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -g \
-    -O0 \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_C_FLAGS_RELEASE " \
-    ${CMAKE_C_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DPRINTF_ADVANCED_ENABLE=1 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -Os \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_CXX_FLAGS_DEBUG " \
-    ${CMAKE_CXX_FLAGS_DEBUG} \
-    -DDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -g \
-    -O0 \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -fno-rtti \
-    -fno-exceptions \
-")
-SET(CMAKE_CXX_FLAGS_RELEASE " \
-    ${CMAKE_CXX_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -Os \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -fno-rtti \
-    -fno-exceptions \
-")
-SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-    ${CMAKE_EXE_LINKER_FLAGS_DEBUG} \
-    -g \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    --specs=nano.specs \
-    --specs=nosys.specs \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mthumb \
-    -mapcs \
-    -Xlinker \
-    --gc-sections \
-    -Xlinker \
-    -static \
-    -Xlinker \
-    -z \
-    -Xlinker \
-    muldefs \
-    -Xlinker \
-    -Map=output.map \
-    -Wl,--print-memory-usage \
-    -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
-")
-SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-    ${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    --specs=nano.specs \
-    --specs=nosys.specs \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mthumb \
-    -mapcs \
-    -Xlinker \
-    --gc-sections \
-    -Xlinker \
-    -static \
-    -Xlinker \
-    -z \
-    -Xlinker \
-    muldefs \
-    -Xlinker \
-    -Map=output.map \
-    -Wl,--print-memory-usage \
-    -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
-")
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/board.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/board.c
deleted file mode 100644
index 2d8c30a43..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/board.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <stdint.h>
-#include "fsl_common.h"
-#include "fsl_debug_console.h"
-#include "board.h"
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-#include "fsl_i2c.h"
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/* Initialize debug console. */
-void BOARD_InitDebugConsole(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM0 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
-}
-
-void BOARD_InitDebugConsole_Core1(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM1 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ_CORE1;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1, BOARD_DEBUG_UART_TYPE_CORE1,
-                    uartClkSrcFreq);
-}
-
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz)
-{
-    i2c_master_config_t i2cConfig = {0};
-
-    I2C_MasterGetDefaultConfig(&i2cConfig);
-    I2C_MasterInit(base, &i2cConfig, clkSrc_Hz);
-}
-
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.direction      = kI2C_Write;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = txBuff;
-    masterXfer.dataSize       = txBuffSize;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = rxBuff;
-    masterXfer.dataSize       = rxBuffSize;
-    masterXfer.direction      = kI2C_Read;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-void BOARD_Accel_I2C_Init(void)
-{
-    BOARD_I2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
-{
-    uint8_t data = (uint8_t)txBuff;
-
-    return BOARD_I2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
-}
-
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_I2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
-}
-
-void BOARD_Codec_I2C_Init(void)
-{
-    BOARD_I2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
-{
-    return BOARD_I2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
-                          txBuffSize);
-}
-
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_I2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
-}
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/board.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/board.h
deleted file mode 100644
index adf1e7dfb..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/board.h
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include "clock_config.h"
-#include "fsl_common.h"
-#include "fsl_reset.h"
-#include "fsl_gpio.h"
-#include "fsl_iocon.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-/*! @brief The board name */
-#define BOARD_NAME "LPCXpresso55S69"
-
-/*! @brief The UART to use for debug messages. */
-/* TODO: rename UART to USART */
-#define BOARD_DEBUG_UART_TYPE       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR   (uint32_t) USART0
-#define BOARD_DEBUG_UART_INSTANCE   0U
-#define BOARD_DEBUG_UART_CLK_FREQ   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM0
-#define BOARD_DEBUG_UART_RST        kFC0_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC     kCLOCK_Flexcomm0
-#define BOARD_UART_IRQ_HANDLER      FLEXCOMM0_IRQHandler
-#define BOARD_UART_IRQ              FLEXCOMM0_IRQn
-
-#define BOARD_ACCEL_I2C_BASEADDR   I2C4
-#define BOARD_ACCEL_I2C_CLOCK_FREQ 12000000
-
-#define BOARD_DEBUG_UART_TYPE_CORE1       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR_CORE1   (uint32_t) USART1
-#define BOARD_DEBUG_UART_INSTANCE_CORE1   1U
-#define BOARD_DEBUG_UART_CLK_FREQ_CORE1   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM1
-#define BOARD_DEBUG_UART_RST_CORE1        kFC1_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC_CORE1     kCLOCK_Flexcomm1
-#define BOARD_UART_IRQ_HANDLER_CORE1      FLEXCOMM1_IRQHandler
-#define BOARD_UART_IRQ_CORE1              FLEXCOMM1_IRQn
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE
-#define BOARD_DEBUG_UART_BAUDRATE 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE */
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
-#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
-
-#define BOARD_CODEC_I2C_BASEADDR   I2C4
-#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
-#define BOARD_CODEC_I2C_INSTANCE   4
-#ifndef BOARD_LED_RED_GPIO
-#define BOARD_LED_RED_GPIO GPIO
-#endif
-#define BOARD_LED_RED_GPIO_PORT 1U
-#ifndef BOARD_LED_RED_GPIO_PIN
-#define BOARD_LED_RED_GPIO_PIN 6U
-#endif
-
-#ifndef BOARD_LED_BLUE_GPIO
-#define BOARD_LED_BLUE_GPIO GPIO
-#endif
-#define BOARD_LED_BLUE_GPIO_PORT 1U
-#ifndef BOARD_LED_BLUE_GPIO_PIN
-#define BOARD_LED_BLUE_GPIO_PIN 4U
-#endif
-
-#ifndef BOARD_LED_GREEN_GPIO
-#define BOARD_LED_GREEN_GPIO GPIO
-#endif
-#define BOARD_LED_GREEN_GPIO_PORT 1U
-#ifndef BOARD_LED_GREEN_GPIO_PIN
-#define BOARD_LED_GREEN_GPIO_PIN 7U
-#endif
-
-#ifndef BOARD_SW1_GPIO
-#define BOARD_SW1_GPIO GPIO
-#endif
-#define BOARD_SW1_GPIO_PORT 0U
-#ifndef BOARD_SW1_GPIO_PIN
-#define BOARD_SW1_GPIO_PIN 5U
-#endif
-#define BOARD_SW1_NAME        "SW1"
-#define BOARD_SW1_IRQ         PIN_INT0_IRQn
-#define BOARD_SW1_IRQ_HANDLER PIN_INT0_IRQHandler
-
-#ifndef BOARD_SW2_GPIO
-#define BOARD_SW2_GPIO GPIO
-#endif
-#define BOARD_SW2_GPIO_PORT 1U
-#ifndef BOARD_SW2_GPIO_PIN
-#define BOARD_SW2_GPIO_PIN 18U
-#endif
-#define BOARD_SW2_NAME              "SW2"
-#define BOARD_SW2_IRQ               PIN_INT1_IRQn
-#define BOARD_SW2_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW2_GPIO_PININT_INDEX 1
-
-#ifndef BOARD_SW3_GPIO
-#define BOARD_SW3_GPIO GPIO
-#endif
-#define BOARD_SW3_GPIO_PORT 1U
-#ifndef BOARD_SW3_GPIO_PIN
-#define BOARD_SW3_GPIO_PIN 9U
-#endif
-#define BOARD_SW3_NAME              "SW3"
-#define BOARD_SW3_IRQ               PIN_INT1_IRQn
-#define BOARD_SW3_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW3_GPIO_PININT_INDEX 1
-
-/* USB PHY condfiguration */
-#define BOARD_USB_PHY_D_CAL     (0x05U)
-#define BOARD_USB_PHY_TXCAL45DP (0x0AU)
-#define BOARD_USB_PHY_TXCAL45DM (0x0AU)
-
-/* Board led color mapping */
-#define LOGIC_LED_ON  0U
-#define LOGIC_LED_OFF 1U
-
-#define LED_RED_INIT(output)                                                                          \
-    {                                                                                                 \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, IOCON_DIGITAL_EN);    \
-        GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN,             \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */ \
-    }
-#define LED_RED_ON()                                            \
-    GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                   1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_RED_OFF()                                                                        \
-    GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT,                                \
-                 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED1 \ \ \ \ \ \ \ \ \ \ \
-                                                */
-#define LED_RED_TOGGLE()                                         \
-    GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                    1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_BLUE_INIT(output)                                                                         \
-    {                                                                                                 \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, IOCON_DIGITAL_EN);  \
-        GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN,          \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */ \
-    }
-#define LED_BLUE_ON()                                             \
-    GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                   1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_BLUE_OFF()                                          \
-    GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_BLUE_TOGGLE()                                          \
-    GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                    1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_GREEN_INIT(output)                                                              \
-    GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
-                 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED1 */
-#define LED_GREEN_ON()                                              \
-    GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                   1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_GREEN_OFF()                                           \
-    GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_GREEN_TOGGLE()                                           \
-    GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                    1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED1 */
-
-/* Display. */
-#define BOARD_LCD_DC_GPIO      GPIO
-#define BOARD_LCD_DC_GPIO_PORT 1U
-#define BOARD_LCD_DC_GPIO_PIN  5U
-
-/* Serial MWM WIFI */
-#define BOARD_SERIAL_MWM_PORT_CLK_FREQ CLOCK_GetFlexCommClkFreq(2)
-#define BOARD_SERIAL_MWM_PORT          USART2
-#define BOARD_SERIAL_MWM_PORT_IRQn     FLEXCOMM2_IRQn
-#define BOARD_SERIAL_MWM_RST_WRITE(output)
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus */
-
-/*******************************************************************************
- * API
- ******************************************************************************/
-
-void BOARD_InitDebugConsole(void);
-void BOARD_InitDebugConsole_Core1(void);
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz);
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize);
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize);
-void BOARD_Accel_I2C_Init(void);
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-void BOARD_Codec_I2C_Init(void);
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus */
-
-#endif /* _BOARD_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/clock_config.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/clock_config.c
deleted file mode 100644
index 190f4a898..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/clock_config.c
+++ /dev/null
@@ -1,374 +0,0 @@
-/*
- * Copyright 2017-2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to set up clock using clock driver functions:
- *
- * 1. Setup clock sources.
- *
- * 2. Set up wait states of the flash.
- *
- * 3. Set up all dividers.
- *
- * 4. Set up all selectors to provide selected clocks.
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v7.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 9.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_power.h"
-#include "fsl_clock.h"
-#include "clock_config.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockPLL150M();
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO12M
-outputs:
-- {id: System_clock.outFreq, value: 12 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO12M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(12000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(12000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFROHF96M
-outputs:
-- {id: System_clock.outFreq, value: 96 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-void BOARD_BootClockFROHF96M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(96000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(96000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL100M
-outputs:
-- {id: System_clock.outFreq, value: 100 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL100M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
-        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 100000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL150M
-called_from_default_init: true
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(150000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
-        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 150000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL1_150M
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL1_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
-- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL1M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL1N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL1_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL1_150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(150000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL1 */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
-    const pll_setup_t pll1Setup = {
-        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(53U) | SYSCON_PLL1CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL1NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
-        .pllmdec = SYSCON_PLL1MDEC_MDIV(150U),
-        .pllRate = 150000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK;
-#endif
-}
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/clock_config.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/clock_config.h
deleted file mode 100644
index 2d82e9a01..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/clock_config.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * Copyright 2017-2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
-#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO12M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFROHF96M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL100M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         150000000U  /*!< Core clock frequency: 150000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK       150000000U  /*!< Core clock frequency: 150000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL1_150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/fxos8700_fifo.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/fxos8700_fifo.c
deleted file mode 100644
index 5f8a868bd..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/fxos8700_fifo.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
- * Copyright 2016-2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/**
- * @file fxos8700_fifo.c
- * @brief The fxos8700.c file implements the ISSDK FXOS8700 sensor driver
- *        example demonstration with FIFO mode.
- */
-
-/*  SDK Includes */
-#include "pin_mux.h"
-#include "clock_config.h"
-#include "board.h"
-#include "fsl_debug_console.h"
-
-/* CMSIS Includes */
-#include "Driver_I2C.h"
-
-/* ISSDK Includes */
-#include "issdk_hal.h"
-#include "fxos8700_drv.h"
-
-/*******************************************************************************
- * Macro Definitions
- ******************************************************************************/
-/*---------------------------------------------------------------------------*/
-/*! @def    FIFO_SIZE
- *  @brief  The watermark value configured for FXAS21002 FIFO Buffer.
- */
-#define FIFO_SIZE 4
-#define RAW_ACCEL_DATA_SIZE (6)
-
-/*******************************************************************************
- * Constants
- ******************************************************************************/
-/*! Prepare the register write list to configure FXOS8700 in FIFO mode. */
-const registerwritelist_t fxos8700_Config_with_Fifo[] = {
-    /*! System and Control registers. */
-    /*! Configure the FXOS8700 to 12.5Hz sampling rate. */
-    {FXOS8700_CTRL_REG1, FXOS8700_CTRL_REG1_DR_SINGLE_12P5_HZ, FXOS8700_CTRL_REG1_DR_MASK},
-    /*! Prepare the register write list to configure FXOS8700 in FIFO mode. */
-    {FXOS8700_F_SETUP, FXOS8700_F_SETUP_F_MODE_FIFO_STOP_OVF | (FIFO_SIZE << FXOS8700_F_SETUP_F_WMRK_SHIFT),
-     FXOS8700_F_SETUP_F_MODE_MASK | FXOS8700_F_SETUP_F_WMRK_MASK},
-    __END_WRITE_DATA__};
-
-/*! Command definition to read the Data Ready Status */
-const registerreadlist_t FXOS8700_STATUS_READ[] = {{.readFrom = FXOS8700_STATUS, .numBytes = 1}, __END_READ_DATA__};
-
-/*! Command definition to read the FIFO_SIZE Bytes of Accel Data */
-const registerreadlist_t FXOS8700_ACCEL_FIFO_READ[] = {
-    {.readFrom = FXOS8700_OUT_X_MSB, .numBytes = RAW_ACCEL_DATA_SIZE * FIFO_SIZE}, __END_READ_DATA__};
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/*!
- * @brief Main function
- */
-int main(void)
-{
-    int32_t status;
-    uint8_t fifoEvent;
-    uint8_t data[RAW_ACCEL_DATA_SIZE * FIFO_SIZE];
-    fxos8700_accelmagdata_t rawData;
-
-    ARM_DRIVER_I2C *I2Cdrv = &I2C_S_DRIVER; // Now using the shield.h value!!!
-    fxos8700_i2c_sensorhandle_t FXOS8700drv;
-
-    /*! Initialize the MCU hardware. */
-    BOARD_InitPins();
-    BOARD_BootClockRUN();
-    BOARD_InitDebugConsole();
-
-    PRINTF("\r\n ISSDK FXOS8700 sensor driver example demonstration with fifo mode\r\n");
-
-    /*! Initialize the I2C driver. */
-    status = I2Cdrv->Initialize(I2C_S_SIGNAL_EVENT);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Initialization Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C Power mode. */
-    status = I2Cdrv->PowerControl(ARM_POWER_FULL);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Power Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C bus speed. */
-    status = I2Cdrv->Control(ARM_I2C_BUS_SPEED, ARM_I2C_BUS_SPEED_FAST);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Control Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Initialize the FXOS8700 sensor driver. */
-    status = FXOS8700_I2C_Initialize(&FXOS8700drv, &I2C_S_DRIVER, I2C_S_DEVICE_INDEX, FXOS8700_I2C_ADDR,
-                                     FXOS8700_WHO_AM_I_PROD_VALUE);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n Sensor Initialization Failed\r\n");
-        return -1;
-    }
-    PRINTF("\r\n Successfully Initiliazed Sensor\r\n");
-
-    /*!  Set the task to be executed while waiting for I2C transactions to complete. */
-    //FXOS8700_I2C_SetIdleTask(&FXOS8700drv, (registeridlefunction_t)SMC_SetPowerModeVlpr, SMC);
-
-    /*! Configure the fxos8700 sensor driver. */
-    status = FXOS8700_I2C_Configure(&FXOS8700drv, fxos8700_Config_with_Fifo);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n FXOS8700 Sensor Configuration Failed, Err = %d\r\n", status);
-        return -1;
-    }
-    PRINTF("\r\n Successfully Applied FXOS8700 Sensor Configuration\r\n");
-
-    for (;;) /* Forever loop */
-    {
-        /*! Wait for the FIFO watermark event. */
-        status = FXOS8700_I2C_ReadData(&FXOS8700drv, FXOS8700_STATUS_READ, &fifoEvent);
-        if (0 == (fifoEvent & FXOS8700_F_STATUS_F_WMRK_FLAG_MASK))
-        {
-            continue;
-        }
-
-        /*! Read the raw sensor data from the fxos8700. */
-        status = FXOS8700_I2C_ReadData(&FXOS8700drv, FXOS8700_ACCEL_FIFO_READ, data);
-        if (ARM_DRIVER_OK != status)
-        {
-            PRINTF("\r\n Read Failed. \r\n");
-            return -1;
-        }
-
-        for (uint8_t i = 0; i < FIFO_SIZE; i++)
-        {
-            /*! Convert the raw sensor data to signed 16-bit container for display to the debug port. */
-            rawData.accel[0] = ((uint16_t)data[i * RAW_ACCEL_DATA_SIZE + 0] << 8) | data[i * RAW_ACCEL_DATA_SIZE + 1];
-            rawData.accel[0] /= 4;
-            rawData.accel[1] = ((uint16_t)data[i * RAW_ACCEL_DATA_SIZE + 2] << 8) | data[i * RAW_ACCEL_DATA_SIZE + 3];
-            rawData.accel[1] /= 4;
-            rawData.accel[2] = ((uint16_t)data[i * RAW_ACCEL_DATA_SIZE + 4] << 8) | data[i * RAW_ACCEL_DATA_SIZE + 5];
-            rawData.accel[2] /= 4;
-        }
-        /* NOTE: PRINTF is relatively expensive in terms of CPU time, specially when used with-in execution loop. */
-        PRINTF("\r\n Accel X = %d  Y = %d  Z = %d\r\n", rawData.accel[0], rawData.accel[1], rawData.accel[2]);
-        ASK_USER_TO_RESUME(100 / FIFO_SIZE); /* Ask for user input after processing 100 samples. */
-    }
-}
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/fxos8700_fifo_niobe4_v3_9.xml b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/fxos8700_fifo_niobe4_v3_9.xml
deleted file mode 100644
index c312b45f4..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/fxos8700_fifo_niobe4_v3_9.xml
+++ /dev/null
@@ -1,159 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<ksdk:examples xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd manifest.xsd">
-  <externalDefinitions>
-    <definition extID="cm33_core0_LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.gpio_lpc.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_dma.LPC55S69"/>
-    <definition extID="platform.drivers.gint.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_cmsis.LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.systick_utils.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.interface.common.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.fxos8700.LPC55S69"/>
-    <definition extID="platform.drivers.common.LPC55S69"/>
-    <definition extID="platform.drivers.clock.LPC55S69"/>
-    <definition extID="platform.drivers.power.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_iocon.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux_connections.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_CMSIS.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_startup.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_gpio.LPC55S69"/>
-    <definition extID="platform.utilities.assert.LPC55S69"/>
-    <definition extID="utility.debug_console.LPC55S69"/>
-    <definition extID="component.usart_adapter.LPC55S69"/>
-    <definition extID="component.serial_manager.LPC55S69"/>
-    <definition extID="component.lists.LPC55S69"/>
-    <definition extID="component.serial_manager_uart.LPC55S69"/>
-    <definition extID="platform.drivers.reset.LPC55S69"/>
-    <definition extID="CMSIS_Include_core_cm.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.I2C.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.Common.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.SPI.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.USART.LPC55S69"/>
-    <definition extID="platform.utilities.misc_utilities.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_system.LPC55S69"/>
-    <definition extID="iar"/>
-    <definition extID="mdk"/>
-    <definition extID="armgcc"/>
-    <definition extID="mcuxpresso"/>
-    <definition extID="com.nxp.mcuxpresso"/>
-  </externalDefinitions>
-  <example id="lpcxpresso55s69_agm01_fxos8700_fifo_niobe4" name="fxos8700_fifo_niobe4" device_core="cm33_core0_LPC55S69" dependency="middleware.issdk.drivers.gpio_lpc.LPC55S69 platform.drivers.lpc_dma.LPC55S69 platform.drivers.gint.LPC55S69 platform.drivers.flexcomm.LPC55S69 platform.drivers.flexcomm_i2c.LPC55S69 platform.drivers.flexcomm_i2c_dma.LPC55S69 platform.drivers.flexcomm_i2c_cmsis.LPC55S69 platform.drivers.flexcomm_spi.LPC55S69 platform.drivers.flexcomm_spi_dma.LPC55S69 platform.drivers.flexcomm_spi_cmsis.LPC55S69 platform.drivers.flexcomm_usart.LPC55S69 platform.drivers.flexcomm_usart_dma.LPC55S69 platform.drivers.flexcomm_usart_cmsis.LPC55S69 middleware.issdk.drivers.systick_utils.LPC55S69 middleware.issdk.sensor.interface.common.LPC55S69 middleware.issdk.sensor.fxos8700.LPC55S69 platform.drivers.common.LPC55S69 platform.drivers.clock.LPC55S69 platform.drivers.power.LPC55S69 platform.drivers.lpc_iocon.LPC55S69 platform.drivers.inputmux.LPC55S69 platform.drivers.inputmux_connections.LPC55S69 platform.devices.LPC55S69_CMSIS.LPC55S69 platform.devices.LPC55S69_startup.LPC55S69 platform.drivers.lpc_gpio.LPC55S69 platform.utilities.assert.LPC55S69 utility.debug_console.LPC55S69 component.usart_adapter.LPC55S69 component.serial_manager.LPC55S69 component.lists.LPC55S69 component.serial_manager_uart.LPC55S69 platform.drivers.reset.LPC55S69 CMSIS_Include_core_cm.LPC55S69 CMSIS_Driver_Include.I2C.LPC55S69 CMSIS_Driver_Include.Common.LPC55S69 CMSIS_Driver_Include.SPI.LPC55S69 CMSIS_Driver_Include.USART.LPC55S69 platform.utilities.misc_utilities.LPC55S69 platform.devices.LPC55S69_system.LPC55S69" category="issdk/sensors">
-    <projects>
-      <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
-    </projects>
-    <toolchainSettings>
-      <toolchainSetting id_refs="com.nxp.mcuxpresso">
-        <option id="gnu.c.compiler.option.preprocessor.def.symbols" type="stringList">
-          <value>CPU_LPC55S69JBD100_cm33_core0</value>
-          <value>PRINTF_ADVANCED_ENABLE=1</value>
-          <value>SERIAL_PORT_TYPE_UART=1</value>
-          <value>MCUXPRESSO_SDK</value>
-        </option>
-        <option id="com.crt.advproject.gas.fpu" type="enum">
-          <value>com.crt.advproject.gas.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="com.crt.advproject.gcc.fpu" type="enum">
-          <value>com.crt.advproject.gcc.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.compiler.option.optimization.flags" type="string">
-          <value>-fno-common</value>
-        </option>
-        <option id="com.crt.advproject.c.misc.dialect" type="enum">
-          <value>com.crt.advproject.misc.dialect.gnu99</value>
-        </option>
-        <option id="gnu.c.compiler.option.misc.other" type="string">
-          <value>-mcpu=cortex-m33 -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin</value>
-        </option>
-        <option id="gnu.c.compiler.option.warnings.allwarn" type="boolean">
-          <value>false</value>
-        </option>
-        <option id="com.crt.advproject.link.fpu" type="enum">
-          <value>com.crt.advproject.link.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.link.option.nostdlibs" type="boolean">
-          <value>true</value>
-        </option>
-      </toolchainSetting>
-    </toolchainSettings>
-    <include_paths>
-      <include_path path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include"/>
-      <include_path path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="board" type="c_include"/>
-    </include_paths>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/iar" project_relative_path="./" type="workspace" toolchain="iar">
-      <files mask="fxos8700_fifo_niobe4.ewd"/>
-      <files mask="fxos8700_fifo_niobe4.ewp"/>
-      <files mask="fxos8700_fifo_niobe4.eww"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/mdk" project_relative_path="./" type="workspace" toolchain="mdk">
-      <files mask="fxos8700_fifo_niobe4.uvprojx"/>
-      <files mask="fxos8700_fifo_niobe4.uvoptx"/>
-      <files mask="JLinkSettings.JLinkScript"/>
-      <files mask="JLinkSettings.ini"/>
-      <files mask="fxos8700_fifo_niobe4.uvmpw"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc" project_relative_path="./" type="workspace" toolchain="armgcc">
-      <files mask="build_all.bat"/>
-      <files mask="build_all.sh"/>
-      <files mask="clean.bat"/>
-      <files mask="clean.sh"/>
-      <files mask="CMakeLists.txt"/>
-      <files mask="flags.cmake"/>
-      <files mask="config.cmake"/>
-      <files mask="build_debug.bat"/>
-      <files mask="build_debug.sh"/>
-      <files mask="build_release.bat"/>
-      <files mask="build_release.sh"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="src">
-      <files mask="lpc55s69.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include">
-      <files mask="lpc55s69.h"/>
-      <files mask="frdm_stbc_agm01_shield.h"/>
-      <files mask="issdk_hal.h"/>
-      <files mask="RTE_Device.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="source" type="src">
-      <files mask="fxos8700_fifo.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="board" type="src">
-      <files mask="pin_mux.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="board" type="c_include">
-      <files mask="pin_mux.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="doc" type="doc">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="board" type="src">
-      <files mask="board.c"/>
-      <files mask="clock_config.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="board" type="c_include">
-      <files mask="board.h"/>
-      <files mask="clock_config.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo" project_relative_path="doc" type="doc" toolchain="iar mdk mcuxpresso">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/iar" project_relative_path="LPC55S69/iar" type="linker" toolchain="iar">
-      <files mask="LPC55S69_cm33_core0_flash.icf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/mdk" project_relative_path="LPC55S69/arm" type="linker" toolchain="mdk">
-      <files mask="LPC55S69_cm33_core0_flash.scf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/armgcc" project_relative_path="LPC55S69/gcc" type="linker" toolchain="armgcc">
-      <files mask="LPC55S69_cm33_core0_flash.ld"/>
-    </source>
-  </example>
-</ksdk:examples>
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/pin_mux.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/pin_mux.c
deleted file mode 100644
index e68e17d70..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/pin_mux.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v6.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 0.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_iocon.h"
-#include "pin_mux.h"
-#include "fsl_power.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitPins(void)
-{
-    /* set BOD VBAT level to 1.65V */
-    POWER_SetBodVbatLevel(kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false);
-
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: enabled}
-  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: enabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '30', peripheral: GPIO, signal: 'PIO1, 21', pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as PIO1_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN21 (coords: 30) is configured as PIO1_21 */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '92', peripheral: GPIO, signal: 'PIO0, 29', pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '94', peripheral: GPIO, signal: 'PIO0, 30', pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as PIO0_29 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as PIO0_29 */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as PIO0_30 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as PIO0_30 */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: FLEXCOMM7, signal: RTS_SCL_SSEL1, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC7_RTS_SCL_SSEL1 */
-                                         IOCON_PIO_FUNC1 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as FC7_RTS_SCL_SSEL1 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: GPIO, signal: 'PIO0, 20', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as PIO0_19 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as PIO0_19 */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as PIO0_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as PIO0_20 */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as PIO0_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as PIO0_21 */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/pin_mux.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/pin_mux.h
deleted file mode 100644
index 8c1307b13..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/pin_mux.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u   /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC5 0x05u          /*!<@brief Selects pin function 5 */
-#define IOCON_PIO_INV_DI 0x00u         /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u    /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_EN 0x0200u /*!<@brief Open drain is enabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u  /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/readme.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/readme.txt
deleted file mode 100644
index 9c249fe86..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_fifo/readme.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-Hardware requirements
-===================
-- Mini/micro USB cable
-- LPCXpresso55s69 board
-- FRDM-STBC-AGM01 board
-- Personal Computer
-
-Board settings
-==============
-On FRDM-STBC-AGM01 sensor shield board:
---------------------------------------
-For I2C Mode: The examples use I2C1 and Pins 2-3 of Jumpers J6 and J7 on FRDM-STBC-AGM01 should be connected.
-For SPI Mode: The examples use SPI0 and the FRDM-STBC-AGM01 needs to be rewired for SPI which requires removal of Resistor R3.
-
-Demo Overview
-============
-The FXOS8700 FIFO example application demonstrates the use of the FXOS8700 sensor in Buffered (FIFO) Mode.
-The example demonstrates configuration of all registers required to put the sensor in FIFO Mode and read out samples.
-
-The application consistently checks for the FIFO status flag and reads out all(count=Water Mark Level) samples when it sets.
-
-Prepare the Demo
-===============
-1.  Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
-2.  Open a serial terminal with the following settings:
-    - 115200 baud rate
-    - 8 data bits
-    - No parity
-    - One stop bit
-    - No flow control
-3.  Download the program to the target board.
-4.  Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
-
-Running the demo
-===============
-When the demo runs successfully, you can see the Samples printed to the terminal.
-
-Note: you must rotate the board to get the samples to change.
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/CMakeLists.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/CMakeLists.txt
deleted file mode 100644
index 635c0a876..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/CMakeLists.txt
+++ /dev/null
@@ -1,160 +0,0 @@
-# CROSS COMPILER SETTING
-SET(CMAKE_SYSTEM_NAME Generic)
-CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
-
-# THE VERSION NUMBER
-SET (Tutorial_VERSION_MAJOR 1)
-SET (Tutorial_VERSION_MINOR 0)
-
-# ENABLE ASM
-ENABLE_LANGUAGE(ASM)
-
-SET(CMAKE_STATIC_LIBRARY_PREFIX)
-SET(CMAKE_STATIC_LIBRARY_SUFFIX)
-
-SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
-SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
-
-# CURRENT DIRECTORY
-SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
-
-SET(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-SET(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
-
-
-project(fxos8700_poll_niobe4)
-
-set(MCUX_SDK_PROJECT_NAME fxos8700_poll_niobe4.elf)
-
-include(${ProjDirPath}/flags.cmake)
-
-include(${ProjDirPath}/config.cmake)
-
-add_executable(${MCUX_SDK_PROJECT_NAME} 
-"${ProjDirPath}/../../../../../lpc55s69.c"
-"${ProjDirPath}/../../../../../lpc55s69.h"
-"${ProjDirPath}/../../../../../frdm_stbc_agm01_shield.h"
-"${ProjDirPath}/../../../../../issdk_hal.h"
-"${ProjDirPath}/../../../../../RTE_Device.h"
-"${ProjDirPath}/../fxos8700_poll.c"
-"${ProjDirPath}/../pin_mux.c"
-"${ProjDirPath}/../pin_mux.h"
-"${ProjDirPath}/../board.c"
-"${ProjDirPath}/../board.h"
-"${ProjDirPath}/../clock_config.c"
-"${ProjDirPath}/../clock_config.h"
-)
-
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
-    ${ProjDirPath}/../../../../..
-    ${ProjDirPath}/..
-)
-
-set(CMAKE_MODULE_PATH
-    ${ProjDirPath}/../../../../../../../middleware/issdk
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/cmsis_drivers
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69
-    ${ProjDirPath}/../../../../../../../devices/LPC55S69/utilities
-    ${ProjDirPath}/../../../../../../../components/uart
-    ${ProjDirPath}/../../../../../../../components/serial_manager
-    ${ProjDirPath}/../../../../../../../components/lists
-    ${ProjDirPath}/../../../../../../../CMSIS/Core/Include
-    ${ProjDirPath}/../../../../../../../CMSIS/Driver/Include
-)
-
-# include modules
-include(middleware_issdk_drivers_gpio_lpc_LPC55S69_cm33_core0)
-
-include(driver_lpc_dma_LPC55S69_cm33_core0)
-
-include(driver_gint_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_i2c_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_i2c_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_spi_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_spi_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(driver_flexcomm_usart_dma_LPC55S69_cm33_core0)
-
-include(driver_cmsis_flexcomm_usart_LPC55S69_cm33_core0)
-
-include(middleware_issdk_drivers_systick_utils_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_interface_common_LPC55S69_cm33_core0)
-
-include(middleware_issdk_sensor_fxos8700_LPC55S69_cm33_core0)
-
-include(driver_common_LPC55S69_cm33_core0)
-
-include(driver_clock_LPC55S69_cm33_core0)
-
-include(driver_power_LPC55S69_cm33_core0)
-
-include(driver_lpc_iocon_LPC55S69_cm33_core0)
-
-include(driver_inputmux_LPC55S69_cm33_core0)
-
-include(driver_inputmux_connections_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_CMSIS_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_startup_LPC55S69_cm33_core0)
-
-include(driver_lpc_gpio_LPC55S69_cm33_core0)
-
-include(utility_assert_LPC55S69_cm33_core0)
-
-include(utility_debug_console_LPC55S69_cm33_core0)
-
-include(component_usart_adapter_LPC55S69_cm33_core0)
-
-include(component_serial_manager_LPC55S69_cm33_core0)
-
-include(component_lists_LPC55S69_cm33_core0)
-
-include(component_serial_manager_uart_LPC55S69_cm33_core0)
-
-include(driver_reset_LPC55S69_cm33_core0)
-
-include(CMSIS_Include_core_cm_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_I2C_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_Common_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_SPI_LPC55S69_cm33_core0)
-
-include(CMSIS_Driver_Include_USART_LPC55S69_cm33_core0)
-
-include(utilities_misc_utilities_LPC55S69_cm33_core0)
-
-include(device_LPC55S69_system_LPC55S69_cm33_core0)
-
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--start-group)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE m)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE c)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE gcc)
-
-target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE nosys)
-
-TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
-
-ADD_CUSTOM_COMMAND(TARGET ${MCUX_SDK_PROJECT_NAME} POST_BUILD COMMAND ${CMAKE_OBJCOPY}
--Obinary ${EXECUTABLE_OUTPUT_PATH}/${MCUX_SDK_PROJECT_NAME} ${EXECUTABLE_OUTPUT_PATH}/LPC55S69-AGM01-fxos8700-FIFO-CORE0.bin)
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/LPC55S69_cm33_core0_flash.ld b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/LPC55S69_cm33_core0_flash.ld
deleted file mode 100644
index ef9bc99b6..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/LPC55S69_cm33_core0_flash.ld
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
-** ###################################################################
-**     Processors:          LPC55S69JBD100_cm33_core0
-**                          LPC55S69JBD64_cm33_core0
-**                          LPC55S69JEV98_cm33_core0
-**
-**     Compiler:            GNU C Compiler
-**     Reference manual:    LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3  16 May 2019
-**     Version:             rev. 1.1, 2019-05-16
-**     Build:               b210928
-**
-**     Abstract:
-**         Linker file for the GNU C Compiler
-**
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2021 NXP
-**     All rights reserved.
-**
-**     SPDX-License-Identifier: BSD-3-Clause
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800;
-RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0;
-
-/* Specify the memory areas */
-MEMORY
-{
-  m_interrupts          (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000200
-  m_text                (RX)  : ORIGIN = 0x00000200, LENGTH = 0x00071E00
-  m_core1_image         (RX)  : ORIGIN = 0x00072000, LENGTH = 0x0002B800
-  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00033000 - RPMSG_SHMEM_SIZE
-  rpmsg_sh_mem          (RW)  : ORIGIN = 0x20033000 - RPMSG_SHMEM_SIZE, LENGTH = RPMSG_SHMEM_SIZE
-  m_usb_sram            (RW)  : ORIGIN = 0x40100000, LENGTH = 0x00004000
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* section for storing the secondary core image */
-  .core1_code :
-  {
-     . = ALIGN(4) ;
-    KEEP (*(.core1_code))
-     *(.core1_code*)
-     . = ALIGN(4) ;
-  } > m_core1_image
-
-  /* NOINIT section for rpmsg_sh_mem */
-  .noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4)
-  {
-     __RPMSG_SH_MEM_START__ = .;
-     *(.noinit.$rpmsg_sh_mem*)
-     . = ALIGN(4) ;
-     __RPMSG_SH_MEM_END__ = .;
-  } > rpmsg_sh_mem
-
-  /* The startup code goes first into internal flash */
-  .interrupts :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector))     /* Startup code */
-    . = ALIGN(4);
-  } > m_interrupts
-
-  /* The program code and other data goes into internal flash */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)                 /* .text sections (code) */
-    *(.text*)                /* .text* sections (code) */
-    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
-    *(.glue_7)               /* glue arm to thumb code */
-    *(.glue_7t)              /* glue thumb to arm code */
-    *(.eh_frame)
-    KEEP (*(.init))
-    KEEP (*(.fini))
-    . = ALIGN(4);
-  } > m_text
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } > m_text
-
- .ctors :
-  {
-    __CTOR_LIST__ = .;
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       from the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __CTOR_END__ = .;
-  } > m_text
-
-  .dtors :
-  {
-    __DTOR_LIST__ = .;
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    __DTOR_END__ = .;
-  } > m_text
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text
-
-  __etext = .;    /* define a global symbol at end of code */
-  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
-
-  .data : AT(__DATA_ROM)
-  {
-    . = ALIGN(4);
-    __DATA_RAM = .;
-    __data_start__ = .;      /* create a global symbol at data start */
-    *(.ramfunc*)             /* for functions in ram */
-    *(.data)                 /* .data sections */
-    *(.data*)                /* .data* sections */
-    KEEP(*(.jcr*))
-    . = ALIGN(4);
-    __data_end__ = .;        /* define a global symbol at data end */
-  } > m_data
-
-  __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
-  text_end = ORIGIN(m_text) + LENGTH(m_text);
-  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
-
-  /* Uninitialized data section */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    . = ALIGN(4);
-    __START_BSS = .;
-    __bss_start__ = .;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-    . = ALIGN(4);
-    __bss_end__ = .;
-    __END_BSS = .;
-  } > m_data
-
-  .heap :
-  {
-    . = ALIGN(8);
-    __end__ = .;
-    PROVIDE(end = .);
-    __HeapBase = .;
-    . += HEAP_SIZE;
-    __HeapLimit = .;
-    __heap_limit = .; /* Add for _sbrk */
-  } > m_data
-
-  .stack :
-  {
-    . = ALIGN(8);
-    . += STACK_SIZE;
-  } > m_data
-
-  m_usb_bdt (NOLOAD) :
-  {
-    . = ALIGN(512);
-    *(m_usb_bdt)
-  } > m_usb_sram
-
-  m_usb_global (NOLOAD) :
-  {
-    *(m_usb_global)
-  } > m_usb_sram
-
-  /* Initializes stack on the end of block */
-  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
-  __StackLimit = __StackTop - STACK_SIZE;
-  PROVIDE(__stack = __StackTop);
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-
-  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
-}
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_all.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_all.bat
deleted file mode 100644
index f90389d0b..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_all.bat
+++ /dev/null
@@ -1,15 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-mingw32-make -j
-
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
-mingw32-make -j
-
-IF "%1" == "" ( pause )
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_all.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_all.sh
deleted file mode 100755
index 5702db0cf..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_all.sh
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-make -j
-
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
-make -j
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_debug.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_debug.bat
deleted file mode 100644
index 0636e21b5..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_debug.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_debug.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_debug.sh
deleted file mode 100755
index 30c0ab2d5..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_debug.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
-make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_release.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_release.bat
deleted file mode 100644
index a34003e0e..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_release.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-if exist CMakeFiles (RD /s /Q CMakeFiles)
-if exist Makefile (DEL /s /Q /F Makefile)
-if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
-if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
-mingw32-make -j 2> build_log.txt 
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_release.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_release.sh
deleted file mode 100755
index 012619cda..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/build_release.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/sh
-if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
-if [ -f "Makefile" ];then rm -f Makefile; fi
-if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
-if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
-cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
-make -j 2>&1 | tee build_log.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/clean.bat b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/clean.bat
deleted file mode 100644
index f391a79b5..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/clean.bat
+++ /dev/null
@@ -1,3 +0,0 @@
-RD /s /Q debug release CMakeFiles
-DEL /s /Q /F Makefile cmake_install.cmake CMakeCache.txt
-pause
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/clean.sh b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/clean.sh
deleted file mode 100755
index 795ad8716..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/clean.sh
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/bin/sh
-rm -rf debug release CMakeFiles
-rm -rf Makefile cmake_install.cmake CMakeCache.txt
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/config.cmake b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/config.cmake
deleted file mode 100755
index bcbaf4174..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/config.cmake
+++ /dev/null
@@ -1,4 +0,0 @@
-# config to select component, the format is CONFIG_USE_${component}
-set(CONFIG_USE_driver_power_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_component_serial_manager_uart_LPC55S69_cm33_core0 true)
-set(CONFIG_USE_driver_flexcomm_usart_LPC55S69_cm33_core0 true)
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/flags.cmake b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/flags.cmake
deleted file mode 100755
index 6ad254f08..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc/flags.cmake
+++ /dev/null
@@ -1,186 +0,0 @@
-SET(CMAKE_ASM_FLAGS_DEBUG " \
-    ${CMAKE_ASM_FLAGS_DEBUG} \
-    -DDEBUG \
-    -D__STARTUP_CLEAR_BSS \
-    -g \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_ASM_FLAGS_RELEASE " \
-    ${CMAKE_ASM_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -D__STARTUP_CLEAR_BSS \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_C_FLAGS_DEBUG " \
-    ${CMAKE_C_FLAGS_DEBUG} \
-    -DDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DPRINTF_ADVANCED_ENABLE=1 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -g \
-    -O0 \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_C_FLAGS_RELEASE " \
-    ${CMAKE_C_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DPRINTF_ADVANCED_ENABLE=1 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -Os \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -std=gnu99 \
-")
-SET(CMAKE_CXX_FLAGS_DEBUG " \
-    ${CMAKE_CXX_FLAGS_DEBUG} \
-    -DDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -g \
-    -O0 \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -fno-rtti \
-    -fno-exceptions \
-")
-SET(CMAKE_CXX_FLAGS_RELEASE " \
-    ${CMAKE_CXX_FLAGS_RELEASE} \
-    -DNDEBUG \
-    -DCPU_LPC55S69JBD100_cm33_core0 \
-    -DSERIAL_PORT_TYPE_UART=1 \
-    -DMCUXPRESSO_SDK \
-    -Os \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    -mthumb \
-    -MMD \
-    -MP \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mapcs \
-    -fno-rtti \
-    -fno-exceptions \
-")
-SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-    ${CMAKE_EXE_LINKER_FLAGS_DEBUG} \
-    -g \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    --specs=nano.specs \
-    --specs=nosys.specs \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mthumb \
-    -mapcs \
-    -Xlinker \
-    --gc-sections \
-    -Xlinker \
-    -static \
-    -Xlinker \
-    -z \
-    -Xlinker \
-    muldefs \
-    -Xlinker \
-    -Map=output.map \
-    -Wl,--print-memory-usage \
-    -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
-")
-SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-    ${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
-    -mcpu=cortex-m33 \
-    -Wall \
-    -mfloat-abi=hard \
-    -mfpu=fpv5-sp-d16 \
-    --specs=nano.specs \
-    --specs=nosys.specs \
-    -fno-common \
-    -ffunction-sections \
-    -fdata-sections \
-    -ffreestanding \
-    -fno-builtin \
-    -mthumb \
-    -mapcs \
-    -Xlinker \
-    --gc-sections \
-    -Xlinker \
-    -static \
-    -Xlinker \
-    -z \
-    -Xlinker \
-    muldefs \
-    -Xlinker \
-    -Map=output.map \
-    -Wl,--print-memory-usage \
-    -T${ProjDirPath}/LPC55S69_cm33_core0_flash.ld -static \
-")
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/board.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/board.c
deleted file mode 100644
index 2d8c30a43..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/board.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <stdint.h>
-#include "fsl_common.h"
-#include "fsl_debug_console.h"
-#include "board.h"
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-#include "fsl_i2c.h"
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/* Initialize debug console. */
-void BOARD_InitDebugConsole(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM0 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
-}
-
-void BOARD_InitDebugConsole_Core1(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM1 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ_CORE1;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1, BOARD_DEBUG_UART_TYPE_CORE1,
-                    uartClkSrcFreq);
-}
-
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz)
-{
-    i2c_master_config_t i2cConfig = {0};
-
-    I2C_MasterGetDefaultConfig(&i2cConfig);
-    I2C_MasterInit(base, &i2cConfig, clkSrc_Hz);
-}
-
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.direction      = kI2C_Write;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = txBuff;
-    masterXfer.dataSize       = txBuffSize;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = rxBuff;
-    masterXfer.dataSize       = rxBuffSize;
-    masterXfer.direction      = kI2C_Read;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-void BOARD_Accel_I2C_Init(void)
-{
-    BOARD_I2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
-{
-    uint8_t data = (uint8_t)txBuff;
-
-    return BOARD_I2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
-}
-
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_I2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
-}
-
-void BOARD_Codec_I2C_Init(void)
-{
-    BOARD_I2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
-{
-    return BOARD_I2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
-                          txBuffSize);
-}
-
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_I2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
-}
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/board.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/board.h
deleted file mode 100644
index adf1e7dfb..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/board.h
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include "clock_config.h"
-#include "fsl_common.h"
-#include "fsl_reset.h"
-#include "fsl_gpio.h"
-#include "fsl_iocon.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-/*! @brief The board name */
-#define BOARD_NAME "LPCXpresso55S69"
-
-/*! @brief The UART to use for debug messages. */
-/* TODO: rename UART to USART */
-#define BOARD_DEBUG_UART_TYPE       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR   (uint32_t) USART0
-#define BOARD_DEBUG_UART_INSTANCE   0U
-#define BOARD_DEBUG_UART_CLK_FREQ   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM0
-#define BOARD_DEBUG_UART_RST        kFC0_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC     kCLOCK_Flexcomm0
-#define BOARD_UART_IRQ_HANDLER      FLEXCOMM0_IRQHandler
-#define BOARD_UART_IRQ              FLEXCOMM0_IRQn
-
-#define BOARD_ACCEL_I2C_BASEADDR   I2C4
-#define BOARD_ACCEL_I2C_CLOCK_FREQ 12000000
-
-#define BOARD_DEBUG_UART_TYPE_CORE1       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR_CORE1   (uint32_t) USART1
-#define BOARD_DEBUG_UART_INSTANCE_CORE1   1U
-#define BOARD_DEBUG_UART_CLK_FREQ_CORE1   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM1
-#define BOARD_DEBUG_UART_RST_CORE1        kFC1_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC_CORE1     kCLOCK_Flexcomm1
-#define BOARD_UART_IRQ_HANDLER_CORE1      FLEXCOMM1_IRQHandler
-#define BOARD_UART_IRQ_CORE1              FLEXCOMM1_IRQn
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE
-#define BOARD_DEBUG_UART_BAUDRATE 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE */
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
-#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
-
-#define BOARD_CODEC_I2C_BASEADDR   I2C4
-#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
-#define BOARD_CODEC_I2C_INSTANCE   4
-#ifndef BOARD_LED_RED_GPIO
-#define BOARD_LED_RED_GPIO GPIO
-#endif
-#define BOARD_LED_RED_GPIO_PORT 1U
-#ifndef BOARD_LED_RED_GPIO_PIN
-#define BOARD_LED_RED_GPIO_PIN 6U
-#endif
-
-#ifndef BOARD_LED_BLUE_GPIO
-#define BOARD_LED_BLUE_GPIO GPIO
-#endif
-#define BOARD_LED_BLUE_GPIO_PORT 1U
-#ifndef BOARD_LED_BLUE_GPIO_PIN
-#define BOARD_LED_BLUE_GPIO_PIN 4U
-#endif
-
-#ifndef BOARD_LED_GREEN_GPIO
-#define BOARD_LED_GREEN_GPIO GPIO
-#endif
-#define BOARD_LED_GREEN_GPIO_PORT 1U
-#ifndef BOARD_LED_GREEN_GPIO_PIN
-#define BOARD_LED_GREEN_GPIO_PIN 7U
-#endif
-
-#ifndef BOARD_SW1_GPIO
-#define BOARD_SW1_GPIO GPIO
-#endif
-#define BOARD_SW1_GPIO_PORT 0U
-#ifndef BOARD_SW1_GPIO_PIN
-#define BOARD_SW1_GPIO_PIN 5U
-#endif
-#define BOARD_SW1_NAME        "SW1"
-#define BOARD_SW1_IRQ         PIN_INT0_IRQn
-#define BOARD_SW1_IRQ_HANDLER PIN_INT0_IRQHandler
-
-#ifndef BOARD_SW2_GPIO
-#define BOARD_SW2_GPIO GPIO
-#endif
-#define BOARD_SW2_GPIO_PORT 1U
-#ifndef BOARD_SW2_GPIO_PIN
-#define BOARD_SW2_GPIO_PIN 18U
-#endif
-#define BOARD_SW2_NAME              "SW2"
-#define BOARD_SW2_IRQ               PIN_INT1_IRQn
-#define BOARD_SW2_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW2_GPIO_PININT_INDEX 1
-
-#ifndef BOARD_SW3_GPIO
-#define BOARD_SW3_GPIO GPIO
-#endif
-#define BOARD_SW3_GPIO_PORT 1U
-#ifndef BOARD_SW3_GPIO_PIN
-#define BOARD_SW3_GPIO_PIN 9U
-#endif
-#define BOARD_SW3_NAME              "SW3"
-#define BOARD_SW3_IRQ               PIN_INT1_IRQn
-#define BOARD_SW3_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW3_GPIO_PININT_INDEX 1
-
-/* USB PHY condfiguration */
-#define BOARD_USB_PHY_D_CAL     (0x05U)
-#define BOARD_USB_PHY_TXCAL45DP (0x0AU)
-#define BOARD_USB_PHY_TXCAL45DM (0x0AU)
-
-/* Board led color mapping */
-#define LOGIC_LED_ON  0U
-#define LOGIC_LED_OFF 1U
-
-#define LED_RED_INIT(output)                                                                          \
-    {                                                                                                 \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, IOCON_DIGITAL_EN);    \
-        GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN,             \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */ \
-    }
-#define LED_RED_ON()                                            \
-    GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                   1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_RED_OFF()                                                                        \
-    GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT,                                \
-                 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED1 \ \ \ \ \ \ \ \ \ \ \
-                                                */
-#define LED_RED_TOGGLE()                                         \
-    GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                    1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_BLUE_INIT(output)                                                                         \
-    {                                                                                                 \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, IOCON_DIGITAL_EN);  \
-        GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN,          \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */ \
-    }
-#define LED_BLUE_ON()                                             \
-    GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                   1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_BLUE_OFF()                                          \
-    GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_BLUE_TOGGLE()                                          \
-    GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                    1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_GREEN_INIT(output)                                                              \
-    GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
-                 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED1 */
-#define LED_GREEN_ON()                                              \
-    GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                   1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_GREEN_OFF()                                           \
-    GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_GREEN_TOGGLE()                                           \
-    GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                    1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED1 */
-
-/* Display. */
-#define BOARD_LCD_DC_GPIO      GPIO
-#define BOARD_LCD_DC_GPIO_PORT 1U
-#define BOARD_LCD_DC_GPIO_PIN  5U
-
-/* Serial MWM WIFI */
-#define BOARD_SERIAL_MWM_PORT_CLK_FREQ CLOCK_GetFlexCommClkFreq(2)
-#define BOARD_SERIAL_MWM_PORT          USART2
-#define BOARD_SERIAL_MWM_PORT_IRQn     FLEXCOMM2_IRQn
-#define BOARD_SERIAL_MWM_RST_WRITE(output)
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus */
-
-/*******************************************************************************
- * API
- ******************************************************************************/
-
-void BOARD_InitDebugConsole(void);
-void BOARD_InitDebugConsole_Core1(void);
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz);
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize);
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize);
-void BOARD_Accel_I2C_Init(void);
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-void BOARD_Codec_I2C_Init(void);
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus */
-
-#endif /* _BOARD_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/clock_config.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/clock_config.c
deleted file mode 100644
index 190f4a898..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/clock_config.c
+++ /dev/null
@@ -1,374 +0,0 @@
-/*
- * Copyright 2017-2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to set up clock using clock driver functions:
- *
- * 1. Setup clock sources.
- *
- * 2. Set up wait states of the flash.
- *
- * 3. Set up all dividers.
- *
- * 4. Set up all selectors to provide selected clocks.
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v7.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 9.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_power.h"
-#include "fsl_clock.h"
-#include "clock_config.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockPLL150M();
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO12M
-outputs:
-- {id: System_clock.outFreq, value: 12 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO12M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(12000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(12000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFROHF96M
-outputs:
-- {id: System_clock.outFreq, value: 96 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-void BOARD_BootClockFROHF96M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(96000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(96000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL100M
-outputs:
-- {id: System_clock.outFreq, value: 100 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL100M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
-        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 100000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL150M
-called_from_default_init: true
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(150000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
-        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 150000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL1_150M
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL1_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
-- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL1M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL1N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL1_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL1_150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(150000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL1 */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
-    const pll_setup_t pll1Setup = {
-        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(53U) | SYSCON_PLL1CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL1NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
-        .pllmdec = SYSCON_PLL1MDEC_MDIV(150U),
-        .pllRate = 150000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK;
-#endif
-}
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/clock_config.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/clock_config.h
deleted file mode 100644
index 2d82e9a01..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/clock_config.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * Copyright 2017-2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
-#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO12M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFROHF96M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL100M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         150000000U  /*!< Core clock frequency: 150000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK       150000000U  /*!< Core clock frequency: 150000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL1_150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
-
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/fxos8700_poll.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/fxos8700_poll.c
deleted file mode 100644
index 38a2d9d75..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/fxos8700_poll.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
- * Copyright 2016-2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/**
- * @file fxos8700_poll.c
- * @brief The fxos8700_poll.c file implements the ISSDK FXOS8700 sensor driver
- *        example demonstration with polling mode.
- */
-
-/*  SDK Includes */
-#include "pin_mux.h"
-#include "clock_config.h"
-#include "board.h"
-#include "fsl_debug_console.h"
-
-/* CMSIS Includes */
-#include "Driver_I2C.h"
-
-/* ISSDK Includes */
-#include "issdk_hal.h"
-#include "fxos8700_drv.h"
-
-/*******************************************************************************
- * Macro Definitions
- ******************************************************************************/
-#define RAW_ACCELMAG_DATA_SIZE (12)
-
-/*******************************************************************************
- * Constants
- ******************************************************************************/
-/*! Prepare the register write list to configure FXOS8700 in Hybrid mode. */
-const registerwritelist_t fxos8700_Config_Hybrid[] = {
-    /*! System and Control registers. */
-    /*! Configure the FXOS8700 to 25Hz Hybrid sampling rate. */
-    {FXOS8700_CTRL_REG1, FXOS8700_CTRL_REG1_DR_HYBRID_25_HZ, FXOS8700_CTRL_REG1_DR_MASK},
-    {FXOS8700_M_CTRL_REG1, FXOS8700_M_CTRL_REG1_M_ACAL_EN | FXOS8700_M_CTRL_REG1_M_HMS_HYBRID_MODE,
-                           FXOS8700_M_CTRL_REG1_M_ACAL_MASK | FXOS8700_M_CTRL_REG1_M_HMS_MASK}, /*! Enable the Hybrid Mode. */
-    {FXOS8700_M_CTRL_REG2, FXOS8700_M_CTRL_REG2_M_AUTOINC_HYBRID_MODE | FXOS8700_M_CTRL_REG2_M_RST_CNT_DISABLE,
-                           FXOS8700_M_CTRL_REG2_M_AUTOINC_MASK | FXOS8700_M_CTRL_REG2_M_RST_CNT_MASK}, /*! Enable the Data read with Hybrid Mode. */
-    __END_WRITE_DATA__};
-
-/*! Command definition to read the Data Ready Status */
-const registerreadlist_t FXOS8700_STATUS_READ[] = {{.readFrom = FXOS8700_STATUS, .numBytes = 1}, __END_READ_DATA__};
-
-/*! Command definition to read the Accel + Mag Data */
-const registerreadlist_t FXOS8700_ACCELMAG_READ[] = {{.readFrom = FXOS8700_OUT_X_MSB, .numBytes = 12},
-                                                     __END_READ_DATA__};
-
-/*! Command definition to read the Accel + Mag Data (in 2 TXNs). */
-const registerreadlist_t FXOS8700_ACCEL_MAG_READ[] = {{.readFrom = FXOS8700_OUT_X_MSB, .numBytes = 6},
-                                                      {.readFrom = FXOS8700_M_OUT_X_MSB, .numBytes = 6},
-                                                      __END_READ_DATA__};
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/*!
- * @brief Main function
- */
-int main(void)
-{
-    int32_t status;
-    uint8_t dataReady;
-    uint8_t data[RAW_ACCELMAG_DATA_SIZE];
-    fxos8700_accelmagdata_t rawData;
-
-    ARM_DRIVER_I2C *I2Cdrv = &I2C_S_DRIVER; // Now using the shield.h value!!!
-    fxos8700_i2c_sensorhandle_t FXOS8700drv;
-
-    /*! Initialize the MCU hardware. */
-    BOARD_InitPins();
-    BOARD_BootClockRUN();
-    BOARD_InitDebugConsole();
-
-    PRINTF("\r\n ISSDK FXOS8700 sensor driver example demonstration with poll mode\r\n");
-
-    /*! Initialize the I2C driver. */
-    status = I2Cdrv->Initialize(I2C_S_SIGNAL_EVENT);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Initialization Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C Power mode. */
-    status = I2Cdrv->PowerControl(ARM_POWER_FULL);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Power Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Set the I2C bus speed. */
-    status = I2Cdrv->Control(ARM_I2C_BUS_SPEED, ARM_I2C_BUS_SPEED_FAST);
-    if (ARM_DRIVER_OK != status)
-    {
-        PRINTF("\r\n I2C Control Mode setting Failed\r\n");
-        return -1;
-    }
-
-    /*! Initialize the FXOS8700 sensor driver. */
-    status = FXOS8700_I2C_Initialize(&FXOS8700drv, &I2C_S_DRIVER, I2C_S_DEVICE_INDEX, FXOS8700_I2C_ADDR,
-                                     FXOS8700_WHO_AM_I_PROD_VALUE);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n Sensor Initialization Failed\r\n");
-        return -1;
-    }
-    PRINTF("\r\n Successfully Initiliazed Sensor\r\n");
-
-    /*!  Set the task to be executed while waiting for I2C transactions to complete. */
-    //FXOS8700_I2C_SetIdleTask(&FXOS8700drv, (registeridlefunction_t)SMC_SetPowerModeVlpr, SMC);
-
-    /*! Configure the fxos8700 sensor driver. */
-    status = FXOS8700_I2C_Configure(&FXOS8700drv, fxos8700_Config_Hybrid);
-    if (SENSOR_ERROR_NONE != status)
-    {
-        PRINTF("\r\n FXOS8700 Sensor Configuration Failed, Err = %d\r\n", status);
-        return -1;
-    }
-    PRINTF("\r\n Successfully Applied FXOS8700 Sensor Configuration\r\n");
-
-    for (;;) /* Forever loop */
-    {
-        /*! Wait for data ready from the FXOS8700. */
-        status = FXOS8700_I2C_ReadData(&FXOS8700drv, FXOS8700_STATUS_READ, &dataReady);
-        if (0 == (dataReady & FXOS8700_DR_STATUS_ZYXDR_MASK))
-        { /* Loop, if new sample is not available. */
-            continue;
-        }
-
-        /*! Read the raw sensor data from the fxos8700. */
-        status = FXOS8700_I2C_ReadData(&FXOS8700drv, FXOS8700_ACCELMAG_READ, data);
-        if (ARM_DRIVER_OK != status)
-        {
-            PRINTF("\r\n Read Failed. \r\n");
-            return -1;
-        }
-
-        /*! Convert the raw sensor data to signed 16-bit container for display to the debug port. */
-        rawData.accel[0] = ((int16_t)data[0] << 8) | data[1];
-        rawData.accel[0] /= 4;
-        rawData.accel[1] = ((int16_t)data[2] << 8) | data[3];
-        rawData.accel[1] /= 4;
-        rawData.accel[2] = ((int16_t)data[4] << 8) | data[5];
-        rawData.accel[2] /= 4;
-        rawData.mag[0] = ((int16_t)data[6] << 8) | data[7];
-        rawData.mag[1] = ((int16_t)data[8] << 8) | data[9];
-        rawData.mag[2] = ((int16_t)data[10] << 8) | data[11];
-
-        /* NOTE: PRINTF is relatively expensive in terms of CPU time, specially when used with-in execution loop. */
-        PRINTF("\r\n Accel X = %d  Y = %d  Z = %d\r\n", rawData.accel[0], rawData.accel[1], rawData.accel[2]);
-        PRINTF("\r\n Mag   X = %d  Y = %d  Z = %d\r\n", rawData.mag[0], rawData.mag[1], rawData.mag[2]);
-        ASK_USER_TO_RESUME(50); /* Ask for user input after processing 100 samples. */
-    }
-}
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/fxos8700_poll_niobe4_v3_9.xml b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/fxos8700_poll_niobe4_v3_9.xml
deleted file mode 100644
index a08a73ce2..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/fxos8700_poll_niobe4_v3_9.xml
+++ /dev/null
@@ -1,159 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<ksdk:examples xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd manifest.xsd">
-  <externalDefinitions>
-    <definition extID="cm33_core0_LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.gpio_lpc.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_dma.LPC55S69"/>
-    <definition extID="platform.drivers.gint.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_i2c_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_spi_cmsis.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_dma.LPC55S69"/>
-    <definition extID="platform.drivers.flexcomm_usart_cmsis.LPC55S69"/>
-    <definition extID="middleware.issdk.drivers.systick_utils.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.interface.common.LPC55S69"/>
-    <definition extID="middleware.issdk.sensor.fxos8700.LPC55S69"/>
-    <definition extID="platform.drivers.common.LPC55S69"/>
-    <definition extID="platform.drivers.clock.LPC55S69"/>
-    <definition extID="platform.drivers.power.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_iocon.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux.LPC55S69"/>
-    <definition extID="platform.drivers.inputmux_connections.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_CMSIS.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_startup.LPC55S69"/>
-    <definition extID="platform.drivers.lpc_gpio.LPC55S69"/>
-    <definition extID="platform.utilities.assert.LPC55S69"/>
-    <definition extID="utility.debug_console.LPC55S69"/>
-    <definition extID="component.usart_adapter.LPC55S69"/>
-    <definition extID="component.serial_manager.LPC55S69"/>
-    <definition extID="component.lists.LPC55S69"/>
-    <definition extID="component.serial_manager_uart.LPC55S69"/>
-    <definition extID="platform.drivers.reset.LPC55S69"/>
-    <definition extID="CMSIS_Include_core_cm.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.I2C.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.Common.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.SPI.LPC55S69"/>
-    <definition extID="CMSIS_Driver_Include.USART.LPC55S69"/>
-    <definition extID="platform.utilities.misc_utilities.LPC55S69"/>
-    <definition extID="platform.devices.LPC55S69_system.LPC55S69"/>
-    <definition extID="iar"/>
-    <definition extID="mdk"/>
-    <definition extID="armgcc"/>
-    <definition extID="mcuxpresso"/>
-    <definition extID="com.nxp.mcuxpresso"/>
-  </externalDefinitions>
-  <example id="lpcxpresso55s69_agm01_fxos8700_poll_niobe4" name="fxos8700_poll_niobe4" device_core="cm33_core0_LPC55S69" dependency="middleware.issdk.drivers.gpio_lpc.LPC55S69 platform.drivers.lpc_dma.LPC55S69 platform.drivers.gint.LPC55S69 platform.drivers.flexcomm.LPC55S69 platform.drivers.flexcomm_i2c.LPC55S69 platform.drivers.flexcomm_i2c_dma.LPC55S69 platform.drivers.flexcomm_i2c_cmsis.LPC55S69 platform.drivers.flexcomm_spi.LPC55S69 platform.drivers.flexcomm_spi_dma.LPC55S69 platform.drivers.flexcomm_spi_cmsis.LPC55S69 platform.drivers.flexcomm_usart.LPC55S69 platform.drivers.flexcomm_usart_dma.LPC55S69 platform.drivers.flexcomm_usart_cmsis.LPC55S69 middleware.issdk.drivers.systick_utils.LPC55S69 middleware.issdk.sensor.interface.common.LPC55S69 middleware.issdk.sensor.fxos8700.LPC55S69 platform.drivers.common.LPC55S69 platform.drivers.clock.LPC55S69 platform.drivers.power.LPC55S69 platform.drivers.lpc_iocon.LPC55S69 platform.drivers.inputmux.LPC55S69 platform.drivers.inputmux_connections.LPC55S69 platform.devices.LPC55S69_CMSIS.LPC55S69 platform.devices.LPC55S69_startup.LPC55S69 platform.drivers.lpc_gpio.LPC55S69 platform.utilities.assert.LPC55S69 utility.debug_console.LPC55S69 component.usart_adapter.LPC55S69 component.serial_manager.LPC55S69 component.lists.LPC55S69 component.serial_manager_uart.LPC55S69 platform.drivers.reset.LPC55S69 CMSIS_Include_core_cm.LPC55S69 CMSIS_Driver_Include.I2C.LPC55S69 CMSIS_Driver_Include.Common.LPC55S69 CMSIS_Driver_Include.SPI.LPC55S69 CMSIS_Driver_Include.USART.LPC55S69 platform.utilities.misc_utilities.LPC55S69 platform.devices.LPC55S69_system.LPC55S69" category="issdk/sensors">
-    <projects>
-      <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
-    </projects>
-    <toolchainSettings>
-      <toolchainSetting id_refs="com.nxp.mcuxpresso">
-        <option id="gnu.c.compiler.option.preprocessor.def.symbols" type="stringList">
-          <value>CPU_LPC55S69JBD100_cm33_core0</value>
-          <value>PRINTF_ADVANCED_ENABLE=1</value>
-          <value>SERIAL_PORT_TYPE_UART=1</value>
-          <value>MCUXPRESSO_SDK</value>
-        </option>
-        <option id="com.crt.advproject.gas.fpu" type="enum">
-          <value>com.crt.advproject.gas.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="com.crt.advproject.gcc.fpu" type="enum">
-          <value>com.crt.advproject.gcc.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.compiler.option.optimization.flags" type="string">
-          <value>-fno-common</value>
-        </option>
-        <option id="com.crt.advproject.c.misc.dialect" type="enum">
-          <value>com.crt.advproject.misc.dialect.gnu99</value>
-        </option>
-        <option id="gnu.c.compiler.option.misc.other" type="string">
-          <value>-mcpu=cortex-m33 -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin</value>
-        </option>
-        <option id="gnu.c.compiler.option.warnings.allwarn" type="boolean">
-          <value>false</value>
-        </option>
-        <option id="com.crt.advproject.link.fpu" type="enum">
-          <value>com.crt.advproject.link.fpu.fpv5sp.hard</value>
-        </option>
-        <option id="gnu.c.link.option.nostdlibs" type="boolean">
-          <value>true</value>
-        </option>
-      </toolchainSetting>
-    </toolchainSettings>
-    <include_paths>
-      <include_path path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include"/>
-      <include_path path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="board" type="c_include"/>
-    </include_paths>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/iar" project_relative_path="./" type="workspace" toolchain="iar">
-      <files mask="fxos8700_poll_niobe4.ewd"/>
-      <files mask="fxos8700_poll_niobe4.ewp"/>
-      <files mask="fxos8700_poll_niobe4.eww"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/mdk" project_relative_path="./" type="workspace" toolchain="mdk">
-      <files mask="fxos8700_poll_niobe4.uvprojx"/>
-      <files mask="fxos8700_poll_niobe4.uvoptx"/>
-      <files mask="JLinkSettings.JLinkScript"/>
-      <files mask="JLinkSettings.ini"/>
-      <files mask="fxos8700_poll_niobe4.uvmpw"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc" project_relative_path="./" type="workspace" toolchain="armgcc">
-      <files mask="build_all.bat"/>
-      <files mask="build_all.sh"/>
-      <files mask="clean.bat"/>
-      <files mask="clean.sh"/>
-      <files mask="CMakeLists.txt"/>
-      <files mask="flags.cmake"/>
-      <files mask="config.cmake"/>
-      <files mask="build_debug.bat"/>
-      <files mask="build_debug.sh"/>
-      <files mask="build_release.bat"/>
-      <files mask="build_release.sh"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="src">
-      <files mask="lpc55s69.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01" project_relative_path="board" type="c_include">
-      <files mask="lpc55s69.h"/>
-      <files mask="frdm_stbc_agm01_shield.h"/>
-      <files mask="issdk_hal.h"/>
-      <files mask="RTE_Device.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="source" type="src">
-      <files mask="fxos8700_poll.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="board" type="src">
-      <files mask="pin_mux.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="board" type="c_include">
-      <files mask="pin_mux.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="doc" type="doc">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="board" type="src">
-      <files mask="board.c"/>
-      <files mask="clock_config.c"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="board" type="c_include">
-      <files mask="board.h"/>
-      <files mask="clock_config.h"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll" project_relative_path="doc" type="doc" toolchain="iar mdk mcuxpresso">
-      <files mask="readme.txt"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/iar" project_relative_path="LPC55S69/iar" type="linker" toolchain="iar">
-      <files mask="LPC55S69_cm33_core0_flash.icf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/mdk" project_relative_path="LPC55S69/arm" type="linker" toolchain="mdk">
-      <files mask="LPC55S69_cm33_core0_flash.scf"/>
-    </source>
-    <source path="boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/armgcc" project_relative_path="LPC55S69/gcc" type="linker" toolchain="armgcc">
-      <files mask="LPC55S69_cm33_core0_flash.ld"/>
-    </source>
-  </example>
-</ksdk:examples>
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/pin_mux.c b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/pin_mux.c
deleted file mode 100644
index e68e17d70..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/pin_mux.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v6.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 0.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_iocon.h"
-#include "pin_mux.h"
-#include "fsl_power.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitPins(void)
-{
-    /* set BOD VBAT level to 1.65V */
-    POWER_SetBodVbatLevel(kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false);
-
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: enabled}
-  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: enabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC5 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is enabled */
-                                         IOCON_PIO_OPENDRAIN_EN);
-    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-I2C4_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '30', peripheral: GPIO, signal: 'PIO1, 21', pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : I2C4_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void I2C4_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-
-    const uint32_t port1_pin21_config = (/* Pin is configured as PIO1_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN21 (coords: 30) is configured as PIO1_21 */
-    IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC1 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-USART0_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '92', peripheral: GPIO, signal: 'PIO0, 29', pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '94', peripheral: GPIO, signal: 'PIO0, 30', pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : USART0_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void USART0_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin29_config = (/* Pin is configured as PIO0_29 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as PIO0_29 */
-    IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
-
-    const uint32_t port0_pin30_config = (/* Pin is configured as PIO0_30 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* No addition pin function */
-                                         IOCON_PIO_MODE_INACT |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as PIO0_30 */
-    IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_InitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: FLEXCOMM7, signal: RTS_SCL_SSEL1, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_InitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as FC7_RTS_SCL_SSEL1 */
-                                         IOCON_PIO_FUNC1 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as FC7_RTS_SCL_SSEL1 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-SPI7_DeinitPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '90', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: GPIO, signal: 'PIO0, 20', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '76', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : SPI7_DeinitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void SPI7_DeinitPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t port0_pin19_config = (/* Pin is configured as PIO0_19 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as PIO0_19 */
-    IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
-
-    const uint32_t port0_pin20_config = (/* Pin is configured as PIO0_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as PIO0_20 */
-    IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
-
-    const uint32_t port0_pin21_config = (/* Pin is configured as PIO0_21 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as PIO0_21 */
-    IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
-
-    const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
-                                         IOCON_PIO_FUNC0 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
-    IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/pin_mux.h b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/pin_mux.h
deleted file mode 100644
index 8c1307b13..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/pin_mux.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u   /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC5 0x05u          /*!<@brief Selects pin function 5 */
-#define IOCON_PIO_INV_DI 0x00u         /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u    /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_EN 0x0200u /*!<@brief Open drain is enabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u  /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void I2C4_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void USART0_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void SPI7_DeinitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/readme.txt b/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/readme.txt
deleted file mode 100644
index 9c999af27..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_examples/sensors/fxos8700/fxos8700_poll/readme.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-Hardware requirements
-===================
-- Mini/micro USB cable
-- LPCXpresso55s69 board
-- FRDM-STBC-AGM01 board
-- Personal Computer
-
-Board settings
-==============
-On FRDM-STBC-AGM01 sensor shield board:
---------------------------------------
-For I2C Mode: The examples use I2C1 and Pins 2-3 of Jumpers J6 and J7 on FRDM-STBC-AGM01 should be connected.
-For SPI Mode: The examples use SPI0 and the FRDM-STBC-AGM01 needs to be rewired for SPI which requires removal of Resistor R3.
-
-Demo Overview
-============
-The FXOS8700 Normal example application demonstrates the use of the FXOS8700 sensor in the hybrid(Accel + Mag) mode.
-The example demonstrates configuration of all registers required to put the sensor into hybrid mode and read out samples.
-
-The application consistently checks for the data ready flag and reads out the sample when its ready.
-
-Prepare the Demo
-===============
-1.  Connect a USB cable between the host PC and the OpenSDA USB port on the target board.
-2.  Open a serial terminal with the following settings:
-    - 115200 baud rate
-    - 8 data bits
-    - No parity
-    - One stop bit
-    - No flow control
-3.  Download the program to the target board.
-4.  Either press the reset button on your board or launch the debugger in your IDE to begin running the demo.
-
-Running the demo
-===============
-When the demo runs successfully, you can see the Samples printed to the terminal.
-
-Note: you must rotate the board to get the samples to change.
diff --git a/boards/lpcxpresso55s69_agm01/issdk_hal.h b/boards/lpcxpresso55s69_agm01/issdk_hal.h
deleted file mode 100644
index 323928672..000000000
--- a/boards/lpcxpresso55s69_agm01/issdk_hal.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2015, Freescale Semiconductor, Inc.
- * Copyright 2016-2017 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/**
- * @file issdk_hal.h
- * @brief Wrapper for Hardware Abstraction Layer (HAL)
-
-    This file simply provides one level of indirection for the developer
-    to select the particular Hardware Abstraction Layer they would like to use.
-*/
-
-#ifndef __ISSDK_HAL_H__
-#define __ISSDK_HAL_H__
-
-#include "fsl_i2c_cmsis.h"
-#include "fsl_spi_cmsis.h"
-#include "fsl_usart_cmsis.h"
-
-#include "lpc55s69.h"               //Include appropriate MCU board header file
-#include "frdm_stbc_agm01_shield.h" //Include appropriate sensor shield board header file
-
-// Pin mapping and driver information for default I2C brought to shield
-// By default, we use I2C_S1 defined in the lpc55s69.h file.
-// Other options: I2C_S2.
-// S1 is on D15:14.  S2 is on A5:4.
-#define I2C_S_SCL_PIN      I2C_S1_SCL_PIN
-#define I2C_S_SDA_PIN      I2C_S1_SDA_PIN
-#define I2C_S_DRIVER       I2C_S1_DRIVER
-#define I2C_S_SIGNAL_EVENT I2C_S1_SIGNAL_EVENT
-#define I2C_S_DEVICE_INDEX I2C_S1_DEVICE_INDEX
-
-#endif // __ISSDK_HAL_H__
diff --git a/boards/lpcxpresso55s69_agm01/lpc55s69.c b/boards/lpcxpresso55s69_agm01/lpc55s69.c
deleted file mode 100644
index 906cce4f0..000000000
--- a/boards/lpcxpresso55s69_agm01/lpc55s69.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright 2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/**
- * @file lpc55s69.c
- * @brief The lpc55s69.c file defines GPIO pins and I2C CMSIS utilities for LPCXpresso55s69 board.
- */
-
-#include "lpc55s69.h"
-
-// I2C4 Pin Handles
-/* [PIO1_21] (coords: 30) configured as FC4_RXD_SDA_MOSI */
-gpioHandleKSDK_t D14 = {
-    .base = GPIO, .pinNumber = 21, .mask = 1 << (21), .clockName = kCLOCK_Gpio1, .portNumber = kGINT_Port1};
-/* [PIO1_20] (coords: 4) configured as FC4_TXD_SCL_MISO */
-gpioHandleKSDK_t D15 = {
-    .base = GPIO, .pinNumber = 20, .mask = 1 << (20), .clockName = kCLOCK_Gpio1, .portNumber = kGINT_Port1};
-
-// SPI7 Handle
-/* [PIO0_20] (coords: 74) configured as SPI master-out/slave-in (MOSI) data */
-gpioHandleKSDK_t D11 = {
-    .base = GPIO, .pinNumber = 20, .mask = 1 << (20), .clockName = kCLOCK_Gpio0, .portNumber = kGINT_Port0};
-/* [PIO0_19] (coords: 90) is configured as SPI master-in/slave-out (MISO) data */
-gpioHandleKSDK_t D12 = {
-    .base = GPIO, .pinNumber = 19, .mask = 1 << (19), .clockName = kCLOCK_Gpio0, .portNumber = kGINT_Port0};
-/* [PIO0_21] (coords: 76) configured as SPI SCK */
-gpioHandleKSDK_t D13 = {
-    .base = GPIO, .pinNumber = 21, .mask = 1 << (21), .clockName = kCLOCK_Gpio0, .portNumber = kGINT_Port0};
-
-// UART0 Handle
-/* [PIO0_29] (coords: 92) configured as USART RXD */
-gpioHandleKSDK_t D0 = {
-    .base = GPIO, .pinNumber = 29, .mask = 1 << (29), .clockName = kCLOCK_Gpio0, .portNumber = kGINT_Port0};
-/* [PIO0_30] (coords: 94) configured as USART TXD */
-gpioHandleKSDK_t D1 = {
-    .base = GPIO, .pinNumber = 30, .mask = 1 << (30), .clockName = kCLOCK_Gpio0, .portNumber = kGINT_Port0};
-
-// LPCXpresso55s69 Internal Peripheral Pin Definitions
-gpioHandleKSDK_t RED_LED = {
-    .base = GPIO, .pinNumber = 4, .mask = 1 << (4), .clockName = kCLOCK_Gpio1, .portNumber = kGINT_Port1};
-gpioHandleKSDK_t GREEN_LED = {
-    .base = GPIO, .pinNumber = 7, .mask = 1 << (7), .clockName = kCLOCK_Gpio1, .portNumber = kGINT_Port1};
-gpioHandleKSDK_t BLUE_LED = {
-    .base = GPIO, .pinNumber = 6, .mask = 1 << (6), .clockName = kCLOCK_Gpio1, .portNumber = kGINT_Port1};
-
-/*!
- * @brief Kinetis style Wrapper API for handling all Clock related configurations.
- *
- * @param void
- * @return void
- */
-void BOARD_BootClockRUN(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM0 (debug/UART0) */
-    CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
-    /* attach 12 MHz clock to FLEXCOMM4 (I2C4) */
-    CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
-    /* attach 12 MHz clock to FLEXCOMM4 (SPI7) */
-    CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7);
-    /* Configure FROHF96M Clock */
-    BOARD_BootClockPLL150M();
-}
-
-/*!
- * @brief Configures the system to WAIT power mode.
- *        API name used from Kinetis family to maintain compatibility.
- *
- * @param Power peripheral base address (dummy).
- * @return Configuration error code.
- */
-status_t SMC_SetPowerModeWait(void *arg)
-{
-    // POWER_EnterSleep();
-
-    return kStatus_Success;
-}
-
-/*!
- * @brief Configures the system to VLPR power mode.
- *        API name used from Kinetis family to maintain compatibility.
- *
- * @param Power peripheral base address (dummy).
- * @return Configuration error code.
- */
-status_t SMC_SetPowerModeVlpr(void *arg)
-{
-    POWER_EnterSleep();
-
-    return kStatus_Success;
-}
-
-/*! @brief       Determines the Clock Frequency feature.
- *  @details     The Clock Frequecny computation API required by fsl_uart_cmsis.c.
- *  @param[in]   void
- *  @Constraints None
- *  @Reentrant   Yes
- *  @return      uint32_t Returns the clock frequency .
- */
-uint32_t USART0_GetFreq(void)
-{
-    return CLOCK_GetFlexCommClkFreq(0U);
-}
-
-/*! @brief       Determines the Clock Frequency feature.
- *  @details     The Clock Frequecny computation API required by fsl_i2c_cmsis.c.
- *  @param[in]   void
- *  @Constraints None
- *  @Reentrant   Yes
- *  @return      uint32_t Returns the clock frequency .
- */
-uint32_t I2C4_GetFreq(void)
-{
-    return CLOCK_GetFlexCommClkFreq(4U);
-}
-
-/*! @brief       Determines the Clock Frequency feature.
- *  @details     The Clock Frequecny computation API required by fsl_spi_cmsis.c.
- *  @param[in]   void
- *  @Constraints None
- *  @Reentrant   Yes
- *  @return      uint32_t Returns the clock frequency .
- */
-uint32_t SPI7_GetFreq(void)
-{
-    return CLOCK_GetFlexCommClkFreq(7U);
-}
diff --git a/boards/lpcxpresso55s69_agm01/lpc55s69.h b/boards/lpcxpresso55s69_agm01/lpc55s69.h
deleted file mode 100644
index 13f476dff..000000000
--- a/boards/lpcxpresso55s69_agm01/lpc55s69.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright 2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-/**
- * @file lpc55s69.h
- * @brief The lpc55s69.h file defines GPIO pin mappings for LPCXpresso55S69 board
- */
-
-#ifndef LPC55S69_H_
-#define LPC55S69_H_
-
-#include "pin_mux.h"
-#include "fsl_power.h"
-#include "RTE_Device.h"
-#include "gpio_driver.h"
-#include "clock_config.h"
-
-#define PORT0 0
-#define PORT1 1
-
-// I2C4 Pin Handles
-extern gpioHandleKSDK_t D14;
-extern gpioHandleKSDK_t D15;
-
-// SPI7 Handles
-extern gpioHandleKSDK_t D11;
-extern gpioHandleKSDK_t D12;
-extern gpioHandleKSDK_t D13;
-
-// UART0 Handle
-extern gpioHandleKSDK_t D0;
-extern gpioHandleKSDK_t D1;
-
-// LPCXpresso54114 Internal Peripheral Pin Definitions
-extern gpioHandleKSDK_t RED_LED;
-extern gpioHandleKSDK_t GREEN_LED;
-extern gpioHandleKSDK_t BLUE_LED;
-
-// I2C_S1: Pin mapping and driver information for default I2C brought to shield
-#define I2C_S1_SCL_PIN      D15
-#define I2C_S1_SDA_PIN      D14
-#define I2C_S1_DRIVER       Driver_I2C4
-#define I2C_S1_DEVICE_INDEX I2C4_INDEX
-#define I2C_S1_SIGNAL_EVENT I2C4_SignalEvent_t
-
-// SPI_S: Pin mapping and driver information default SPI brought to shield
-#define SPI_S_DRIVER       Driver_SPI7
-#define SPI_S_BAUDRATE     500000U ///< Transfer baudrate - 500k
-#define SPI_S_DEVICE_INDEX SPI7_INDEX
-#define SPI_S_SIGNAL_EVENT SPI7_SignalEvent_t
-
-// UART: Driver information for default UART to communicate with HOST PC.
-#define HOST_S_DRIVER       Driver_USART0
-#define HOST_S_SIGNAL_EVENT HOST_SignalEvent_t
-#define HOST_B_DRIVER       Driver_USART1
-#define HOST_B_SIGNAL_EVENT HOST_SignalEvent_t
-
-/* @brief  Ask use input to resume after specified samples have been processed. */
-#define ASK_USER_TO_RESUME(x)                                                          \
-    static bool askResume            = true;                                           \
-    static uint16_t samplesToProcess = x - 1;                                          \
-    if (askResume && !samplesToProcess--)                                              \
-    {                                                                                  \
-        PRINTF("\r\n Specified samples processed, press any key to continue... \r\n"); \
-        GETCHAR();                                                                     \
-        askResume = false;                                                             \
-    }
-
-/* @brief dummy arguement to Power Mode Wait Wrapper. */
-#define SMC NULL
-
-/* @brief Kinetis style Wrapper API for Power Mode Wait (Wait for Interrupt). */
-status_t SMC_SetPowerModeWait(void *arg);
-/* @brief Kinetis style Wrapper API for Power Mode VLPR (Wait for Interrupt). */
-status_t SMC_SetPowerModeVlpr(void *arg);
-/* @brief Kinetis style Wrapper API for handling all Clock related configurations. */
-void BOARD_BootClockRUN(void);
-#endif /* LPC55S69_CM4_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/lpcxpresso55s69_agm01.png b/boards/lpcxpresso55s69_agm01/lpcxpresso55s69_agm01.png
deleted file mode 100644
index 52d1c2483..000000000
Binary files a/boards/lpcxpresso55s69_agm01/lpcxpresso55s69_agm01.png and /dev/null differ
diff --git a/boards/lpcxpresso55s69_agm01/project_template/board.c b/boards/lpcxpresso55s69_agm01/project_template/board.c
deleted file mode 100644
index c742b74f3..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/board.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * Copyright (c) 2015, Freescale Semiconductor, Inc.
- * Copyright 2016, 2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <stdint.h>
-#include "fsl_common.h"
-#include "fsl_debug_console.h"
-#include "board.h"
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-#include "fsl_i2c.h"
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-#if defined BOARD_USE_CODEC
-#include "fsl_wm8904.h"
-#endif
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-
-#if defined BOARD_USE_CODEC
-codec_config_t boardCodecConfig = {
-    .I2C_SendFunc    = BOARD_Codec_I2C_Send,
-    .I2C_ReceiveFunc = BOARD_Codec_I2C_Receive,
-    .op              = &wm8904_ops,
-};
-#endif
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/* Initialize debug console. */
-void BOARD_InitDebugConsole(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM0 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
-}
-
-void BOARD_InitDebugConsole_Core1(void)
-{
-    /* attach 12 MHz clock to FLEXCOMM1 (debug console) */
-    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
-
-    RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
-
-    uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ_CORE1;
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1, BOARD_DEBUG_UART_TYPE_CORE1,
-                    uartClkSrcFreq);
-}
-
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz)
-{
-    i2c_master_config_t i2cConfig = {0};
-
-    I2C_MasterGetDefaultConfig(&i2cConfig);
-    I2C_MasterInit(base, &i2cConfig, clkSrc_Hz);
-}
-
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.direction      = kI2C_Write;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = txBuff;
-    masterXfer.dataSize       = txBuffSize;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize)
-{
-    i2c_master_transfer_t masterXfer;
-
-    /* Prepare transfer structure. */
-    masterXfer.slaveAddress   = deviceAddress;
-    masterXfer.subaddress     = subAddress;
-    masterXfer.subaddressSize = subaddressSize;
-    masterXfer.data           = rxBuff;
-    masterXfer.dataSize       = rxBuffSize;
-    masterXfer.direction      = kI2C_Read;
-    masterXfer.flags          = kI2C_TransferDefaultFlag;
-
-    return I2C_MasterTransferBlocking(base, &masterXfer);
-}
-
-void BOARD_Codec_I2C_Init(void)
-{
-    BOARD_I2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
-{
-    return BOARD_I2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
-                          txBuffSize);
-}
-
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_I2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
-}
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
diff --git a/boards/lpcxpresso55s69_agm01/project_template/board.h b/boards/lpcxpresso55s69_agm01/project_template/board.h
deleted file mode 100644
index 0839a152f..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/board.h
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include "clock_config.h"
-#include "fsl_common.h"
-#include "fsl_reset.h"
-#include "fsl_gpio.h"
-#include "fsl_iocon.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-/*! @brief The board name */
-#define BOARD_NAME "LPCXpresso5500"
-
-/*! @brief The UART to use for debug messages. */
-/* TODO: rename UART to USART */
-#define BOARD_DEBUG_UART_TYPE       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR   (uint32_t) USART0
-#define BOARD_DEBUG_UART_INSTANCE   0U
-#define BOARD_DEBUG_UART_CLK_FREQ   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM0
-#define BOARD_DEBUG_UART_RST        kFC0_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC     kCLOCK_Flexcomm0
-#define BOARD_UART_IRQ_HANDLER      FLEXCOMM0_IRQHandler
-#define BOARD_UART_IRQ              FLEXCOMM0_IRQn
-
-#define BOARD_ACCEL_I2C_BASEADDR   I2C4
-#define BOARD_ACCEL_I2C_CLOCK_FREQ 12000000
-
-#define BOARD_DEBUG_UART_TYPE_CORE1       kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR_CORE1   (uint32_t) USART1
-#define BOARD_DEBUG_UART_INSTANCE_CORE1   1U
-#define BOARD_DEBUG_UART_CLK_FREQ_CORE1   12000000U
-#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM1
-#define BOARD_DEBUG_UART_RST_CORE1        kFC1_RST_SHIFT_RSTn
-#define BOARD_DEBUG_UART_CLKSRC_CORE1     kCLOCK_Flexcomm1
-#define BOARD_UART_IRQ_HANDLER_CORE1      FLEXCOMM1_IRQHandler
-#define BOARD_UART_IRQ_CORE1              FLEXCOMM1_IRQn
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE
-#define BOARD_DEBUG_UART_BAUDRATE 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE */
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
-#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200U
-#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
-
-#define BOARD_CODEC_I2C_BASEADDR   I2C4
-#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
-
-#ifndef BOARD_LED_RED_GPIO
-#define BOARD_LED_RED_GPIO GPIO
-#endif
-#define BOARD_LED_RED_GPIO_PORT 1U
-#ifndef BOARD_LED_RED_GPIO_PIN
-#define BOARD_LED_RED_GPIO_PIN 6U
-#endif
-
-#ifndef BOARD_LED_BLUE_GPIO
-#define BOARD_LED_BLUE_GPIO GPIO
-#endif
-#define BOARD_LED_BLUE_GPIO_PORT 1U
-#ifndef BOARD_LED_BLUE_GPIO_PIN
-#define BOARD_LED_BLUE_GPIO_PIN 4U
-#endif
-
-#ifndef BOARD_LED_GREEN_GPIO
-#define BOARD_LED_GREEN_GPIO GPIO
-#endif
-#define BOARD_LED_GREEN_GPIO_PORT 1U
-#ifndef BOARD_LED_GREEN_GPIO_PIN
-#define BOARD_LED_GREEN_GPIO_PIN 7U
-#endif
-
-#ifndef BOARD_SW1_GPIO
-#define BOARD_SW1_GPIO GPIO
-#endif
-#define BOARD_SW1_GPIO_PORT 0U
-#ifndef BOARD_SW1_GPIO_PIN
-#define BOARD_SW1_GPIO_PIN 5U
-#endif
-#define BOARD_SW1_NAME        "SW1"
-#define BOARD_SW1_IRQ         PIN_INT0_IRQn
-#define BOARD_SW1_IRQ_HANDLER PIN_INT0_IRQHandler
-
-#ifndef BOARD_SW2_GPIO
-#define BOARD_SW2_GPIO GPIO
-#endif
-#define BOARD_SW2_GPIO_PORT 1U
-#ifndef BOARD_SW2_GPIO_PIN
-#define BOARD_SW2_GPIO_PIN 18U
-#endif
-#define BOARD_SW2_NAME              "SW2"
-#define BOARD_SW2_IRQ               PIN_INT1_IRQn
-#define BOARD_SW2_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW2_GPIO_PININT_INDEX 1
-
-#ifndef BOARD_SW3_GPIO
-#define BOARD_SW3_GPIO GPIO
-#endif
-#define BOARD_SW3_GPIO_PORT 1U
-#ifndef BOARD_SW3_GPIO_PIN
-#define BOARD_SW3_GPIO_PIN 9U
-#endif
-#define BOARD_SW3_NAME              "SW3"
-#define BOARD_SW3_IRQ               PIN_INT1_IRQn
-#define BOARD_SW3_IRQ_HANDLER       PIN_INT1_IRQHandler
-#define BOARD_SW3_GPIO_PININT_INDEX 1
-
-#define BOARD_SDIF_BASEADDR       SDIF
-#define BOARD_SDIF_CLKSRC         kCLOCK_SDio
-#define BOARD_SDIF_CLK_FREQ       CLOCK_GetSdioClkFreq()
-#define BOARD_SDIF_CLK_ATTACH     kMAIN_CLK_to_SDIO_CLK
-#define BOARD_SDIF_IRQ            SDIO_IRQn
-#define BOARD_MMC_VCC_SUPPLY      kMMC_VoltageWindows270to360
-#define BOARD_SD_CARD_DETECT_PIN  17
-#define BOARD_SD_CARD_DETECT_PORT 0
-#define BOARD_SD_CARD_DETECT_GPIO GPIO
-#define BOARD_SD_DETECT_TYPE      kSDMMCHOST_DetectCardByHostCD
-
-#define BOARD_SDIF_CD_GPIO_INIT()                                                                    \
-    {                                                                                                \
-        CLOCK_EnableClock(kCLOCK_Gpio2);                                                             \
-        GPIO_PinInit(BOARD_SD_CARD_DETECT_GPIO, BOARD_SD_CARD_DETECT_PORT, BOARD_SD_CARD_DETECT_PIN, \
-                     &(gpio_pin_config_t){kGPIO_DigitalInput, 0U});                                  \
-    }
-#define BOARD_SDIF_CD_STATUS() \
-    GPIO_PinRead(BOARD_SD_CARD_DETECT_GPIO, BOARD_SD_CARD_DETECT_PORT, BOARD_SD_CARD_DETECT_PIN)
-
-/* Board led color mapping */
-#define LOGIC_LED_ON  0U
-#define LOGIC_LED_OFF 1U
-
-#define BOARD_SDIF_CLK_ATTACH kMAIN_CLK_to_SDIO_CLK
-
-#define LED_RED_INIT(output)                                                                                   \
-    {                                                                                                          \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN,                                \
-                        (IOCON_PIO_FUNC0 | IOCON_PIO_MODE_INACT | IOCON_PIO_SLEW_STANDARD | IOCON_PIO_INV_DI | \
-                         IOCON_PIO_DIGITAL_EN | IOCON_PIO_OPENDRAIN_DI));                                      \
-        GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN,                      \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */          \
-    }
-#define LED_RED_ON()                                            \
-    GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                   1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_RED_OFF()                                                                        \
-    GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT,                                \
-                 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED1 \ \ \ \ \ \ \ \ \ \ \
-                                                */
-#define LED_RED_TOGGLE()                                         \
-    GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
-                    1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_BLUE_INIT(output)                                                                                  \
-    {                                                                                                          \
-        IOCON_PinMuxSet(IOCON, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN,                              \
-                        (IOCON_PIO_FUNC0 | IOCON_PIO_MODE_INACT | IOCON_PIO_SLEW_STANDARD | IOCON_PIO_INV_DI | \
-                         IOCON_PIO_DIGITAL_EN | IOCON_PIO_OPENDRAIN_DI));                                      \
-        GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN,                   \
-                     &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED1 */          \
-    }
-#define LED_BLUE_ON()                                             \
-    GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                   1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_BLUE_OFF()                                          \
-    GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_BLUE_TOGGLE()                                          \
-    GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
-                    1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#define LED_GREEN_INIT(output)                                                              \
-    GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
-                 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED1 */
-#define LED_GREEN_ON()                                              \
-    GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                   1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED1 */
-#define LED_GREEN_OFF()                                           \
-    GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED1 */
-#define LED_GREEN_TOGGLE()                                           \
-    GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
-                    1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED1 */
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus */
-
-/*******************************************************************************
- * API
- ******************************************************************************/
-
-void BOARD_InitDebugConsole(void);
-void BOARD_InitDebugConsole_Core1(void);
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz);
-status_t BOARD_I2C_Send(I2C_Type *base,
-                        uint8_t deviceAddress,
-                        uint32_t subAddress,
-                        uint8_t subaddressSize,
-                        uint8_t *txBuff,
-                        uint8_t txBuffSize);
-status_t BOARD_I2C_Receive(I2C_Type *base,
-                           uint8_t deviceAddress,
-                           uint32_t subAddress,
-                           uint8_t subaddressSize,
-                           uint8_t *rxBuff,
-                           uint8_t rxBuffSize);
-void BOARD_Accel_I2C_Init(void);
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-void BOARD_Codec_I2C_Init(void);
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus */
-
-#endif /* _BOARD_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/project_template/clock_config.c b/boards/lpcxpresso55s69_agm01/project_template/clock_config.c
deleted file mode 100644
index c028bd783..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/clock_config.c
+++ /dev/null
@@ -1,375 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to set up clock using clock driver functions:
- *
- * 1. Setup clock sources.
- *
- * 2. Set up wait states of the flash.
- *
- * 3. Set up all dividers.
- *
- * 4. Set up all selectors to provide selected clocks.
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v7.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 0.7.2
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_power.h"
-#include "fsl_clock.h"
-#include "clock_config.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockPLL150M();
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO12M
-outputs:
-- {id: System_clock.outFreq, value: 12 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO12M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);     /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);  /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U); /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(
-        12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFROHF96M
-outputs:
-- {id: System_clock.outFreq, value: 96 MHz}
-settings:
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-void BOARD_BootClockFROHF96M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);     /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);  /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U); /* Enable FRO HF(96MHz) output */
-
-    POWER_SetVoltageForFreq(
-        96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL100M
-outputs:
-- {id: System_clock.outFreq, value: 100 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL100M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);     /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);  /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U); /* Enable FRO HF(96MHz) output */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                                /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                               /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                                    /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;               /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK; /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(
-        100000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(100000000U); /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);  /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0); /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
-        .pllsscg = {0x0U, (SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 100000000U,
-        .flags   = PLL_SETUPFLAG_WAITLOCK};
-    CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL150M
-called_from_default_init: true
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);     /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);  /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                                /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                               /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                                    /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;               /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK; /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(
-        150000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U); /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);  /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0); /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
-        .pllsscg = {0x0U, (SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 150000000U,
-        .flags   = PLL_SETUPFLAG_WAITLOCK};
-    CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
-#endif
-}
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockPLL1_150M
-outputs:
-- {id: System_clock.outFreq, value: 150 MHz}
-settings:
-- {id: PLL1_Mode, value: Normal}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
-- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL1M_MULT.scale, value: '150', locked: true}
-- {id: SYSCON.PLL1N_DIV.scale, value: '8', locked: true}
-- {id: SYSCON.PLL1_PDEC.scale, value: '2', locked: true}
-sources:
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-void BOARD_BootClockPLL1_150M(void)
-{
-#ifndef SDK_SECONDARY_CORE
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(150000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(150000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL1 */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
-    const pll_setup_t pll1Setup = {
-        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(53U) | SYSCON_PLL1CTRL_SELP(31U),
-        .pllndec = SYSCON_PLL1NDEC_NDIV(8U),
-        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
-        .pllmdec = SYSCON_PLL1MDEC_MDIV(150U),
-        .pllRate = 150000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK;
-#endif
-}
-
diff --git a/boards/lpcxpresso55s69_agm01/project_template/clock_config.h b/boards/lpcxpresso55s69_agm01/project_template/clock_config.h
deleted file mode 100644
index 1e37f41b5..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/clock_config.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
- * Copyright 2017-2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ 16000000U /*!< Board xtal frequency in Hz */
-#define BOARD_XTAL32K_CLK_HZ 32768U  /*!< Board xtal32K frequency in Hz */
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO12M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockFROHF96M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */
-
-/*******************************************************************************
- * API for BOARD_BootClockFROHF96M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFROHF96M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL100M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL100M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL100M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockPLL150M *********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************* Configuration BOARD_BootClockPLL1_150M ********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKPLL1_150M_CORE_CLOCK       150000000U  /*!< Core clock frequency: 150000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockPLL1_150M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockPLL1_150M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/project_template/peripherals.c b/boards/lpcxpresso55s69_agm01/project_template/peripherals.c
deleted file mode 100644
index 6a8fe20b1..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/peripherals.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright 2017-2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Peripherals v8.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 0.9.7
-board: LPCXpresso55S69
-functionalGroups:
-- name: BOARD_InitPeripherals_cm33_core0
-  UUID: 61d0725d-b300-49cb-9c66-b5edfbf8ffc1
-  called_from_default_init: true
-  selectedCore: cm33_core0
-- name: BOARD_InitPeripherals_cm33_core1
-  UUID: e2041cd4-ebb6-45a5-807f-e0c2dc047d48
-  selectedCore: cm33_core1
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-component:
-- type: 'system'
-- type_id: 'system'
-- global_system_definitions:
-  - user_definitions: ''
-  - user_includes: ''
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/***********************************************************************************************************************
- * Included files
- **********************************************************************************************************************/
-#include "peripherals.h"
-
-/***********************************************************************************************************************
- * BOARD_InitPeripherals_cm33_core0 functional group
- **********************************************************************************************************************/
-/***********************************************************************************************************************
- * NVIC initialization code
- **********************************************************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-instance:
-- name: 'NVIC'
-- type: 'nvic'
-- mode: 'general'
-- custom_name_enabled: 'false'
-- type_id: 'nvic_57b5eef3774cc60acaede6f5b8bddc67'
-- functional_group: 'BOARD_InitPeripherals_cm33_core0'
-- peripheral: 'NVIC'
-- config_sets:
-  - nvic:
-    - interrupt_table: []
-    - interrupts: []
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/* Empty initialization function (commented out)
-static void NVIC_init(void) {
-} */
-
-/***********************************************************************************************************************
- * Initialization functions
- **********************************************************************************************************************/
-void BOARD_InitPeripherals_cm33_core0(void)
-{
-  /* Initialize components */
-}
-
-/***********************************************************************************************************************
- * BOARD_InitBootPeripherals function
- **********************************************************************************************************************/
-void BOARD_InitBootPeripherals(void)
-{
-  BOARD_InitPeripherals_cm33_core0();
-}
diff --git a/boards/lpcxpresso55s69_agm01/project_template/peripherals.h b/boards/lpcxpresso55s69_agm01/project_template/peripherals.h
deleted file mode 100644
index 12787ae0c..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/peripherals.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright 2017-2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PERIPHERALS_H_
-#define _PERIPHERALS_H_
-
-/***********************************************************************************************************************
- * Included files
- **********************************************************************************************************************/
-#include "fsl_common.h"
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus */
-
-/***********************************************************************************************************************
- * Initialization functions
- **********************************************************************************************************************/
-
-void BOARD_InitPeripherals_cm33_core0(void);
-
-/***********************************************************************************************************************
- * BOARD_InitBootPeripherals function
- **********************************************************************************************************************/
-void BOARD_InitBootPeripherals(void);
-
-#if defined(__cplusplus)
-}
-#endif
-
-#endif /* _PERIPHERALS_H_ */
diff --git a/boards/lpcxpresso55s69_agm01/project_template/pin_mux.c b/boards/lpcxpresso55s69_agm01/project_template/pin_mux.c
deleted file mode 100644
index b4897c3bc..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/pin_mux.c
+++ /dev/null
@@ -1,826 +0,0 @@
-/*
- * Copyright 2017-2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v8.0
-processor: LPC55S69
-package_id: LPC55S69JBD100
-mcu_data: ksdk2_0
-processor_version: 0.9.7
-board: LPCXpresso55S69
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_gpio.h"
-#include "fsl_iocon.h"
-#include "pin_mux.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitDEBUG_UARTPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitDEBUG_UARTPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitDEBUG_UARTPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitDEBUG_UARTPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t DEBUG_UART_RX = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
-                                    IOCON_PIO_FUNC1 |
-                                    /* No addition pin function */
-                                    IOCON_PIO_MODE_INACT |
-                                    /* Standard mode, output slew rate control is enabled */
-                                    IOCON_PIO_SLEW_STANDARD |
-                                    /* Input function is not inverted */
-                                    IOCON_PIO_INV_DI |
-                                    /* Enables digital function */
-                                    IOCON_PIO_DIGITAL_EN |
-                                    /* Open drain is disabled */
-                                    IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, DEBUG_UART_RX);
-
-    const uint32_t DEBUG_UART_TX = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
-                                    IOCON_PIO_FUNC1 |
-                                    /* No addition pin function */
-                                    IOCON_PIO_MODE_INACT |
-                                    /* Standard mode, output slew rate control is enabled */
-                                    IOCON_PIO_SLEW_STANDARD |
-                                    /* Input function is not inverted */
-                                    IOCON_PIO_INV_DI |
-                                    /* Enables digital function */
-                                    IOCON_PIO_DIGITAL_EN |
-                                    /* Open drain is disabled */
-                                    IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, DEBUG_UART_TX);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitSWD_DEBUGPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '13', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9, mode: pullDown,
-    slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
-  - {pin_num: '12', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
-  - {pin_num: '21', peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1, identifier: DEBUG_SWD_SWO,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitSWD_DEBUGPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitSWD_DEBUGPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t DEBUG_SWD_SWO = (/* Pin is configured as SWO */
-                                    IOCON_PIO_FUNC6 |
-                                    /* No addition pin function */
-                                    IOCON_PIO_MODE_INACT |
-                                    /* Standard mode, output slew rate control is enabled */
-                                    IOCON_PIO_SLEW_STANDARD |
-                                    /* Input function is not inverted */
-                                    IOCON_PIO_INV_DI |
-                                    /* Enables digital function */
-                                    IOCON_PIO_DIGITAL_EN |
-                                    /* Open drain is disabled */
-                                    IOCON_PIO_OPENDRAIN_DI |
-                                    /* Analog switch is open (disabled) */
-                                    IOCON_PIO_ASW_DI);
-    /* PORT0 PIN10 (coords: 21) is configured as SWO */
-    IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN, DEBUG_SWD_SWO);
-
-    if (Chip_GetVersion()==1)
-    {
-        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
-                                           IOCON_PIO_FUNC6 |
-                                           /* Selects pull-down function */
-                                           IOCON_PIO_MODE_PULLDOWN |
-                                           /* Standard mode, output slew rate control is enabled */
-                                           IOCON_PIO_SLEW_STANDARD |
-                                           /* Input function is not inverted */
-                                           IOCON_PIO_INV_DI |
-                                           /* Enables digital function */
-                                           IOCON_PIO_DIGITAL_EN |
-                                           /* Open drain is disabled */
-                                           IOCON_PIO_OPENDRAIN_DI |
-                                           /* Analog switch is closed (enabled) */
-                                           IOCON_PIO_ASW_EN);
-        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
-        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
-    }
-    else
-    {
-        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
-                                           IOCON_PIO_FUNC6 |
-                                           /* Selects pull-down function */
-                                           IOCON_PIO_MODE_PULLDOWN |
-                                           /* Standard mode, output slew rate control is enabled */
-                                           IOCON_PIO_SLEW_STANDARD |
-                                           /* Input function is not inverted */
-                                           IOCON_PIO_INV_DI |
-                                           /* Enables digital function */
-                                           IOCON_PIO_DIGITAL_EN |
-                                           /* Open drain is disabled */
-                                           IOCON_PIO_OPENDRAIN_DI |
-                                           /* Analog switch is closed (enabled), only for A0 version */
-                                           IOCON_PIO_ASW_DIS_EN);
-        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
-        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
-    }
-
-    if (Chip_GetVersion()==1)
-    {
-        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
-                                          IOCON_PIO_FUNC6 |
-                                          /* Selects pull-up function */
-                                          IOCON_PIO_MODE_PULLUP |
-                                          /* Standard mode, output slew rate control is enabled */
-                                          IOCON_PIO_SLEW_STANDARD |
-                                          /* Input function is not inverted */
-                                          IOCON_PIO_INV_DI |
-                                          /* Enables digital function */
-                                          IOCON_PIO_DIGITAL_EN |
-                                          /* Open drain is disabled */
-                                          IOCON_PIO_OPENDRAIN_DI |
-                                          /* Analog switch is closed (enabled) */
-                                          IOCON_PIO_ASW_EN);
-        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
-        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
-    }
-    else
-    {
-        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
-                                          IOCON_PIO_FUNC6 |
-                                          /* Selects pull-up function */
-                                          IOCON_PIO_MODE_PULLUP |
-                                          /* Standard mode, output slew rate control is enabled */
-                                          IOCON_PIO_SLEW_STANDARD |
-                                          /* Input function is not inverted */
-                                          IOCON_PIO_INV_DI |
-                                          /* Enables digital function */
-                                          IOCON_PIO_DIGITAL_EN |
-                                          /* Open drain is disabled */
-                                          IOCON_PIO_OPENDRAIN_DI |
-                                          /* Analog switch is closed (enabled), only for A0 version */
-                                          IOCON_PIO_ASW_DIS_EN);
-        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
-        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
-    }
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitUSBPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '97', peripheral: USBFSH, signal: USB_DP, pin_signal: USB0_DP}
-  - {pin_num: '98', peripheral: USBFSH, signal: USB_DM, pin_signal: USB0_DM}
-  - {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
-    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '35', peripheral: USBHSH, signal: USB_DM, pin_signal: USB1_DM}
-  - {pin_num: '34', peripheral: USBHSH, signal: USB_DP, pin_signal: USB1_DP}
-  - {pin_num: '36', peripheral: USBHSH, signal: USB_VBUS, pin_signal: USB1_VBUS}
-  - {pin_num: '65', peripheral: USBHSH, signal: USB_OVERCURRENTN, pin_signal: PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '66', peripheral: USBFSH, signal: USB_OVERCURRENTN, pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '67', peripheral: USBFSH, signal: USB_PORTPWRN, pin_signal: PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '80', peripheral: USBHSH, signal: USB_PORTPWRN, pin_signal: PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitUSBPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitUSBPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t USB0_VBUS = (/* Pin is configured as USB0_VBUS */
-                                IOCON_PIO_FUNC7 |
-                                /* No addition pin function */
-                                IOCON_PIO_MODE_INACT |
-                                /* Standard mode, output slew rate control is enabled */
-                                IOCON_PIO_SLEW_STANDARD |
-                                /* Input function is not inverted */
-                                IOCON_PIO_INV_DI |
-                                /* Enables digital function */
-                                IOCON_PIO_DIGITAL_EN |
-                                /* Open drain is disabled */
-                                IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
-    IOCON_PinMuxSet(IOCON, BOARD_INITUSBPINS_USB0_VBUS_PORT, BOARD_INITUSBPINS_USB0_VBUS_PIN, USB0_VBUS);
-
-    const uint32_t port0_pin28_config = (/* Pin is configured as USB0_OVERCURRENTN */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN28 (coords: 66) is configured as USB0_OVERCURRENTN */
-    IOCON_PinMuxSet(IOCON, 0U, 28U, port0_pin28_config);
-
-    const uint32_t port1_pin12_config = (/* Pin is configured as USB0_PORTPWRN */
-                                         IOCON_PIO_FUNC4 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN12 (coords: 67) is configured as USB0_PORTPWRN */
-    IOCON_PinMuxSet(IOCON, 1U, 12U, port1_pin12_config);
-
-    const uint32_t port1_pin29_config = (/* Pin is configured as USB1_PORTPWRN */
-                                         IOCON_PIO_FUNC4 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN29 (coords: 80) is configured as USB1_PORTPWRN */
-    IOCON_PinMuxSet(IOCON, 1U, 29U, port1_pin29_config);
-
-    const uint32_t port1_pin30_config = (/* Pin is configured as USB1_OVERCURRENTN */
-                                         IOCON_PIO_FUNC4 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN30 (coords: 65) is configured as USB1_OVERCURRENTN */
-    IOCON_PinMuxSet(IOCON, 1U, 30U, port1_pin30_config);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitLEDsPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '1', peripheral: GPIO, signal: 'PIO1, 4', pin_signal: PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A, direction: OUTPUT, gpio_init_state: 'true',
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '5', peripheral: GPIO, signal: 'PIO1, 6', pin_signal: PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3, direction: OUTPUT, gpio_init_state: 'true',
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '9', peripheral: GPIO, signal: 'PIO1, 7', pin_signal: PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4, direction: OUTPUT, gpio_init_state: 'true',
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitLEDsPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitLEDsPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    /* Enables the clock for the GPIO1 module */
-    CLOCK_EnableClock(kCLOCK_Gpio1);
-
-    gpio_pin_config_t LED_BULE_config = {
-        .pinDirection = kGPIO_DigitalOutput,
-        .outputLogic = 1U
-    };
-    /* Initialize GPIO functionality on pin PIO1_4 (pin 1)  */
-    GPIO_PinInit(BOARD_INITLEDSPINS_LED_BULE_GPIO, BOARD_INITLEDSPINS_LED_BULE_PORT, BOARD_INITLEDSPINS_LED_BULE_PIN, &LED_BULE_config);
-
-    gpio_pin_config_t LED_RED_config = {
-        .pinDirection = kGPIO_DigitalOutput,
-        .outputLogic = 1U
-    };
-    /* Initialize GPIO functionality on pin PIO1_6 (pin 5)  */
-    GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
-
-    gpio_pin_config_t LED_GREEN_config = {
-        .pinDirection = kGPIO_DigitalOutput,
-        .outputLogic = 1U
-    };
-    /* Initialize GPIO functionality on pin PIO1_7 (pin 9)  */
-    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
-
-    const uint32_t LED_BULE = (/* Pin is configured as PIO1_4 */
-                               IOCON_PIO_FUNC0 |
-                               /* Selects pull-up function */
-                               IOCON_PIO_MODE_PULLUP |
-                               /* Standard mode, output slew rate control is enabled */
-                               IOCON_PIO_SLEW_STANDARD |
-                               /* Input function is not inverted */
-                               IOCON_PIO_INV_DI |
-                               /* Enables digital function */
-                               IOCON_PIO_DIGITAL_EN |
-                               /* Open drain is disabled */
-                               IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN4 (coords: 1) is configured as PIO1_4 */
-    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_BULE_PORT, BOARD_INITLEDSPINS_LED_BULE_PIN, LED_BULE);
-
-    const uint32_t LED_RED = (/* Pin is configured as PIO1_6 */
-                              IOCON_PIO_FUNC0 |
-                              /* Selects pull-up function */
-                              IOCON_PIO_MODE_PULLUP |
-                              /* Standard mode, output slew rate control is enabled */
-                              IOCON_PIO_SLEW_STANDARD |
-                              /* Input function is not inverted */
-                              IOCON_PIO_INV_DI |
-                              /* Enables digital function */
-                              IOCON_PIO_DIGITAL_EN |
-                              /* Open drain is disabled */
-                              IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN6 (coords: 5) is configured as PIO1_6 */
-    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, LED_RED);
-
-    const uint32_t LED_GREEN = (/* Pin is configured as PIO1_7 */
-                                IOCON_PIO_FUNC0 |
-                                /* Selects pull-up function */
-                                IOCON_PIO_MODE_PULLUP |
-                                /* Standard mode, output slew rate control is enabled */
-                                IOCON_PIO_SLEW_STANDARD |
-                                /* Input function is not inverted */
-                                IOCON_PIO_INV_DI |
-                                /* Enables digital function */
-                                IOCON_PIO_DIGITAL_EN |
-                                /* Open drain is disabled */
-                                IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN7 (coords: 9) is configured as PIO1_7 */
-    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, LED_GREEN);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitBUTTONsPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '88', peripheral: GPIO, signal: 'PIO0, 5', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, direction: INPUT,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '64', peripheral: GPIO, signal: 'PIO1, 18', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0, direction: INPUT, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12, direction: INPUT, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled, asw: enabled}
-  - {pin_num: '32', peripheral: SYSCON, signal: RESET, pin_signal: RESETN}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBUTTONsPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitBUTTONsPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    /* Enables the clock for the GPIO0 module */
-    CLOCK_EnableClock(kCLOCK_Gpio0);
-
-    /* Enables the clock for the GPIO1 module */
-    CLOCK_EnableClock(kCLOCK_Gpio1);
-
-    gpio_pin_config_t S1_config = {
-        .pinDirection = kGPIO_DigitalInput,
-        .outputLogic = 0U
-    };
-    /* Initialize GPIO functionality on pin PIO0_5 (pin 88)  */
-    GPIO_PinInit(BOARD_INITBUTTONSPINS_S1_GPIO, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, &S1_config);
-
-    gpio_pin_config_t S3_config = {
-        .pinDirection = kGPIO_DigitalInput,
-        .outputLogic = 0U
-    };
-    /* Initialize GPIO functionality on pin PIO1_9 (pin 10)  */
-    GPIO_PinInit(BOARD_INITBUTTONSPINS_S3_GPIO, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, &S3_config);
-
-    gpio_pin_config_t S2_config = {
-        .pinDirection = kGPIO_DigitalInput,
-        .outputLogic = 0U
-    };
-    /* Initialize GPIO functionality on pin PIO1_18 (pin 64)  */
-    GPIO_PinInit(BOARD_INITBUTTONSPINS_S2_GPIO, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, &S2_config);
-
-    const uint32_t S1 = (/* Pin is configured as PIO0_5 */
-                         IOCON_PIO_FUNC0 |
-                         /* Selects pull-up function */
-                         IOCON_PIO_MODE_PULLUP |
-                         /* Standard mode, output slew rate control is enabled */
-                         IOCON_PIO_SLEW_STANDARD |
-                         /* Input function is not inverted */
-                         IOCON_PIO_INV_DI |
-                         /* Enables digital function */
-                         IOCON_PIO_DIGITAL_EN |
-                         /* Open drain is disabled */
-                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN5 (coords: 88) is configured as PIO0_5 */
-    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, S1);
-
-    const uint32_t S2 = (/* Pin is configured as PIO1_18 */
-                         IOCON_PIO_FUNC0 |
-                         /* Selects pull-up function */
-                         IOCON_PIO_MODE_PULLUP |
-                         /* Standard mode, output slew rate control is enabled */
-                         IOCON_PIO_SLEW_STANDARD |
-                         /* Input function is not inverted */
-                         IOCON_PIO_INV_DI |
-                         /* Enables digital function */
-                         IOCON_PIO_DIGITAL_EN |
-                         /* Open drain is disabled */
-                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN18 (coords: 64) is configured as PIO1_18 */
-    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, S2);
-
-    if (Chip_GetVersion()==1)
-    {
-        const uint32_t S3 = (/* Pin is configured as PIO1_9 */
-                             IOCON_PIO_FUNC0 |
-                             /* Selects pull-up function */
-                             IOCON_PIO_MODE_PULLUP |
-                             /* Standard mode, output slew rate control is enabled */
-                             IOCON_PIO_SLEW_STANDARD |
-                             /* Input function is not inverted */
-                             IOCON_PIO_INV_DI |
-                             /* Enables digital function */
-                             IOCON_PIO_DIGITAL_EN |
-                             /* Open drain is disabled */
-                             IOCON_PIO_OPENDRAIN_DI |
-                             /* Analog switch is closed (enabled) */
-                             IOCON_PIO_ASW_EN);
-        /* PORT1 PIN9 (coords: 10) is configured as PIO1_9 */
-        IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, S3);
-    }
-    else
-    {
-        const uint32_t S3 = (/* Pin is configured as PIO1_9 */
-                             IOCON_PIO_FUNC0 |
-                             /* Selects pull-up function */
-                             IOCON_PIO_MODE_PULLUP |
-                             /* Standard mode, output slew rate control is enabled */
-                             IOCON_PIO_SLEW_STANDARD |
-                             /* Input function is not inverted */
-                             IOCON_PIO_INV_DI |
-                             /* Enables digital function */
-                             IOCON_PIO_DIGITAL_EN |
-                             /* Open drain is disabled */
-                             IOCON_PIO_OPENDRAIN_DI |
-                             /* Analog switch is closed (enabled), only for A0 version */
-                             IOCON_PIO_ASW_DIS_EN);
-        /* PORT1 PIN9 (coords: 10) is configured as PIO1_9 */
-        IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, S3);
-    }
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitI2SPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
-    open_drain: disabled}
-  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
-    identifier: FC6_I2S_CLK, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
-  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
-    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitI2SPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitI2SPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    const uint32_t FC6_I2S_CLK = (/* Pin is configured as FC6_SCK */
-                                  IOCON_PIO_FUNC1 |
-                                  /* Selects pull-up function */
-                                  IOCON_PIO_MODE_PULLUP |
-                                  /* Standard mode, output slew rate control is enabled */
-                                  IOCON_PIO_SLEW_STANDARD |
-                                  /* Input function is not inverted */
-                                  IOCON_PIO_INV_DI |
-                                  /* Enables digital function */
-                                  IOCON_PIO_DIGITAL_EN |
-                                  /* Open drain is disabled */
-                                  IOCON_PIO_OPENDRAIN_DI |
-                                  /* Analog switch is closed (enabled) */
-                                  IOCON_PIO_ASW_EN);
-    /* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_CLK_PORT, BOARD_INITI2SPINS_FC6_I2S_CLK_PIN, FC6_I2S_CLK);
-
-    const uint32_t FC7_I2S_WS = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
-                                 IOCON_PIO_FUNC7 |
-                                 /* Selects pull-up function */
-                                 IOCON_PIO_MODE_PULLUP |
-                                 /* Standard mode, output slew rate control is enabled */
-                                 IOCON_PIO_SLEW_STANDARD |
-                                 /* Input function is not inverted */
-                                 IOCON_PIO_INV_DI |
-                                 /* Enables digital function */
-                                 IOCON_PIO_DIGITAL_EN |
-                                 /* Open drain is disabled */
-                                 IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_WS_PORT, BOARD_INITI2SPINS_FC7_I2S_WS_PIN, FC7_I2S_WS);
-
-    const uint32_t FC7_I2S_TX = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
-                                 IOCON_PIO_FUNC7 |
-                                 /* Selects pull-up function */
-                                 IOCON_PIO_MODE_PULLUP |
-                                 /* Standard mode, output slew rate control is enabled */
-                                 IOCON_PIO_SLEW_STANDARD |
-                                 /* Input function is not inverted */
-                                 IOCON_PIO_INV_DI |
-                                 /* Enables digital function */
-                                 IOCON_PIO_DIGITAL_EN |
-                                 /* Open drain is disabled */
-                                 IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_TX_PORT, BOARD_INITI2SPINS_FC7_I2S_TX_PIN, FC7_I2S_TX);
-
-    const uint32_t FC7_I2S_SCK = (/* Pin is configured as FC7_SCK */
-                                  IOCON_PIO_FUNC7 |
-                                  /* Selects pull-up function */
-                                  IOCON_PIO_MODE_PULLUP |
-                                  /* Standard mode, output slew rate control is enabled */
-                                  IOCON_PIO_SLEW_STANDARD |
-                                  /* Input function is not inverted */
-                                  IOCON_PIO_INV_DI |
-                                  /* Enables digital function */
-                                  IOCON_PIO_DIGITAL_EN |
-                                  /* Open drain is disabled */
-                                  IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_SCK_PORT, BOARD_INITI2SPINS_FC7_I2S_SCK_PIN, FC7_I2S_SCK);
-
-    const uint32_t FC6_I2S_RX = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
-                                 IOCON_PIO_FUNC2 |
-                                 /* Selects pull-up function */
-                                 IOCON_PIO_MODE_PULLUP |
-                                 /* Standard mode, output slew rate control is enabled */
-                                 IOCON_PIO_SLEW_STANDARD |
-                                 /* Input function is not inverted */
-                                 IOCON_PIO_INV_DI |
-                                 /* Enables digital function */
-                                 IOCON_PIO_DIGITAL_EN |
-                                 /* Open drain is disabled */
-                                 IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_RX_PORT, BOARD_INITI2SPINS_FC6_I2S_RX_PIN, FC6_I2S_RX);
-
-    const uint32_t FC6_I2S_WS = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
-                                 IOCON_PIO_FUNC2 |
-                                 /* Selects pull-up function */
-                                 IOCON_PIO_MODE_PULLUP |
-                                 /* Standard mode, output slew rate control is enabled */
-                                 IOCON_PIO_SLEW_STANDARD |
-                                 /* Input function is not inverted */
-                                 IOCON_PIO_INV_DI |
-                                 /* Enables digital function */
-                                 IOCON_PIO_DIGITAL_EN |
-                                 /* Open drain is disabled */
-                                 IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_WS_PORT, BOARD_INITI2SPINS_FC6_I2S_WS_PIN, FC6_I2S_WS);
-
-    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
-                                  IOCON_PIO_FUNC5 |
-                                  /* Selects pull-up function */
-                                  IOCON_PIO_MODE_PULLUP |
-                                  /* Standard mode, output slew rate control is enabled */
-                                  IOCON_PIO_SLEW_STANDARD |
-                                  /* Input function is not inverted */
-                                  IOCON_PIO_INV_DI |
-                                  /* Enables digital function */
-                                  IOCON_PIO_DIGITAL_EN |
-                                  /* Open drain is disabled */
-                                  IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SCL_PORT, BOARD_INITI2SPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
-
-    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
-                                  IOCON_PIO_FUNC5 |
-                                  /* Selects pull-up function */
-                                  IOCON_PIO_MODE_PULLUP |
-                                  /* Standard mode, output slew rate control is enabled */
-                                  IOCON_PIO_SLEW_STANDARD |
-                                  /* Input function is not inverted */
-                                  IOCON_PIO_INV_DI |
-                                  /* Enables digital function */
-                                  IOCON_PIO_DIGITAL_EN |
-                                  /* Open drain is disabled */
-                                  IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SDA_PORT, BOARD_INITI2SPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
-
-    const uint32_t MCLK = (/* Pin is configured as MCLK */
-                           IOCON_PIO_FUNC1 |
-                           /* No addition pin function */
-                           IOCON_PIO_MODE_INACT |
-                           /* Standard mode, output slew rate control is enabled */
-                           IOCON_PIO_SLEW_STANDARD |
-                           /* Input function is not inverted */
-                           IOCON_PIO_INV_DI |
-                           /* Enables digital function */
-                           IOCON_PIO_DIGITAL_EN |
-                           /* Open drain is disabled */
-                           IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN31 (coords: 91) is configured as MCLK */
-    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_MCLK_PORT, BOARD_INITI2SPINS_MCLK_PIN, MCLK);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitACCELPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
-    slew_rate: standard, invert: disabled, open_drain: disabled}
-  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
-    invert: disabled, open_drain: disabled}
-  - {pin_num: '58', peripheral: GPIO, signal: 'PIO1, 19', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, direction: INPUT, mode: inactive,
-    slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitACCELPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M33 (Core #0) */
-void BOARD_InitACCELPins(void)
-{
-    /* Enables the clock for the I/O controller.: Enable Clock. */
-    CLOCK_EnableClock(kCLOCK_Iocon);
-
-    /* Enables the clock for the GPIO1 module */
-    CLOCK_EnableClock(kCLOCK_Gpio1);
-
-    gpio_pin_config_t ACCL_INTR_config = {
-        .pinDirection = kGPIO_DigitalInput,
-        .outputLogic = 0U
-    };
-    /* Initialize GPIO functionality on pin PIO1_19 (pin 58)  */
-    GPIO_PinInit(BOARD_INITACCELPINS_ACCL_INTR_GPIO, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, &ACCL_INTR_config);
-
-    const uint32_t ACCL_INTR = (/* Pin is configured as PIO1_19 */
-                                IOCON_PIO_FUNC0 |
-                                /* No addition pin function */
-                                IOCON_PIO_MODE_INACT |
-                                /* Standard mode, output slew rate control is enabled */
-                                IOCON_PIO_SLEW_STANDARD |
-                                /* Input function is not inverted */
-                                IOCON_PIO_INV_DI |
-                                /* Enables digital function */
-                                IOCON_PIO_DIGITAL_EN |
-                                /* Open drain is disabled */
-                                IOCON_PIO_OPENDRAIN_DI |
-                                /* Analog switch is open (disabled) */
-                                IOCON_PIO_ASW_DI);
-    /* PORT1 PIN19 (coords: 58) is configured as PIO1_19 */
-    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, ACCL_INTR);
-
-    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
-                                  IOCON_PIO_FUNC5 |
-                                  /* Selects pull-up function */
-                                  IOCON_PIO_MODE_PULLUP |
-                                  /* Standard mode, output slew rate control is enabled */
-                                  IOCON_PIO_SLEW_STANDARD |
-                                  /* Input function is not inverted */
-                                  IOCON_PIO_INV_DI |
-                                  /* Enables digital function */
-                                  IOCON_PIO_DIGITAL_EN |
-                                  /* Open drain is disabled */
-                                  IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
-    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SCL_PORT, BOARD_INITACCELPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
-
-    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
-                                  IOCON_PIO_FUNC5 |
-                                  /* Selects pull-up function */
-                                  IOCON_PIO_MODE_PULLUP |
-                                  /* Standard mode, output slew rate control is enabled */
-                                  IOCON_PIO_SLEW_STANDARD |
-                                  /* Input function is not inverted */
-                                  IOCON_PIO_INV_DI |
-                                  /* Enables digital function */
-                                  IOCON_PIO_DIGITAL_EN |
-                                  /* Open drain is disabled */
-                                  IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
-    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SDA_PORT, BOARD_INITACCELPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/boards/lpcxpresso55s69_agm01/project_template/pin_mux.h b/boards/lpcxpresso55s69_agm01/project_template/pin_mux.h
deleted file mode 100644
index 54f3888e3..000000000
--- a/boards/lpcxpresso55s69_agm01/project_template/pin_mux.h
+++ /dev/null
@@ -1,819 +0,0 @@
-/*
- * Copyright 2017-2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/***********************************************************************************************************************
- * Definitions
- **********************************************************************************************************************/
-
-/*! @brief Direction type  */
-typedef enum _pin_mux_direction
-{
-    kPIN_MUX_DirectionInput = 0U,        /* Input direction */
-    kPIN_MUX_DirectionOutput = 1U,       /* Output direction */
-    kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
-} pin_mux_direction_t;
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*! @name PIO0_29 (number 92), P8[2]/U6[13]/FC0_USART_RXD
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL FLEXCOMM0
-/*!
- * @brief Signal name */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD_SDA_MOSI_DATA
-/*!
- * @brief Routed pin name */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME FC0_RXD_SDA_MOSI_DATA
-/*!
- * @brief Label */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "P8[2]/U6[13]/FC0_USART_RXD"
-/*!
- * @brief Identifier */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 29U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 29U)
-/* @} */
-
-/*! @name PIO0_30 (number 94), P8[3]/U6[12]/FC0_USART_TXD
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL FLEXCOMM0
-/*!
- * @brief Signal name */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD_SCL_MISO_WS
-/*!
- * @brief Routed pin name */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME FC0_TXD_SCL_MISO_WS
-/*!
- * @brief Label */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "P8[3]/U6[12]/FC0_USART_TXD"
-/*!
- * @brief Identifier */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 30U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 30U)
-/* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
-#define IOCON_PIO_ASW_DIS_EN 0x00u    /*!<@brief Analog switch is closed (enabled), only for A0 version */
-#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC6 0x06u         /*!<@brief Selects pin function 6 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_MODE_PULLDOWN 0x10u /*!<@brief Selects pull-down function */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*! @name PIO0_11 (number 13), U14[4]/SWDCLK_TRGT
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PERIPHERAL SWD
-/*!
- * @brief Signal name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_SIGNAL SWCLK
-/*!
- * @brief Routed pin name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_NAME SWCLK
-/*!
- * @brief Label */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_LABEL "U14[4]/SWDCLK_TRGT"
-/*!
- * @brief Identifier */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_NAME "DEBUG_SWD_SWDCLK"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 11U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 11U)
-/* @} */
-
-/*! @name PIO0_12 (number 12), U15[4]/D7/P7[2]/IF_SWDIO
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
-/*!
- * @brief Signal name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
-/*!
- * @brief Routed pin name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
-/*!
- * @brief Label */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "U15[4]/D7/P7[2]/IF_SWDIO"
-/*!
- * @brief Identifier */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 12U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 12U)
-/* @} */
-
-/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PERIPHERAL SWD
-/*!
- * @brief Signal name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_SIGNAL SWO
-/*!
- * @brief Routed pin name */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_NAME SWO
-/*!
- * @brief Label */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_LABEL "U14[12]/SWO_TRGT"
-/*!
- * @brief Identifier */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_NAME "DEBUG_SWD_SWO"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT 0U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN 10U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_MASK (1U << 10U)
-/* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC4 0x04u         /*!<@brief Selects pin function 4 */
-#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*! @name USB0_DP (number 97), P10[3]/D10[3]/USB0_FS_P
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITUSBPINS_USB0_DP_PERIPHERAL USBFSH               /*!<@brief Peripheral name */
-#define BOARD_INITUSBPINS_USB0_DP_SIGNAL USB_DP                   /*!<@brief Signal name */
-#define BOARD_INITUSBPINS_USB0_DP_PIN_NAME USB0_DP                /*!<@brief Routed pin name */
-#define BOARD_INITUSBPINS_USB0_DP_LABEL "P10[3]/D10[3]/USB0_FS_P" /*!<@brief Label */
-#define BOARD_INITUSBPINS_USB0_DP_NAME "USB0_DP"                  /*!<@brief Identifier */
-                                                                  /* @} */
-
-/*! @name USB0_DM (number 98), P10[2]/D10[2]/USB0_FS_N
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITUSBPINS_USB0_DM_PERIPHERAL USBFSH               /*!<@brief Peripheral name */
-#define BOARD_INITUSBPINS_USB0_DM_SIGNAL USB_DM                   /*!<@brief Signal name */
-#define BOARD_INITUSBPINS_USB0_DM_PIN_NAME USB0_DM                /*!<@brief Routed pin name */
-#define BOARD_INITUSBPINS_USB0_DM_LABEL "P10[2]/D10[2]/USB0_FS_N" /*!<@brief Label */
-#define BOARD_INITUSBPINS_USB0_DM_NAME "USB0_DM"                  /*!<@brief Identifier */
-                                                                  /* @} */
-
-/*! @name PIO0_22 (number 78), P10[1]/USB0_VBUS
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITUSBPINS_USB0_VBUS_PERIPHERAL USBFSH         /*!<@brief Peripheral name */
-#define BOARD_INITUSBPINS_USB0_VBUS_SIGNAL USB_VBUS           /*!<@brief Signal name */
-#define BOARD_INITUSBPINS_USB0_VBUS_PIN_NAME USB0_VBUS        /*!<@brief Routed pin name */
-#define BOARD_INITUSBPINS_USB0_VBUS_LABEL "P10[1]/USB0_VBUS"  /*!<@brief Label */
-#define BOARD_INITUSBPINS_USB0_VBUS_NAME "USB0_VBUS"          /*!<@brief Identifier */
-#define BOARD_INITUSBPINS_USB0_VBUS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITUSBPINS_USB0_VBUS_PIN 22U                   /*!<@brief PORT pin number */
-#define BOARD_INITUSBPINS_USB0_VBUS_PIN_MASK (1U << 22U)      /*!<@brief PORT pin mask */
-                                                              /* @} */
-
-/*! @name USB1_DM (number 35), P9[2]/D9[2]/USB1_HS_N
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITUSBPINS_USB1_DM_PERIPHERAL USBHSH             /*!<@brief Peripheral name */
-#define BOARD_INITUSBPINS_USB1_DM_SIGNAL USB_DM                 /*!<@brief Signal name */
-#define BOARD_INITUSBPINS_USB1_DM_PIN_NAME USB1_DM              /*!<@brief Routed pin name */
-#define BOARD_INITUSBPINS_USB1_DM_LABEL "P9[2]/D9[2]/USB1_HS_N" /*!<@brief Label */
-#define BOARD_INITUSBPINS_USB1_DM_NAME "USB1_DM"                /*!<@brief Identifier */
-                                                                /* @} */
-
-/*! @name USB1_DP (number 34), P9[3]/D9[3]/USB1_HS_P
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITUSBPINS_USB1_DP_PERIPHERAL USBHSH             /*!<@brief Peripheral name */
-#define BOARD_INITUSBPINS_USB1_DP_SIGNAL USB_DP                 /*!<@brief Signal name */
-#define BOARD_INITUSBPINS_USB1_DP_PIN_NAME USB1_DP              /*!<@brief Routed pin name */
-#define BOARD_INITUSBPINS_USB1_DP_LABEL "P9[3]/D9[3]/USB1_HS_P" /*!<@brief Label */
-#define BOARD_INITUSBPINS_USB1_DP_NAME "USB1_DP"                /*!<@brief Identifier */
-                                                                /* @} */
-
-/*! @name USB1_VBUS (number 36), P9[1]/USB1_VBUS
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITUSBPINS_USB1_VBUS_PERIPHERAL USBHSH       /*!<@brief Peripheral name */
-#define BOARD_INITUSBPINS_USB1_VBUS_SIGNAL USB_VBUS         /*!<@brief Signal name */
-#define BOARD_INITUSBPINS_USB1_VBUS_PIN_NAME USB1_VBUS      /*!<@brief Routed pin name */
-#define BOARD_INITUSBPINS_USB1_VBUS_LABEL "P9[1]/USB1_VBUS" /*!<@brief Label */
-#define BOARD_INITUSBPINS_USB1_VBUS_NAME "USB1_VBUS"        /*!<@brief Identifier */
-                                                            /* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitUSBPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*! @name PIO1_4 (number 1), R78/P18[5]/LEDR/PWM_ARD
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITLEDSPINS_LED_BULE_PERIPHERAL GPIO                    /*!<@brief Peripheral name */
-#define BOARD_INITLEDSPINS_LED_BULE_SIGNAL PIO1                        /*!<@brief Signal name */
-#define BOARD_INITLEDSPINS_LED_BULE_CHANNEL 4                          /*!<@brief Signal channel */
-#define BOARD_INITLEDSPINS_LED_BULE_PIN_NAME PIO1_4                    /*!<@brief Routed pin name */
-#define BOARD_INITLEDSPINS_LED_BULE_LABEL "R78/P18[5]/LEDR/PWM_ARD"    /*!<@brief Label */
-#define BOARD_INITLEDSPINS_LED_BULE_NAME "LED_BULE"                    /*!<@brief Identifier */
-#define BOARD_INITLEDSPINS_LED_BULE_DIRECTION kPIN_MUX_DirectionOutput /*!<@brief Direction */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITLEDSPINS_LED_BULE_GPIO GPIO                          /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_BULE_GPIO_PIN 4U                        /*!<@brief GPIO pin number */
-#define BOARD_INITLEDSPINS_LED_BULE_GPIO_PIN_MASK (1U << 4U)           /*!<@brief GPIO pin mask */
-#define BOARD_INITLEDSPINS_LED_BULE_PORT 1U                            /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_BULE_PIN 4U                             /*!<@brief PORT pin number */
-#define BOARD_INITLEDSPINS_LED_BULE_PIN_MASK (1U << 4U)                /*!<@brief PORT pin mask */
-                                                                       /* @} */
-
-/*! @name PIO1_6 (number 5), R80/P18[9]/LEDB/PWM_ARD
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO                    /*!<@brief Peripheral name */
-#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO1                        /*!<@brief Signal name */
-#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 6                          /*!<@brief Signal channel */
-#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO1_6                    /*!<@brief Routed pin name */
-#define BOARD_INITLEDSPINS_LED_RED_LABEL "R80/P18[9]/LEDB/PWM_ARD"    /*!<@brief Label */
-#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"                     /*!<@brief Identifier */
-#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput /*!<@brief Direction */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO                          /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 6U                        /*!<@brief GPIO pin number */
-#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 6U)           /*!<@brief GPIO pin mask */
-#define BOARD_INITLEDSPINS_LED_RED_PORT 1U                            /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_RED_PIN 6U                             /*!<@brief PORT pin number */
-#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 6U)                /*!<@brief PORT pin mask */
-                                                                      /* @} */
-
-/*! @name PIO1_7 (number 9), R79/P18[7]/LEDG/PWM_ARD
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
-/*!
- * @brief Signal name */
-#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO1
-/*!
- * @brief Signal channel */
-#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 7
-/*!
- * @brief Routed pin name */
-#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO1_7
-/*!
- * @brief Label */
-#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "R79/P18[7]/LEDG/PWM_ARD"
-/*!
- * @brief Identifier */
-#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
-/*!
- * @brief Direction */
-#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput
-
-/* Symbols to be used with GPIO driver */
-/*!
- * @brief GPIO peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
-/*!
- * @brief GPIO pin number */
-#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 7U
-/*!
- * @brief GPIO pin mask */
-#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 7U)
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_GREEN_PORT 1U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITLEDSPINS_LED_GREEN_PIN 7U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 7U)
-/* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_ASW_DIS_EN 0x00u    /*!<@brief Analog switch is closed (enabled), only for A0 version */
-#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*! @name PIO0_5 (number 88), S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITBUTTONSPINS_S1_PERIPHERAL GPIO
-/*!
- * @brief Signal name */
-#define BOARD_INITBUTTONSPINS_S1_SIGNAL PIO0
-/*!
- * @brief Signal channel */
-#define BOARD_INITBUTTONSPINS_S1_CHANNEL 5
-/*!
- * @brief Routed pin name */
-#define BOARD_INITBUTTONSPINS_S1_PIN_NAME PIO0_5
-/*!
- * @brief Label */
-#define BOARD_INITBUTTONSPINS_S1_LABEL "S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1"
-/*!
- * @brief Identifier */
-#define BOARD_INITBUTTONSPINS_S1_NAME "S1"
-/*!
- * @brief Direction */
-#define BOARD_INITBUTTONSPINS_S1_DIRECTION kPIN_MUX_DirectionInput
-
-/* Symbols to be used with GPIO driver */
-/*!
- * @brief GPIO peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO
-/*!
- * @brief GPIO pin number */
-#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN 5U
-/*!
- * @brief GPIO pin mask */
-#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 5U)
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_S1_PORT 0U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITBUTTONSPINS_S1_PIN 5U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 5U)
-/* @} */
-
-/*! @name PIO1_18 (number 64), S2/P18[16]/P24[2]/WAKE/GPIO
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITBUTTONSPINS_S2_PERIPHERAL GPIO                     /*!<@brief Peripheral name */
-#define BOARD_INITBUTTONSPINS_S2_SIGNAL PIO1                         /*!<@brief Signal name */
-#define BOARD_INITBUTTONSPINS_S2_CHANNEL 18                          /*!<@brief Signal channel */
-#define BOARD_INITBUTTONSPINS_S2_PIN_NAME PIO1_18                    /*!<@brief Routed pin name */
-#define BOARD_INITBUTTONSPINS_S2_LABEL "S2/P18[16]/P24[2]/WAKE/GPIO" /*!<@brief Label */
-#define BOARD_INITBUTTONSPINS_S2_NAME "S2"                           /*!<@brief Identifier */
-#define BOARD_INITBUTTONSPINS_S2_DIRECTION kPIN_MUX_DirectionInput   /*!<@brief Direction */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITBUTTONSPINS_S2_GPIO GPIO                           /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN 18U                        /*!<@brief GPIO pin number */
-#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN_MASK (1U << 18U)           /*!<@brief GPIO pin mask */
-#define BOARD_INITBUTTONSPINS_S2_PORT 1U                             /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_S2_PIN 18U                             /*!<@brief PORT pin number */
-#define BOARD_INITBUTTONSPINS_S2_PIN_MASK (1U << 18U)                /*!<@brief PORT pin mask */
-                                                                     /* @} */
-
-/*! @name PIO1_9 (number 10), S3/P18[1]/PIO1_9_GPIO_ARD
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITBUTTONSPINS_S3_PERIPHERAL GPIO                   /*!<@brief Peripheral name */
-#define BOARD_INITBUTTONSPINS_S3_SIGNAL PIO1                       /*!<@brief Signal name */
-#define BOARD_INITBUTTONSPINS_S3_CHANNEL 9                         /*!<@brief Signal channel */
-#define BOARD_INITBUTTONSPINS_S3_PIN_NAME PIO1_9                   /*!<@brief Routed pin name */
-#define BOARD_INITBUTTONSPINS_S3_LABEL "S3/P18[1]/PIO1_9_GPIO_ARD" /*!<@brief Label */
-#define BOARD_INITBUTTONSPINS_S3_NAME "S3"                         /*!<@brief Identifier */
-#define BOARD_INITBUTTONSPINS_S3_DIRECTION kPIN_MUX_DirectionInput /*!<@brief Direction */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITBUTTONSPINS_S3_GPIO GPIO                         /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_S3_GPIO_PIN 9U                       /*!<@brief GPIO pin number */
-#define BOARD_INITBUTTONSPINS_S3_GPIO_PIN_MASK (1U << 9U)          /*!<@brief GPIO pin mask */
-#define BOARD_INITBUTTONSPINS_S3_PORT 1U                           /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_S3_PIN 9U                            /*!<@brief PORT pin number */
-#define BOARD_INITBUTTONSPINS_S3_PIN_MASK (1U << 9U)               /*!<@brief PORT pin mask */
-                                                                   /* @} */
-
-/*! @name RESETN (number 32), S4/P16[10]/P23[2]/U14[8]/RESETN
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITBUTTONSPINS_S4_PERIPHERAL SYSCON
-/*!
- * @brief Signal name */
-#define BOARD_INITBUTTONSPINS_S4_SIGNAL RESET
-/*!
- * @brief Routed pin name */
-#define BOARD_INITBUTTONSPINS_S4_PIN_NAME RESETN
-/*!
- * @brief Label */
-#define BOARD_INITBUTTONSPINS_S4_LABEL "S4/P16[10]/P23[2]/U14[8]/RESETN"
-/*!
- * @brief Identifier */
-#define BOARD_INITBUTTONSPINS_S4_NAME "S4"
-/* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
-#define IOCON_PIO_FUNC2 0x02u         /*!<@brief Selects pin function 2 */
-#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
-#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_PERIPHERAL FLEXCOMM4
-/*!
- * @brief Signal name */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_SIGNAL TXD_SCL_MISO_WS
-/*!
- * @brief Routed pin name */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN_NAME FC4_TXD_SCL_MISO_WS
-/*!
- * @brief Label */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_LABEL "P17[1]/P24[5]/FC4_I2C_SCL_ARD"
-/*!
- * @brief Identifier */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_NAME "FC4_I2C_SCL"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_PORT 1U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN 20U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)
-/* @} */
-
-/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_PERIPHERAL FLEXCOMM4
-/*!
- * @brief Signal name */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_SIGNAL RXD_SDA_MOSI_DATA
-/*!
- * @brief Routed pin name */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN_NAME FC4_RXD_SDA_MOSI_DATA
-/*!
- * @brief Label */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_LABEL "P17[3]/P24[6]/FC4_I2C_SDA_ARD"
-/*!
- * @brief Identifier */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_NAME "FC4_I2C_SDA"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_PORT 1U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN 21U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)
-/* @} */
-
-/*! @name PIO1_31 (number 91), P19[7]/P19[8]/PLU_IN0/GPIO
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITI2SPINS_MCLK_PERIPHERAL SYSCON                  /*!<@brief Peripheral name */
-#define BOARD_INITI2SPINS_MCLK_SIGNAL MCLK                        /*!<@brief Signal name */
-#define BOARD_INITI2SPINS_MCLK_PIN_NAME MCLK                      /*!<@brief Routed pin name */
-#define BOARD_INITI2SPINS_MCLK_LABEL "P19[7]/P19[8]/PLU_IN0/GPIO" /*!<@brief Label */
-#define BOARD_INITI2SPINS_MCLK_NAME "MCLK"                        /*!<@brief Identifier */
-#define BOARD_INITI2SPINS_MCLK_PORT 1U                            /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_MCLK_PIN 31U                            /*!<@brief PORT pin number */
-#define BOARD_INITI2SPINS_MCLK_PIN_MASK (1U << 31U)               /*!<@brief PORT pin mask */
-                                                                  /* @} */
-
-/*! @name PIO0_21 (number 76), P17[14]/FC7_I2S_SCK
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_PERIPHERAL FLEXCOMM7        /*!<@brief Peripheral name */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_SIGNAL SCK                  /*!<@brief Signal name */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN_NAME FC7_SCK            /*!<@brief Routed pin name */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_LABEL "P17[14]/FC7_I2S_SCK" /*!<@brief Label */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_NAME "FC7_I2S_SCK"          /*!<@brief Identifier */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_PORT 0U                     /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN 21U                     /*!<@brief PORT pin number */
-#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN_MASK (1U << 21U)        /*!<@brief PORT pin mask */
-                                                                  /* @} */
-
-/*! @name PIO0_20 (number 74), P17[10]/FC7_I2S_TX
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_PERIPHERAL FLEXCOMM7           /*!<@brief Peripheral name */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_SIGNAL RXD_SDA_MOSI_DATA       /*!<@brief Signal name */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN_NAME FC7_RXD_SDA_MOSI_DATA /*!<@brief Routed pin name */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_LABEL "P17[10]/FC7_I2S_TX"     /*!<@brief Label */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_NAME "FC7_I2S_TX"              /*!<@brief Identifier */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_PORT 0U                        /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN 20U                        /*!<@brief PORT pin number */
-#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN_MASK (1U << 20U)           /*!<@brief PORT pin mask */
-                                                                    /* @} */
-
-/*! @name PIO0_19 (number 90), P17[12]/FC7_I2S_WS
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_PERIPHERAL FLEXCOMM7         /*!<@brief Peripheral name */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_SIGNAL TXD_SCL_MISO_WS       /*!<@brief Signal name */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN_NAME FC7_TXD_SCL_MISO_WS /*!<@brief Routed pin name */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_LABEL "P17[12]/FC7_I2S_WS"   /*!<@brief Label */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_NAME "FC7_I2S_WS"            /*!<@brief Identifier */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_PORT 0U                      /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN 19U                      /*!<@brief PORT pin number */
-#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN_MASK (1U << 19U)         /*!<@brief PORT pin mask */
-                                                                  /* @} */
-
-/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_PERIPHERAL FLEXCOMM6      /*!<@brief Peripheral name */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_SIGNAL SCK                /*!<@brief Signal name */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN_NAME FC6_SCK          /*!<@brief Routed pin name */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_LABEL "U14[12]/SWO_TRGT"  /*!<@brief Label */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_NAME "FC6_I2S_CLK"        /*!<@brief Identifier */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN 10U                   /*!<@brief PORT pin number */
-#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN_MASK (1U << 10U)      /*!<@brief PORT pin mask */
-                                                                /* @} */
-
-/*! @name PIO1_13 (number 2), P17[20]/FC6_I2S_RX
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_PERIPHERAL FLEXCOMM6           /*!<@brief Peripheral name */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_SIGNAL RXD_SDA_MOSI_DATA       /*!<@brief Signal name */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN_NAME FC6_RXD_SDA_MOSI_DATA /*!<@brief Routed pin name */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_LABEL "P17[20]/FC6_I2S_RX"     /*!<@brief Label */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_NAME "FC6_I2S_RX"              /*!<@brief Identifier */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_PORT 1U                        /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN 13U                        /*!<@brief PORT pin number */
-#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN_MASK (1U << 13U)           /*!<@brief PORT pin mask */
-                                                                    /* @} */
-
-/*! @name PIO1_16 (number 87), P18[17]/SD1_PWR_EN
-  @{ */
-/* Routed pin properties */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_PERIPHERAL FLEXCOMM6         /*!<@brief Peripheral name */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_SIGNAL TXD_SCL_MISO_WS       /*!<@brief Signal name */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN_NAME FC6_TXD_SCL_MISO_WS /*!<@brief Routed pin name */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_LABEL "P18[17]/SD1_PWR_EN"   /*!<@brief Label */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_NAME "FC6_I2S_WS"            /*!<@brief Identifier */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_PORT 1U                      /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN 16U                      /*!<@brief PORT pin number */
-#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN_MASK (1U << 16U)         /*!<@brief PORT pin mask */
-                                                                  /* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitI2SPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
-#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
-#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
-#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
-#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
-#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
-#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
-#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
-#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
-
-/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_PERIPHERAL FLEXCOMM4
-/*!
- * @brief Signal name */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_SIGNAL RXD_SDA_MOSI_DATA
-/*!
- * @brief Routed pin name */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN_NAME FC4_RXD_SDA_MOSI_DATA
-/*!
- * @brief Label */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_LABEL "P17[3]/P24[6]/FC4_I2C_SDA_ARD"
-/*!
- * @brief Identifier */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_NAME "FC4_I2C_SDA"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_PORT 1U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN 21U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)
-/* @} */
-
-/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_PERIPHERAL FLEXCOMM4
-/*!
- * @brief Signal name */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_SIGNAL TXD_SCL_MISO_WS
-/*!
- * @brief Routed pin name */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN_NAME FC4_TXD_SCL_MISO_WS
-/*!
- * @brief Label */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_LABEL "P17[1]/P24[5]/FC4_I2C_SCL_ARD"
-/*!
- * @brief Identifier */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_NAME "FC4_I2C_SCL"
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_PORT 1U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN 20U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)
-/* @} */
-
-/*! @name PIO1_19 (number 58), U7[3]/P18[14]/PLU_OUT1/GPIO
-  @{ */
-/* Routed pin properties */
-/*!
- * @brief Peripheral name */
-#define BOARD_INITACCELPINS_ACCL_INTR_PERIPHERAL GPIO
-/*!
- * @brief Signal name */
-#define BOARD_INITACCELPINS_ACCL_INTR_SIGNAL PIO1
-/*!
- * @brief Signal channel */
-#define BOARD_INITACCELPINS_ACCL_INTR_CHANNEL 19
-/*!
- * @brief Routed pin name */
-#define BOARD_INITACCELPINS_ACCL_INTR_PIN_NAME PIO1_19
-/*!
- * @brief Label */
-#define BOARD_INITACCELPINS_ACCL_INTR_LABEL "U7[3]/P18[14]/PLU_OUT1/GPIO"
-/*!
- * @brief Identifier */
-#define BOARD_INITACCELPINS_ACCL_INTR_NAME "ACCL_INTR"
-/*!
- * @brief Direction */
-#define BOARD_INITACCELPINS_ACCL_INTR_DIRECTION kPIN_MUX_DirectionInput
-
-/* Symbols to be used with GPIO driver */
-/*!
- * @brief GPIO peripheral base pointer */
-#define BOARD_INITACCELPINS_ACCL_INTR_GPIO GPIO
-/*!
- * @brief GPIO pin number */
-#define BOARD_INITACCELPINS_ACCL_INTR_GPIO_PIN 19U
-/*!
- * @brief GPIO pin mask */
-#define BOARD_INITACCELPINS_ACCL_INTR_GPIO_PIN_MASK (1U << 19U)
-/*!
- * @brief PORT peripheral base pointer */
-#define BOARD_INITACCELPINS_ACCL_INTR_PORT 1U
-/*!
- * @brief PORT pin number */
-#define BOARD_INITACCELPINS_ACCL_INTR_PIN 19U
-/*!
- * @brief PORT pin mask */
-#define BOARD_INITACCELPINS_ACCL_INTR_PIN_MASK (1U << 19U)
-/* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/components/gpio/fsl_adapter_lpc_gpio.c b/components/gpio/fsl_adapter_lpc_gpio.c
index 5c3fd3dd9..56d54c3f4 100644
--- a/components/gpio/fsl_adapter_lpc_gpio.c
+++ b/components/gpio/fsl_adapter_lpc_gpio.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2018 - 2020 NXP
+ * Copyright 2018 - 2022 NXP
  * All rights reserved.
  *
  *
@@ -233,6 +233,7 @@ hal_gpio_status_t HAL_GpioInit(hal_gpio_handle_t gpioHandle, hal_gpio_pin_config
     if (kHAL_GpioDirectionOut == pinConfig->direction)
     {
         gpioPinconfig.pinDirection = kGPIO_DigitalOutput;
+        gpioPinconfig.outputLogic  = pinConfig->level;
     }
     else
     {
@@ -243,7 +244,7 @@ hal_gpio_status_t HAL_GpioInit(hal_gpio_handle_t gpioHandle, hal_gpio_pin_config
         HAL_GPIO_PORT_INIT_SET_FLAG(pinConfig->port);
         GPIO_PortInit(s_GpioList[0], pinConfig->port);
     }
-    gpioPinconfig.outputLogic = pinConfig->level;
+
     GPIO_PinInit(s_GpioList[0], pinConfig->port, pinConfig->pin, &gpioPinconfig);
 
     return kStatus_HAL_GpioSuccess;
diff --git a/components/serial_manager/fsl_component_serial_manager.c b/components/serial_manager/fsl_component_serial_manager.c
index 9bee1823e..c74ae0722 100644
--- a/components/serial_manager/fsl_component_serial_manager.c
+++ b/components/serial_manager/fsl_component_serial_manager.c
@@ -868,9 +868,7 @@ void SerialManager_RxCallback(void *callbackParam,
                 handle->commontaskMsg.callbackParam           = handle;
                 COMMON_TASK_post_message(&handle->commontaskMsg);
 #else
-                primask = DisableGlobalIRQ();
                 handle->serialManagerState[SERIAL_EVENT_DATA_RECEIVED]++;
-                EnableGlobalIRQ(primask);
                 (void)OSA_SemaphorePost((osa_semaphore_handle_t)handle->serSemaphore);
 #endif
 
@@ -891,9 +889,7 @@ void SerialManager_RxCallback(void *callbackParam,
     if (0U != ringBufferLength)
     {
 #if (defined(SERIAL_MANAGER_TASK_HANDLE_RX_AVAILABLE_NOTIFY) && (SERIAL_MANAGER_TASK_HANDLE_RX_AVAILABLE_NOTIFY > 0U))
-        primask = DisableGlobalIRQ();
         handle->serialManagerState[SERIAL_EVENT_DATA_RX_NOTIFY]++;
-        EnableGlobalIRQ(primask);
         (void)OSA_SemaphorePost((osa_semaphore_handle_t)handle->serSemaphore);
 
         (void)status; /* Fix "set but never used" warning. */
diff --git a/devices/LPC55S69/drivers/fsl_clock.c b/devices/LPC55S69/drivers/fsl_clock.c
index 97328b4c1..b932aab36 100644
--- a/devices/LPC55S69/drivers/fsl_clock.c
+++ b/devices/LPC55S69/drivers/fsl_clock.c
@@ -848,12 +848,14 @@ uint32_t CLOCK_GetFlexCommInputClock(uint32_t id)
 /* Get FLEXCOMM Clk */
 uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id)
 {
-    uint32_t freq = 0U;
-    uint32_t temp;
+    uint32_t freq   = 0U;
+    uint32_t frgMul = 0U;
+    uint32_t frgDiv = 0U;
 
-    freq = CLOCK_GetFlexCommInputClock(id);
-    temp = SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_MULT_MASK;
-    return freq / (1U + (temp) / ((SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_DIV_MASK) + 1U));
+    freq   = CLOCK_GetFlexCommInputClock(id);
+    frgMul = (SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_MULT_MASK) >> 8U;
+    frgDiv = SYSCON->FLEXFRGXCTRL[id] & SYSCON_FLEXFRG0CTRL_DIV_MASK;
+    return (uint32_t)(((uint64_t)freq * ((uint64_t)frgDiv + 1ULL)) / (frgMul + frgDiv + 1UL));
 }
 
 /* Get HS_LPSI Clk */
diff --git a/docs/AzureRTOS/MCUXpresso SDK Azure RTOS Release Notes.pdf b/docs/AzureRTOS/MCUXpresso SDK Azure RTOS Release Notes.pdf
index e1de1051c..ceb2384a0 100644
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diff --git a/docs/MCUXpresso SDK ChangeLog_LPC55S69.pdf b/docs/MCUXpresso SDK ChangeLog_LPC55S69.pdf
index 8f4d300a8..acb44b958 100644
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diff --git a/docs/MCUXpresso SDK Release Notes for LPCXpresso55S69.pdf b/docs/MCUXpresso SDK Release Notes for LPCXpresso55S69.pdf
index 5d1e16cc2..1d7739576 100644
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diff --git a/middleware/maestro/inc/streamer_element_properties.h b/middleware/maestro/inc/streamer_element_properties.h
index 5af2a6b6a..50b7bc929 100644
--- a/middleware/maestro/inc/streamer_element_properties.h
+++ b/middleware/maestro/inc/streamer_element_properties.h
@@ -66,6 +66,8 @@ typedef struct {
 #define PROP_AUDIOSRC_SET_CONTINUOUS_READ           0x205
 #define PROP_AUDIOSRC_SET_DUMMY_TX_ENABLE           0x206
 #define PROP_AUDIOSRC_SET_NUM_CHANNELS              0x207
+#define PROP_AUDIOSRC_SET_BITS_PER_SAMPLE           0x208
+#define PROP_AUDIOSRC_SET_FRAME_MS                  0x209
 
 /* MEMORY SOURCE */
 #define PROP_MEMSRC_MASK                            0x300
diff --git a/middleware/maestro/inc/streamer_pcm.h b/middleware/maestro/inc/streamer_pcm.h
index 65c9f5d41..9e7b3fe64 100644
--- a/middleware/maestro/inc/streamer_pcm.h
+++ b/middleware/maestro/inc/streamer_pcm.h
@@ -144,12 +144,11 @@ int streamer_pcm_write(pcm_rtos_t *pcm, uint8_t *data, uint32_t size);
  * This function is called from the streamer to input raw audio data.
  *
  * @param pcm Pointer to PCM interface handle
- * @param data Pointer to data buffer with PCM data
- * @param next_buffer Pointer to next data buffer with PCM data
+ * @param data Pointer to next data buffer with PCM data
  * @param size Size in bytes of the data buffer
  * @return 0 on success, non-zero on failure
  */
-int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint8_t *next_buffer, uint32_t size);
+int streamer_pcm_read(pcm_rtos_t *pcm, uint8_t *data, uint32_t size);
 
 /*!
  * @brief Set PCM interface parameters
diff --git a/middleware/maestro/libs/cm33f/armgcc/release/libmaestro_streamer.a b/middleware/maestro/libs/cm33f/armgcc/release/libmaestro_streamer.a
index 73568b9f1..4302c9866 100644
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diff --git a/middleware/maestro/libs/cm33f/armgcc/release/libopus.a b/middleware/maestro/libs/cm33f/armgcc/release/libopus.a
index 395184061..422922e60 100644
Binary files a/middleware/maestro/libs/cm33f/armgcc/release/libopus.a and b/middleware/maestro/libs/cm33f/armgcc/release/libopus.a differ
diff --git a/middleware/maestro/mcu-audio/ogg/COPYING b/middleware/maestro/mcu-audio/ogg/COPYING
new file mode 100644
index 000000000..6111c6c5a
--- /dev/null
+++ b/middleware/maestro/mcu-audio/ogg/COPYING
@@ -0,0 +1,28 @@
+Copyright (c) 2002, Xiph.org Foundation
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+- Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+
+- Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+- Neither the name of the Xiph.org Foundation nor the names of its
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION
+OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/middleware/maestro/mcu-audio/opus/COPYING b/middleware/maestro/mcu-audio/opus/COPYING
new file mode 100644
index 000000000..9c739c34a
--- /dev/null
+++ b/middleware/maestro/mcu-audio/opus/COPYING
@@ -0,0 +1,44 @@
+Copyright 2001-2011 Xiph.Org, Skype Limited, Octasic,
+                    Jean-Marc Valin, Timothy B. Terriberry,
+                    CSIRO, Gregory Maxwell, Mark Borgerding,
+                    Erik de Castro Lopo
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+- Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+
+- Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+- Neither the name of Internet Society, IETF or IETF Trust, nor the
+names of specific contributors, may be used to endorse or promote
+products derived from this software without specific prior written
+permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+Opus is subject to the royalty-free patent licenses which are
+specified at:
+
+Xiph.Org Foundation:
+https://datatracker.ietf.org/ipr/1524/
+
+Microsoft Corporation:
+https://datatracker.ietf.org/ipr/1914/
+
+Broadcom Corporation:
+https://datatracker.ietf.org/ipr/1526/
diff --git a/middleware/maestro/mcu-audio/opus/include/opus_cci.h b/middleware/maestro/mcu-audio/opus/include/opus_cci.h
index f2c099c26..fbd5943bb 100644
--- a/middleware/maestro/mcu-audio/opus/include/opus_cci.h
+++ b/middleware/maestro/mcu-audio/opus/include/opus_cci.h
@@ -77,6 +77,18 @@ int OggOPUSInit (int *memory[], int *pCallbackFn[], int *pUserData);
 /////////////////////////////////////////////////////////////////////////////////
 int OggOPUSDecode(int *memory[],int *sampleProudced,int *bufOut);
 
+/////////////////////////////////////////////////////////////////////////////////
+//! \brief Decoder reset function to cleanup the decoder structures and free memory.
+//!
+//! \fntype Function
+//!
+//! \param[in] *memory              This is pointer to the decoder memory.
+//!
+//! \retval kCodecSuccess    if codec destroys successfully.
+//! \retval kCodecInitError     if codec fails to cleanup.
+/////////////////////////////////////////////////////////////////////////////////
+int OggOPUSReset(int *pMemory[]);
+
 /////////////////////////////////////////////////////////////////////////////////
 //! \brief Decoder seek function to seek at specific offset.
 //!
diff --git a/middleware/maestro/mcu-audio/opusfile/COPYING b/middleware/maestro/mcu-audio/opusfile/COPYING
new file mode 100644
index 000000000..7b53d665d
--- /dev/null
+++ b/middleware/maestro/mcu-audio/opusfile/COPYING
@@ -0,0 +1,28 @@
+Copyright (c) 1994-2013 Xiph.Org Foundation and contributors
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+- Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+
+- Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+
+- Neither the name of the Xiph.Org Foundation nor the names of its
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION
+OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/tools/cmake_toolchain_files/xclang.cmake b/tools/cmake_toolchain_files/xclang.cmake
index 239f172b0..478da4fad 100644
--- a/tools/cmake_toolchain_files/xclang.cmake
+++ b/tools/cmake_toolchain_files/xclang.cmake
@@ -1,5 +1,3 @@
-INCLUDE(CMakeForceCompiler)
-
 # TOOLCHAIN EXTENSION
 IF(WIN32)
     SET(TOOLCHAIN_EXT ".exe")
@@ -37,9 +35,11 @@ SET(TOOLCHAIN_BIN_DIR ${TOOLCHAIN_DIR}/bin)
 SET(CMAKE_SYSTEM_NAME Generic)
 SET(CMAKE_SYSTEM_PROCESSOR hifi4)
 
-CMAKE_FORCE_C_COMPILER(${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-clang${TOOLCHAIN_EXT} GNU)
-CMAKE_FORCE_CXX_COMPILER(${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-clang++${TOOLCHAIN_EXT} GNU)
+SET(CMAKE_C_COMPILER ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-clang${TOOLCHAIN_EXT})
+SET(CMAKE_CXX_COMPILER ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-clang++${TOOLCHAIN_EXT})
 SET(CMAKE_ASM_COMPILER ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-clang${TOOLCHAIN_EXT})
+set(CMAKE_C_COMPILER_FORCED TRUE)
+set(CMAKE_CXX_COMPILER_FORCED TRUE)
 
 SET(CMAKE_OBJCOPY ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objcopy CACHE INTERNAL "objcopy tool")
 SET(CMAKE_OBJDUMP ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objdump CACHE INTERNAL "objdump tool")
@@ -59,7 +59,4 @@ SET(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
 SET(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
 SET(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
 
-SET(EXECUTABLE_OUTPUT_PATH ${PROJECT_BINARY_DIR}/${CMAKE_BUILD_TYPE})
-SET(LIBRARY_OUTPUT_PATH ${PROJECT_BINARY_DIR}/${CMAKE_BUILD_TYPE})
-
 MESSAGE(STATUS "BUILD_TYPE: " ${CMAKE_BUILD_TYPE})