/* * Copyright 2017-2019 ,2021, 2023 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo product: Pins v8.0 processor: LPC55S69 package_id: LPC55S69JBD100 mcu_data: ksdk2_0 processor_version: 8.0.3 pin_labels: - {pin_num: '14', pin_signal: PIO0_16/FC4_TXD_SCL_MISO_WS/CLKOUT/CT_INP4/SECURE_GPIO0_16/ADC0_8, label: PHASE_B, identifier: PHASE_B} - {pin_num: '31', pin_signal: PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0, label: PHASE_A, identifier: PHASE_A} - {pin_num: '64', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0, label: WAKEUP, identifier: WAKEUP} - {pin_num: '59', pin_signal: PIO1_1/FC3_RXD_SDA_MOSI_DATA/CT_INP3/SCT_GPI5/HS_SPI_SSEL1/USB1_OVERCURRENTN/PLU_OUT4, label: HSPI_CS, identifier: HSPI_CS} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ #ifndef _PIN_MUX_H_ #define _PIN_MUX_H_ /*! * @addtogroup pin_mux * @{ */ /*********************************************************************************************************************** * API **********************************************************************************************************************/ #if defined(__cplusplus) extern "C" { #endif /*! * @brief Calls initialization functions. * */ void BOARD_InitBootPins(void); /*! * @brief Analog switch is open (disabled) */ #define IOCON_PIO_ASW_DI 0x00u /*! * @brief Enables digital function */ #define IOCON_PIO_DIGITAL_EN 0x0100u /*! * @brief Selects pin function 1 */ #define IOCON_PIO_FUNC1 0x01u /*! * @brief Selects pin function 6 */ #define IOCON_PIO_FUNC6 0x06u /*! * @brief Input function is not inverted */ #define IOCON_PIO_INV_DI 0x00u /*! * @brief No addition pin function */ #define IOCON_PIO_MODE_INACT 0x00u /*! * @brief Open drain is disabled */ #define IOCON_PIO_OPENDRAIN_DI 0x00u /*! * @brief Standard mode, output slew rate control is enabled */ #define IOCON_PIO_SLEW_STANDARD 0x00u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO0_16_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO0_16_FUNC_ALT0 0x00u /*! * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */ #define PIO0_16_MODE_PULL_UP 0x02u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO0_26_DIGIMODE_DIGITAL 0x01u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO1_18_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO1_18_FUNC_ALT0 0x00u /*! * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */ #define PIO1_18_MODE_PULL_UP 0x02u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO1_1_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 5. */ #define PIO1_1_FUNC_ALT5 0x05u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO1_2_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 6. */ #define PIO1_2_FUNC_ALT6 0x06u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO1_5_DIGIMODE_DIGITAL 0x01u /*! * @brief Selects pin function.: Alternative connection 0. */ #define PIO1_5_FUNC_ALT0 0x00u /*! * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */ #define PIO1_5_MODE_PULL_UP 0x02u /*! @name PIO1_1 (number 59), HSPI_CS @{ */ #define BOARD_INITPINS_HSPI_CS_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_HSPI_CS_PIN 1U /*!<@brief PORT pin number */ #define BOARD_INITPINS_HSPI_CS_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_18 (number 64), WAKEUP @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_WAKEUP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_WAKEUP_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_WAKEUP_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_WAKEUP_PIN 18U /*!<@brief PORT pin number */ #define BOARD_INITPINS_WAKEUP_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO0_16 (number 14), PHASE_B @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_PHASE_B_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_PHASE_B_GPIO_PIN_MASK (1U << 16U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_PHASE_B_PORT 0U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_PHASE_B_PIN 16U /*!<@brief PORT pin number */ #define BOARD_INITPINS_PHASE_B_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */ /* @} */ /*! @name PIO1_5 (number 31), PHASE_A @{ */ /* Symbols to be used with GPIO driver */ #define BOARD_INITPINS_PHASE_A_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ #define BOARD_INITPINS_PHASE_A_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */ #define BOARD_INITPINS_PHASE_A_PORT 1U /*!<@brief PORT peripheral base pointer */ #define BOARD_INITPINS_PHASE_A_PIN 5U /*!<@brief PORT pin number */ #define BOARD_INITPINS_PHASE_A_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */ #if defined(__cplusplus) } #endif /*! * @} */ #endif /* _PIN_MUX_H_ */ /*********************************************************************************************************************** * EOF **********************************************************************************************************************/