242 lines
5.4 KiB
C
242 lines
5.4 KiB
C
/******************************************************************************
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* @file arm_math_memory.h
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* @brief Public header file for CMSIS DSP Library
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* @version V1.9.0
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* @date 23 April 2021
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* Target Processor: Cortex-M and Cortex-A cores
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******************************************************************************/
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/*
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* Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _ARM_MATH_MEMORY_H_
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#define _ARM_MATH_MEMORY_H_
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#include "arm_math_types.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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@brief definition to read/write two 16 bit values.
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@deprecated
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*/
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#if defined ( __CC_ARM )
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#define __SIMD32_TYPE int32_t __packed
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#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
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#define __SIMD32_TYPE int32_t
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#elif defined ( __GNUC__ )
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#define __SIMD32_TYPE int32_t
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#elif defined ( __ICCARM__ )
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#define __SIMD32_TYPE int32_t __packed
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#elif defined ( __TI_ARM__ )
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#define __SIMD32_TYPE int32_t
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#elif defined ( __CSMC__ )
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#define __SIMD32_TYPE int32_t
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#elif defined ( __TASKING__ )
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#define __SIMD32_TYPE __un(aligned) int32_t
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#elif defined(_MSC_VER )
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#define __SIMD32_TYPE int32_t
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#else
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#error Unknown compiler
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#endif
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#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
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#define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr))
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#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr))
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#define __SIMD64(addr) (*( int64_t **) & (addr))
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/* SIMD replacement */
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/**
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@brief Read 2 Q15 from Q15 pointer.
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@param[in] pQ15 points to input value
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@return Q31 value
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*/
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__STATIC_FORCEINLINE q31_t read_q15x2 (
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q15_t * pQ15)
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{
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q31_t val;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (&val, pQ15, 4);
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#else
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val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ;
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#endif
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return (val);
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}
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/**
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@brief Read 2 Q15 from Q15 pointer and increment pointer afterwards.
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@param[in] pQ15 points to input value
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@return Q31 value
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*/
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__STATIC_FORCEINLINE q31_t read_q15x2_ia (
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q15_t ** pQ15)
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{
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q31_t val;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (&val, *pQ15, 4);
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#else
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val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
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#endif
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*pQ15 += 2;
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return (val);
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}
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/**
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@brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
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@param[in] pQ15 points to input value
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@return Q31 value
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*/
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__STATIC_FORCEINLINE q31_t read_q15x2_da (
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q15_t ** pQ15)
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{
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q31_t val;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (&val, *pQ15, 4);
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#else
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val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
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#endif
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*pQ15 -= 2;
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return (val);
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}
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/**
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@brief Write 2 Q15 to Q15 pointer and increment pointer afterwards.
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@param[in] pQ15 points to input value
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@param[in] value Q31 value
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@return none
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*/
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__STATIC_FORCEINLINE void write_q15x2_ia (
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q15_t ** pQ15,
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q31_t value)
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{
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q31_t val = value;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (*pQ15, &val, 4);
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#else
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(*pQ15)[0] = (val & 0x0FFFF);
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(*pQ15)[1] = (val >> 16) & 0x0FFFF;
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#endif
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*pQ15 += 2;
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}
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/**
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@brief Write 2 Q15 to Q15 pointer.
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@param[in] pQ15 points to input value
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@param[in] value Q31 value
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@return none
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*/
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__STATIC_FORCEINLINE void write_q15x2 (
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q15_t * pQ15,
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q31_t value)
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{
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q31_t val = value;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (pQ15, &val, 4);
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#else
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pQ15[0] = val & 0x0FFFF;
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pQ15[1] = val >> 16;
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#endif
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}
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/**
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@brief Read 4 Q7 from Q7 pointer and increment pointer afterwards.
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@param[in] pQ7 points to input value
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@return Q31 value
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*/
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__STATIC_FORCEINLINE q31_t read_q7x4_ia (
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q7_t ** pQ7)
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{
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q31_t val;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (&val, *pQ7, 4);
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#else
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val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) | ((*pQ7)[0] & 0x0FF);
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#endif
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*pQ7 += 4;
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return (val);
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}
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/**
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@brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
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@param[in] pQ7 points to input value
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@return Q31 value
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*/
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__STATIC_FORCEINLINE q31_t read_q7x4_da (
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q7_t ** pQ7)
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{
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q31_t val;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (&val, *pQ7, 4);
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#else
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val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) << 8) | ((*pQ7)[0] & 0x0FF);
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#endif
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*pQ7 -= 4;
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return (val);
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}
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/**
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@brief Write 4 Q7 to Q7 pointer and increment pointer afterwards.
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@param[in] pQ7 points to input value
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@param[in] value Q31 value
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@return none
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*/
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__STATIC_FORCEINLINE void write_q7x4_ia (
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q7_t ** pQ7,
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q31_t value)
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{
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q31_t val = value;
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#ifdef __ARM_FEATURE_UNALIGNED
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memcpy (*pQ7, &val, 4);
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#else
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(*pQ7)[0] = val & 0x0FF;
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(*pQ7)[1] = (val >> 8) & 0x0FF;
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(*pQ7)[2] = (val >> 16) & 0x0FF;
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(*pQ7)[3] = (val >> 24) & 0x0FF;
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#endif
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*pQ7 += 4;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /*ifndef _ARM_MATH_MEMORY_H_ */
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