102 lines
4.9 KiB
C
102 lines
4.9 KiB
C
/*
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* Copyright 2017-2019 ,2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/* clang-format off */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v9.0
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processor: LPC55S69
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package_id: LPC55S69JBD100
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mcu_data: ksdk2_0
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processor_version: 9.0.0
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* clang-format on */
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#include "fsl_common.h"
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#include "fsl_iocon.h"
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#include "pin_mux.h"
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitBootPins
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* Description : Calls initialization functions.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitBootPins(void)
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{
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BOARD_InitPins();
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}
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/* clang-format off */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitPins:
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- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
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mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
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- {pin_num: '21', peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1, mode: inactive,
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slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* clang-format on */
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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/* Function assigned for the Cortex-M33 (Core #0) */
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void BOARD_InitPins(void)
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{
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/* Enables the clock for the I/O controller.: Enable Clock. */
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CLOCK_EnableClock(kCLOCK_Iocon);
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const uint32_t port0_pin10_config = (/* Pin is configured as SWO */
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IOCON_PIO_FUNC6 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI |
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/* Analog switch is open (disabled) */
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IOCON_PIO_ASW_DI);
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/* PORT0 PIN10 (coords: 21) is configured as SWO */
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IOCON_PinMuxSet(IOCON, 0U, 10U, port0_pin10_config);
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const uint32_t port0_pin22_config = (/* Pin is configured as USB0_VBUS */
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IOCON_PIO_FUNC7 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
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IOCON_PinMuxSet(IOCON, 0U, 22U, port0_pin22_config);
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}
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/***********************************************************************************************************************
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* EOF
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**********************************************************************************************************************/
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