421 lines
22 KiB
C
421 lines
22 KiB
C
/*
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* Copyright 2017-2019 ,2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/* clang-format off */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v9.0
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processor: LPC55S69
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package_id: LPC55S69JBD100
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mcu_data: ksdk2_0
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processor_version: 9.0.0
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pin_labels:
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- {pin_num: '56', pin_signal: PIO0_18/FC4_CTS_SDA_SSEL0/SD0_WR_PRT/CTIMER1_MAT0/SCT0_OUT1/PLU_IN3/SECURE_GPIO0_18/ACMP0_C, label: PLU_IN3, identifier: PLU_IN3;PLU_OUT0}
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- {pin_num: '90', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19, label: PLU_IN4, identifier: PLU_IN4;PLU_OUT1}
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- {pin_num: '74', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
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label: PLU_IN5, identifier: PLU_IN5;PLU_OUT2}
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- {pin_num: '27', pin_signal: PIO0_27/FC2_TXD_SCL_MISO_WS/CTIMER3_MAT2/SCT0_OUT6/FC7_RXD_SDA_MOSI_DATA/PLU_OUT0/SECURE_GPIO0_27, label: PLU_OUT0, identifier: PLU_IN3;PLU_OUT0}
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- {pin_num: '58', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, label: PLU_OUT1, identifier: PLU_IN4;PLU_OUT1}
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- {pin_num: '4', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, label: PLU_OUT2, identifier: PLU_IN5;PLU_OUT2}
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- {pin_num: '1', pin_signal: PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A, label: LEDB, identifier: LEDB}
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- {pin_num: '9', pin_signal: PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4, label: LEDG, identifier: LEDG}
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- {pin_num: '5', pin_signal: PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3, label: LEDR, identifier: LEDR}
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- {pin_num: '64', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0, label: PLU_OUT0, identifier: PLU_OUT0}
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- {pin_num: '24', pin_signal: PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4, label: GPIO_PLU_IN3, identifier: GPIO_PLU_IN3}
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- {pin_num: '10', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12, label: GPIO_PLU_IN4, identifier: GPIO_PLU_IN4}
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- {pin_num: '40', pin_signal: PIO1_10/FC1_RXD_SDA_MOSI_DATA/CTIMER1_MAT0/SCT0_OUT3, label: GPIO_PLU_IN5, identifier: GPIO_PLU_IN5}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* clang-format on */
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#include "fsl_common.h"
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#include "fsl_gpio.h"
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#include "fsl_iocon.h"
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#include "pin_mux.h"
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitBootPins
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* Description : Calls initialization functions.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitBootPins(void)
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{
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BOARD_InitPins();
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}
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/* clang-format off */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitPins:
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- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
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mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
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- {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
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slew_rate: standard, invert: disabled, open_drain: disabled}
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- {pin_num: '14', peripheral: SYSCON, signal: CLKOUT, pin_signal: PIO0_16/FC4_TXD_SCL_MISO_WS/CLKOUT/CT_INP4/SECURE_GPIO0_16/ADC0_8}
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- {pin_num: '76', peripheral: PLU, signal: PLU_CLKIN, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21}
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- {pin_num: '56', peripheral: PLU, signal: 'INPUT, 3', pin_signal: PIO0_18/FC4_CTS_SDA_SSEL0/SD0_WR_PRT/CTIMER1_MAT0/SCT0_OUT1/PLU_IN3/SECURE_GPIO0_18/ACMP0_C,
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identifier: PLU_IN3, asw: disabled}
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- {pin_num: '90', peripheral: PLU, signal: 'INPUT, 4', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
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identifier: PLU_IN4}
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- {pin_num: '74', peripheral: PLU, signal: 'INPUT, 5', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
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identifier: PLU_IN5}
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- {pin_num: '64', peripheral: PLU, signal: 'OUT, 0', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0}
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- {pin_num: '58', peripheral: PLU, signal: 'OUT, 1', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, identifier: PLU_OUT1}
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- {pin_num: '4', peripheral: PLU, signal: 'OUT, 2', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, identifier: PLU_OUT2}
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- {pin_num: '24', peripheral: GPIO, signal: 'PIO1, 8', pin_signal: PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4, direction: OUTPUT, gpio_init_state: 'true'}
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- {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12, direction: OUTPUT, gpio_init_state: 'true',
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asw: disabled}
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- {pin_num: '40', peripheral: GPIO, signal: 'PIO1, 10', pin_signal: PIO1_10/FC1_RXD_SDA_MOSI_DATA/CTIMER1_MAT0/SCT0_OUT3, direction: OUTPUT, gpio_init_state: 'true'}
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- {pin_num: '1', peripheral: GPIO, signal: 'PIO1, 4', pin_signal: PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A, direction: INPUT}
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- {pin_num: '5', peripheral: GPIO, signal: 'PIO1, 6', pin_signal: PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3, direction: INPUT}
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- {pin_num: '9', peripheral: GPIO, signal: 'PIO1, 7', pin_signal: PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4, direction: INPUT}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* clang-format on */
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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/* Function assigned for the Cortex-M33 (Core #0) */
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void BOARD_InitPins(void)
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{
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/* Enables the clock for the I/O controller.: Enable Clock. */
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CLOCK_EnableClock(kCLOCK_Iocon);
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/* Enables the clock for the GPIO1 module */
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CLOCK_EnableClock(kCLOCK_Gpio1);
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gpio_pin_config_t LEDB_config = {
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.pinDirection = kGPIO_DigitalInput,
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.outputLogic = 0U
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};
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/* Initialize GPIO functionality on pin PIO1_4 (pin 1) */
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GPIO_PinInit(BOARD_INITPINS_LEDB_GPIO, BOARD_INITPINS_LEDB_PORT, BOARD_INITPINS_LEDB_PIN, &LEDB_config);
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gpio_pin_config_t LEDR_config = {
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.pinDirection = kGPIO_DigitalInput,
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.outputLogic = 0U
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};
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/* Initialize GPIO functionality on pin PIO1_6 (pin 5) */
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GPIO_PinInit(BOARD_INITPINS_LEDR_GPIO, BOARD_INITPINS_LEDR_PORT, BOARD_INITPINS_LEDR_PIN, &LEDR_config);
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gpio_pin_config_t LEDG_config = {
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.pinDirection = kGPIO_DigitalInput,
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.outputLogic = 0U
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};
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/* Initialize GPIO functionality on pin PIO1_7 (pin 9) */
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GPIO_PinInit(BOARD_INITPINS_LEDG_GPIO, BOARD_INITPINS_LEDG_PORT, BOARD_INITPINS_LEDG_PIN, &LEDG_config);
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gpio_pin_config_t GPIO_PLU_IN3_config = {
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.pinDirection = kGPIO_DigitalOutput,
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.outputLogic = 1U
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};
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/* Initialize GPIO functionality on pin PIO1_8 (pin 24) */
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GPIO_PinInit(BOARD_INITPINS_GPIO_PLU_IN3_GPIO, BOARD_INITPINS_GPIO_PLU_IN3_PORT, BOARD_INITPINS_GPIO_PLU_IN3_PIN, &GPIO_PLU_IN3_config);
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gpio_pin_config_t GPIO_PLU_IN4_config = {
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.pinDirection = kGPIO_DigitalOutput,
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.outputLogic = 1U
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};
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/* Initialize GPIO functionality on pin PIO1_9 (pin 10) */
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GPIO_PinInit(BOARD_INITPINS_GPIO_PLU_IN4_GPIO, BOARD_INITPINS_GPIO_PLU_IN4_PORT, BOARD_INITPINS_GPIO_PLU_IN4_PIN, &GPIO_PLU_IN4_config);
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gpio_pin_config_t GPIO_PLU_IN5_config = {
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.pinDirection = kGPIO_DigitalOutput,
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.outputLogic = 1U
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};
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/* Initialize GPIO functionality on pin PIO1_10 (pin 40) */
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GPIO_PinInit(BOARD_INITPINS_GPIO_PLU_IN5_GPIO, BOARD_INITPINS_GPIO_PLU_IN5_PORT, BOARD_INITPINS_GPIO_PLU_IN5_PIN, &GPIO_PLU_IN5_config);
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IOCON->PIO[0][16] = ((IOCON->PIO[0][16] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT016 (pin 14) is configured as CLKOUT. */
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| IOCON_PIO_FUNC(PIO0_16_FUNC_ALT2)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_16_DIGIMODE_DIGITAL));
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if (Chip_GetVersion()==1)
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{
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IOCON->PIO[0][18] = ((IOCON->PIO[0][18] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_ASW_MASK)))
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/* Selects pin function.
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* : PORT018 (pin 56) is configured as PLU_IN3. */
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| IOCON_PIO_FUNC(0x09u)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_18_DIGIMODE_DIGITAL)
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/* Analog switch input control.
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* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9,
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* analog switch is closed (enabled).
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* For the other pins, analog switch is open (disabled). */
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| IOCON_PIO_ASW(PIO0_18_ASW_VALUE0));
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}
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else
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{
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IOCON->PIO[0][18] = ((IOCON->PIO[0][18] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_ASW_MASK)))
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/* Selects pin function.
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* : PORT018 (pin 56) is configured as PLU_IN3. */
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| IOCON_PIO_FUNC(0x09u)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_18_DIGIMODE_DIGITAL)
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/* Analog switch input control.
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* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9,
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* analog switch is closed (enabled).
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* For the other pins, analog switch is open (disabled). */
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| IOCON_PIO_ASW(PIO0_18_ASW_VALUE1));
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}
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IOCON->PIO[0][19] = ((IOCON->PIO[0][19] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT019 (pin 90) is configured as PLU_IN4. */
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| IOCON_PIO_FUNC(0x09u)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_19_DIGIMODE_DIGITAL));
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IOCON->PIO[0][20] = ((IOCON->PIO[0][20] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT020 (pin 74) is configured as PLU_IN5. */
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| IOCON_PIO_FUNC(0x09u)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_20_DIGIMODE_DIGITAL));
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IOCON->PIO[0][21] = ((IOCON->PIO[0][21] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT021 (pin 76) is configured as PLU_CLKIN. */
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| IOCON_PIO_FUNC(0x09u)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO0_21_DIGIMODE_DIGITAL));
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const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
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IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
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const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
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IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
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IOCON->PIO[1][10] = ((IOCON->PIO[1][10] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT110 (pin 40) is configured as PIO1_10. */
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| IOCON_PIO_FUNC(PIO1_10_FUNC_ALT0)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO1_10_DIGIMODE_DIGITAL));
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IOCON->PIO[1][18] = ((IOCON->PIO[1][18] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT118 (pin 64) is configured as PLU_OUT0. */
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| IOCON_PIO_FUNC(PIO1_18_FUNC_ALT7)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO1_18_DIGIMODE_DIGITAL));
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IOCON->PIO[1][19] = ((IOCON->PIO[1][19] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT119 (pin 58) is configured as PLU_OUT1. */
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| IOCON_PIO_FUNC(PIO1_19_FUNC_ALT7)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO1_19_DIGIMODE_DIGITAL));
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IOCON->PIO[1][20] = ((IOCON->PIO[1][20] &
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/* Mask bits to zero which are setting */
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(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
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/* Selects pin function.
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* : PORT120 (pin 4) is configured as PLU_OUT2. */
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| IOCON_PIO_FUNC(PIO1_20_FUNC_ALT7)
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/* Select Digital mode.
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* : Enable Digital mode.
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* Digital input is enabled. */
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| IOCON_PIO_DIGIMODE(PIO1_20_DIGIMODE_DIGITAL));
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IOCON->PIO[1][4] = ((IOCON->PIO[1][4] &
|
|
/* Mask bits to zero which are setting */
|
|
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
|
|
|
/* Selects pin function.
|
|
* : PORT14 (pin 1) is configured as PIO1_4. */
|
|
| IOCON_PIO_FUNC(PIO1_4_FUNC_ALT0)
|
|
|
|
/* Select Digital mode.
|
|
* : Enable Digital mode.
|
|
* Digital input is enabled. */
|
|
| IOCON_PIO_DIGIMODE(PIO1_4_DIGIMODE_DIGITAL));
|
|
|
|
IOCON->PIO[1][6] = ((IOCON->PIO[1][6] &
|
|
/* Mask bits to zero which are setting */
|
|
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
|
|
|
/* Selects pin function.
|
|
* : PORT16 (pin 5) is configured as PIO1_6. */
|
|
| IOCON_PIO_FUNC(PIO1_6_FUNC_ALT0)
|
|
|
|
/* Select Digital mode.
|
|
* : Enable Digital mode.
|
|
* Digital input is enabled. */
|
|
| IOCON_PIO_DIGIMODE(PIO1_6_DIGIMODE_DIGITAL));
|
|
|
|
IOCON->PIO[1][7] = ((IOCON->PIO[1][7] &
|
|
/* Mask bits to zero which are setting */
|
|
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
|
|
|
/* Selects pin function.
|
|
* : PORT17 (pin 9) is configured as PIO1_7. */
|
|
| IOCON_PIO_FUNC(PIO1_7_FUNC_ALT0)
|
|
|
|
/* Select Digital mode.
|
|
* : Enable Digital mode.
|
|
* Digital input is enabled. */
|
|
| IOCON_PIO_DIGIMODE(PIO1_7_DIGIMODE_DIGITAL));
|
|
|
|
IOCON->PIO[1][8] = ((IOCON->PIO[1][8] &
|
|
/* Mask bits to zero which are setting */
|
|
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
|
|
|
/* Selects pin function.
|
|
* : PORT18 (pin 24) is configured as PIO1_8. */
|
|
| IOCON_PIO_FUNC(PIO1_8_FUNC_ALT0)
|
|
|
|
/* Select Digital mode.
|
|
* : Enable Digital mode.
|
|
* Digital input is enabled. */
|
|
| IOCON_PIO_DIGIMODE(PIO1_8_DIGIMODE_DIGITAL));
|
|
|
|
if (Chip_GetVersion()==1)
|
|
{
|
|
IOCON->PIO[1][9] = ((IOCON->PIO[1][9] &
|
|
/* Mask bits to zero which are setting */
|
|
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_ASW_MASK)))
|
|
|
|
/* Selects pin function.
|
|
* : PORT19 (pin 10) is configured as PIO1_9. */
|
|
| IOCON_PIO_FUNC(PIO1_9_FUNC_ALT0)
|
|
|
|
/* Select Digital mode.
|
|
* : Enable Digital mode.
|
|
* Digital input is enabled. */
|
|
| IOCON_PIO_DIGIMODE(PIO1_9_DIGIMODE_DIGITAL)
|
|
|
|
/* Analog switch input control.
|
|
* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9,
|
|
* analog switch is closed (enabled).
|
|
* For the other pins, analog switch is open (disabled). */
|
|
| IOCON_PIO_ASW(PIO1_9_ASW_VALUE0));
|
|
}
|
|
else
|
|
{
|
|
IOCON->PIO[1][9] = ((IOCON->PIO[1][9] &
|
|
/* Mask bits to zero which are setting */
|
|
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_ASW_MASK)))
|
|
|
|
/* Selects pin function.
|
|
* : PORT19 (pin 10) is configured as PIO1_9. */
|
|
| IOCON_PIO_FUNC(PIO1_9_FUNC_ALT0)
|
|
|
|
/* Select Digital mode.
|
|
* : Enable Digital mode.
|
|
* Digital input is enabled. */
|
|
| IOCON_PIO_DIGIMODE(PIO1_9_DIGIMODE_DIGITAL)
|
|
|
|
/* Analog switch input control.
|
|
* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9,
|
|
* analog switch is closed (enabled).
|
|
* For the other pins, analog switch is open (disabled). */
|
|
| IOCON_PIO_ASW(PIO1_9_ASW_VALUE1));
|
|
}
|
|
}
|
|
/***********************************************************************************************************************
|
|
* EOF
|
|
**********************************************************************************************************************/
|