284 lines
12 KiB
C
284 lines
12 KiB
C
/*
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* Copyright 2017-2019 ,2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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#ifndef _PIN_MUX_H_
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#define _PIN_MUX_H_
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/*!
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* @addtogroup pin_mux
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* @{
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*/
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/***********************************************************************************************************************
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* API
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**********************************************************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Calls initialization functions.
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*
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*/
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void BOARD_InitBootPins(void);
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/*!
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* @brief Enables digital function */
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#define IOCON_PIO_DIGITAL_EN 0x0100u
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/*!
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* @brief Selects pin function 1 */
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#define IOCON_PIO_FUNC1 0x01u
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/*!
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* @brief Input function is not inverted */
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#define IOCON_PIO_INV_DI 0x00u
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/*!
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* @brief No addition pin function */
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#define IOCON_PIO_MODE_INACT 0x00u
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/*!
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* @brief Open drain is disabled */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u
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/*!
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* @brief Standard mode, output slew rate control is enabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO0_16_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 2. */
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#define PIO0_16_FUNC_ALT2 0x02u
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/*!
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* @brief
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* Analog switch input control.
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* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9, analog switch is closed
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* (enabled).
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* For the other pins, analog switch is open (disabled).
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*/
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#define PIO0_18_ASW_VALUE0 0x00u
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/*!
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* @brief
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* Analog switch input control.
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* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9, analog switch is closed
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* (enabled).
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* For the other pins, analog switch is open (disabled).
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*/
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#define PIO0_18_ASW_VALUE1 0x01u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO0_18_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO0_19_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO0_20_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO0_21_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_10_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_10_FUNC_ALT0 0x00u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_18_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 7. */
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#define PIO1_18_FUNC_ALT7 0x07u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_19_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 7. */
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#define PIO1_19_FUNC_ALT7 0x07u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_20_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 7. */
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#define PIO1_20_FUNC_ALT7 0x07u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_4_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_4_FUNC_ALT0 0x00u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_6_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_6_FUNC_ALT0 0x00u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_7_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_7_FUNC_ALT0 0x00u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_8_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_8_FUNC_ALT0 0x00u
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/*!
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* @brief
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* Analog switch input control.
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* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9, analog switch is closed
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* (enabled).
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* For the other pins, analog switch is open (disabled).
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*/
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#define PIO1_9_ASW_VALUE0 0x00u
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/*!
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* @brief
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* Analog switch input control.
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* : For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and PIO1_9, analog switch is closed
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* (enabled).
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* For the other pins, analog switch is open (disabled).
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*/
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#define PIO1_9_ASW_VALUE1 0x01u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_9_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_9_FUNC_ALT0 0x00u
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/*! @name PIO0_18 (number 56), PLU_IN3
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@{ */
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#define BOARD_INITPINS_PLU_IN3_PORT 0U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PLU_IN3_PIN 18U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PLU_IN3_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO0_19 (number 90), PLU_IN4
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@{ */
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#define BOARD_INITPINS_PLU_IN4_PORT 0U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PLU_IN4_PIN 19U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PLU_IN4_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO0_20 (number 74), PLU_IN5
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@{ */
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#define BOARD_INITPINS_PLU_IN5_PORT 0U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PLU_IN5_PIN 20U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PLU_IN5_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_18 (number 64), PLU_OUT0
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@{ */
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#define BOARD_INITPINS_PLU_OUT0_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PLU_OUT0_PIN 18U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PLU_OUT0_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_19 (number 58), PLU_OUT1
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@{ */
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#define BOARD_INITPINS_PLU_OUT1_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PLU_OUT1_PIN 19U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PLU_OUT1_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_20 (number 4), PLU_OUT2
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@{ */
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#define BOARD_INITPINS_PLU_OUT2_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PLU_OUT2_PIN 20U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PLU_OUT2_PIN_MASK (1U << 20U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_8 (number 24), GPIO_PLU_IN3
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_GPIO_PLU_IN3_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_GPIO_PLU_IN3_GPIO_PIN_MASK (1U << 8U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_GPIO_PLU_IN3_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_GPIO_PLU_IN3_PIN 8U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_GPIO_PLU_IN3_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_9 (number 10), GPIO_PLU_IN4
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_GPIO_PLU_IN4_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_GPIO_PLU_IN4_GPIO_PIN_MASK (1U << 9U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_GPIO_PLU_IN4_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_GPIO_PLU_IN4_PIN 9U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_GPIO_PLU_IN4_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_10 (number 40), GPIO_PLU_IN5
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_GPIO_PLU_IN5_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_GPIO_PLU_IN5_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_GPIO_PLU_IN5_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_GPIO_PLU_IN5_PIN 10U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_GPIO_PLU_IN5_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_4 (number 1), LEDB
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_LEDB_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_LEDB_GPIO_PIN_MASK (1U << 4U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_LEDB_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_LEDB_PIN 4U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_LEDB_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_6 (number 5), LEDR
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_LEDR_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_LEDR_GPIO_PIN_MASK (1U << 6U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_LEDR_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_LEDR_PIN 6U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_LEDR_PIN_MASK (1U << 6U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_7 (number 9), LEDG
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_LEDG_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_LEDG_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_LEDG_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_LEDG_PIN 7U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_LEDG_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */
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/* @} */
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/*!
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* @brief Configures pin routing and optionally pin electrical features.
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*
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*/
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void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _PIN_MUX_H_ */
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/***********************************************************************************************************************
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* EOF
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**********************************************************************************************************************/
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