683 lines
24 KiB
C
683 lines
24 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FSL_CTIMER_H_
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#define FSL_CTIMER_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup ctimer
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* @{
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*/
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/*! @file */
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*! @{ */
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#define FSL_CTIMER_DRIVER_VERSION (MAKE_VERSION(2, 3, 1)) /*!< Version 2.3.1 */
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/*! @} */
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/*! @brief List of Timer capture channels */
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typedef enum _ctimer_capture_channel
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{
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kCTIMER_Capture_0 = 0U, /*!< Timer capture channel 0 */
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kCTIMER_Capture_1, /*!< Timer capture channel 1 */
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
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kCTIMER_Capture_2, /*!< Timer capture channel 2 */
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#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
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#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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kCTIMER_Capture_3 /*!< Timer capture channel 3 */
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#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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} ctimer_capture_channel_t;
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/*! @brief List of capture edge options */
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typedef enum _ctimer_capture_edge
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{
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kCTIMER_Capture_RiseEdge = 1U, /*!< Capture on rising edge */
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kCTIMER_Capture_FallEdge = 2U, /*!< Capture on falling edge */
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kCTIMER_Capture_BothEdge = 3U, /*!< Capture on rising and falling edge */
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} ctimer_capture_edge_t;
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/*! @brief List of Timer match registers */
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typedef enum _ctimer_match
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{
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kCTIMER_Match_0 = 0U, /*!< Timer match register 0 */
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kCTIMER_Match_1, /*!< Timer match register 1 */
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kCTIMER_Match_2, /*!< Timer match register 2 */
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kCTIMER_Match_3 /*!< Timer match register 3 */
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} ctimer_match_t;
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/*! @brief List of external match */
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typedef enum _ctimer_external_match
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{
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kCTIMER_External_Match_0 = (1UL << 0), /*!< External match 0 */
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kCTIMER_External_Match_1 = (1UL << 1), /*!< External match 1 */
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kCTIMER_External_Match_2 = (1UL << 2), /*!< External match 2 */
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kCTIMER_External_Match_3 = (1UL << 3) /*!< External match 3 */
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} ctimer_external_match_t;
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/*! @brief List of output control options */
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typedef enum _ctimer_match_output_control
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{
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kCTIMER_Output_NoAction = 0U, /*!< No action is taken */
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kCTIMER_Output_Clear, /*!< Clear the EM bit/output to 0 */
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kCTIMER_Output_Set, /*!< Set the EM bit/output to 1 */
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kCTIMER_Output_Toggle /*!< Toggle the EM bit/output */
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} ctimer_match_output_control_t;
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/*! @brief List of Timer modes */
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typedef enum _ctimer_timer_mode
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{
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kCTIMER_TimerMode = 0U, /* TC is incremented every rising APB bus clock edge */
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kCTIMER_IncreaseOnRiseEdge, /* TC is incremented on rising edge of input signal */
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kCTIMER_IncreaseOnFallEdge, /* TC is incremented on falling edge of input signal */
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kCTIMER_IncreaseOnBothEdge /* TC is incremented on both edges of input signal */
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} ctimer_timer_mode_t;
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/*! @brief List of Timer interrupts */
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typedef enum _ctimer_interrupt_enable
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{
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kCTIMER_Match0InterruptEnable = CTIMER_MCR_MR0I_MASK, /*!< Match 0 interrupt */
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kCTIMER_Match1InterruptEnable = CTIMER_MCR_MR1I_MASK, /*!< Match 1 interrupt */
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kCTIMER_Match2InterruptEnable = CTIMER_MCR_MR2I_MASK, /*!< Match 2 interrupt */
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kCTIMER_Match3InterruptEnable = CTIMER_MCR_MR3I_MASK, /*!< Match 3 interrupt */
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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kCTIMER_Capture0InterruptEnable = CTIMER_CCR_CAP0I_MASK, /*!< Capture 0 interrupt */
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kCTIMER_Capture1InterruptEnable = CTIMER_CCR_CAP1I_MASK, /*!< Capture 1 interrupt */
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
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kCTIMER_Capture2InterruptEnable = CTIMER_CCR_CAP2I_MASK, /*!< Capture 2 interrupt */
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#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
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#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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kCTIMER_Capture3InterruptEnable = CTIMER_CCR_CAP3I_MASK, /*!< Capture 3 interrupt */
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#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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#endif
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} ctimer_interrupt_enable_t;
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/*! @brief List of Timer flags */
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typedef enum _ctimer_status_flags
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{
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kCTIMER_Match0Flag = CTIMER_IR_MR0INT_MASK, /*!< Match 0 interrupt flag */
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kCTIMER_Match1Flag = CTIMER_IR_MR1INT_MASK, /*!< Match 1 interrupt flag */
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kCTIMER_Match2Flag = CTIMER_IR_MR2INT_MASK, /*!< Match 2 interrupt flag */
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kCTIMER_Match3Flag = CTIMER_IR_MR3INT_MASK, /*!< Match 3 interrupt flag */
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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kCTIMER_Capture0Flag = CTIMER_IR_CR0INT_MASK, /*!< Capture 0 interrupt flag */
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kCTIMER_Capture1Flag = CTIMER_IR_CR1INT_MASK, /*!< Capture 1 interrupt flag */
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT) && FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT)
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kCTIMER_Capture2Flag = CTIMER_IR_CR2INT_MASK, /*!< Capture 2 interrupt flag */
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#endif /* FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT */
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#if defined(FSL_FEATURE_CTIMER_HAS_IR_CR3INT) && FSL_FEATURE_CTIMER_HAS_IR_CR3INT
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kCTIMER_Capture3Flag = CTIMER_IR_CR3INT_MASK, /*!< Capture 3 interrupt flag */
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#endif /* FSL_FEATURE_CTIMER_HAS_IR_CR3INT */
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#endif
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} ctimer_status_flags_t;
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typedef void (*ctimer_callback_t)(uint32_t flags);
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/*! @brief Callback type when registering for a callback. When registering a callback
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* an array of function pointers is passed the size could be 1 or 8, the callback
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* type will tell that.
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*/
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typedef enum
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{
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kCTIMER_SingleCallback, /*!< Single Callback type where there is only one callback for the timer.
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based on the status flags different channels needs to be handled differently */
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kCTIMER_MultipleCallback /*!< Multiple Callback type where there can be 8 valid callbacks, one per channel.
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for both match/capture */
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} ctimer_callback_type_t;
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/*!
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* @brief Match configuration
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*
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* This structure holds the configuration settings for each match register.
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*/
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typedef struct _ctimer_match_config
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{
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uint32_t matchValue; /*!< This is stored in the match register */
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bool enableCounterReset; /*!< true: Match will reset the counter
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false: Match will not reser the counter */
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bool enableCounterStop; /*!< true: Match will stop the counter
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false: Match will not stop the counter */
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ctimer_match_output_control_t outControl; /*!< Action to be taken on a match on the EM bit/output */
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bool outPinInitState; /*!< Initial value of the EM bit/output */
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bool enableInterrupt; /*!< true: Generate interrupt upon match
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false: Do not generate interrupt on match */
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} ctimer_match_config_t;
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/*!
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* @brief Timer configuration structure
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*
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* This structure holds the configuration settings for the Timer peripheral. To initialize this
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* structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a
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* pointer to the configuration structure instance.
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*
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* The configuration structure can be made constant so as to reside in flash.
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*/
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typedef struct _ctimer_config
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{
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ctimer_timer_mode_t mode; /*!< Timer mode */
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ctimer_capture_channel_t input; /*!< Input channel to increment the timer, used only in timer
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modes that rely on this input signal to increment TC */
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uint32_t prescale; /*!< Prescale value */
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} ctimer_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Ungates the clock and configures the peripheral for basic operation.
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*
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* @note This API should be called at the beginning of the application before using the driver.
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*
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* @param base Ctimer peripheral base address
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* @param config Pointer to the user configuration structure.
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*/
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void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config);
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/*!
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* @brief Gates the timer clock.
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*
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* @param base Ctimer peripheral base address
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*/
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void CTIMER_Deinit(CTIMER_Type *base);
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/*!
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* @brief Fills in the timers configuration structure with the default settings.
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*
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* The default values are:
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* @code
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* config->mode = kCTIMER_TimerMode;
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* config->input = kCTIMER_Capture_0;
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* config->prescale = 0;
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* @endcode
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* @param config Pointer to the user configuration structure.
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*/
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void CTIMER_GetDefaultConfig(ctimer_config_t *config);
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/*! @}*/
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/*!
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* @name PWM setup operations
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* @{
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*/
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/*!
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* @brief Configures the PWM signal parameters.
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*
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* Enables PWM mode on the match channel passed in and will then setup the match value
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* and other match parameters to generate a PWM signal.
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* This function can manually assign the specified channel to set the PWM cycle.
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*
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* @note When setting PWM output from multiple output pins, all should use the same PWM
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* period
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*
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* @param base Ctimer peripheral base address
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* @param pwmPeriodChannel Specify the channel to control the PWM period
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* @param matchChannel Match pin to be used to output the PWM signal
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* @param pwmPeriod PWM period match value
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* @param pulsePeriod Pulse width match value
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* @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
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* if it is 0 then no interrupt will be generated.
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*/
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status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base,
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const ctimer_match_t pwmPeriodChannel,
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ctimer_match_t matchChannel,
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uint32_t pwmPeriod,
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uint32_t pulsePeriod,
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bool enableInt);
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/*!
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* @brief Configures the PWM signal parameters.
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*
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* Enables PWM mode on the match channel passed in and will then setup the match value
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* and other match parameters to generate a PWM signal.
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* This function can manually assign the specified channel to set the PWM cycle.
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*
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* @note When setting PWM output from multiple output pins, all should use the same PWM
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* frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.
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*
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* @param base Ctimer peripheral base address
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* @param pwmPeriodChannel Specify the channel to control the PWM period
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* @param matchChannel Match pin to be used to output the PWM signal
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* @param dutyCyclePercent PWM pulse width; the value should be between 0 to 100
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* @param pwmFreq_Hz PWM signal frequency in Hz
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* @param srcClock_Hz Timer counter clock in Hz
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* @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
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* if it is 0 then no interrupt will be generated.
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*/
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status_t CTIMER_SetupPwm(CTIMER_Type *base,
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const ctimer_match_t pwmPeriodChannel,
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ctimer_match_t matchChannel,
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uint8_t dutyCyclePercent,
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uint32_t pwmFreq_Hz,
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uint32_t srcClock_Hz,
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bool enableInt);
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/*!
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* @brief Updates the pulse period of an active PWM signal.
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*
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* @param base Ctimer peripheral base address
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* @param matchChannel Match pin to be used to output the PWM signal
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* @param pulsePeriod New PWM pulse width match value
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*/
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static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)
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{
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/* Update PWM pulse period match value */
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base->MR[matchChannel] = pulsePeriod;
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}
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/*!
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* @brief Updates the duty cycle of an active PWM signal.
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*
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* @note Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution.
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* This function can manually assign the specified channel to set the PWM cycle.
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*
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* @param base Ctimer peripheral base address
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* @param pwmPeriodChannel Specify the channel to control the PWM period
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* @param matchChannel Match pin to be used to output the PWM signal
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* @param dutyCyclePercent New PWM pulse width; the value should be between 0 to 100
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*/
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void CTIMER_UpdatePwmDutycycle(CTIMER_Type *base,
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const ctimer_match_t pwmPeriodChannel,
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ctimer_match_t matchChannel,
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uint8_t dutyCyclePercent);
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/*! @}*/
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/*!
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* @brief Setup the match register.
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*
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* User configuration is used to setup the match value and action to be taken when a match occurs.
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*
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* @param base Ctimer peripheral base address
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* @param matchChannel Match register to configure
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* @param config Pointer to the match configuration structure
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*/
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void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config);
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/*!
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* @brief Get the status of output match.
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*
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* This function gets the status of output MAT, whether or not this output is connected to a pin.
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* This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.
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*
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* @param base Ctimer peripheral base address
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* @param matchChannel External match channel, user can obtain the status of multiple match channels
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* at the same time by using the logic of "|"
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* enumeration ::ctimer_external_match_t
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* @return The mask of external match channel status flags. Users need to use the
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* _ctimer_external_match type to decode the return variables.
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*/
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uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel);
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/*!
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* @brief Setup the capture.
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*
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* @param base Ctimer peripheral base address
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* @param capture Capture channel to configure
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* @param edge Edge on the channel that will trigger a capture
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* @param enableInt Flag to enable channel interrupts, if enabled then the registered call back
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* is called upon capture
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*/
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void CTIMER_SetupCapture(CTIMER_Type *base,
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ctimer_capture_channel_t capture,
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ctimer_capture_edge_t edge,
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bool enableInt);
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/*!
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* @brief Get the timer count value from TC register.
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*
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* @param base Ctimer peripheral base address.
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* @return return the timer count value.
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*/
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static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)
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{
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return (base->TC);
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}
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/*!
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* @brief Register callback.
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*
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* @param base Ctimer peripheral base address
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* @param cb_func callback function
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* @param cb_type callback function type, singular or multiple
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*/
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void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type);
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/*!
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* @name Interrupt Interface
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* @{
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*/
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/*!
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* @brief Enables the selected Timer interrupts.
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*
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* @param base Ctimer peripheral base address
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* @param mask The interrupts to enable. This is a logical OR of members of the
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* enumeration ::ctimer_interrupt_enable_t
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*/
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static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)
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{
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/* Enable match interrupts */
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base->MCR |= mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
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/* Enable capture interrupts */
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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base->CCR |= mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
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| CTIMER_CCR_CAP2I_MASK
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#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
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#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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| CTIMER_CCR_CAP3I_MASK
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#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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);
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#endif
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}
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/*!
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* @brief Disables the selected Timer interrupts.
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*
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* @param base Ctimer peripheral base address
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* @param mask The interrupts to enable. This is a logical OR of members of the
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* enumeration ::ctimer_interrupt_enable_t
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*/
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static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)
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{
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/* Disable match interrupts */
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base->MCR &= ~(mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK));
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/* Disable capture interrupts */
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
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base->CCR &= ~(mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK
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#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
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| CTIMER_CCR_CAP2I_MASK
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#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
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#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
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| CTIMER_CCR_CAP3I_MASK
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#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
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));
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#endif
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}
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/*!
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* @brief Gets the enabled Timer interrupts.
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*
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* @param base Ctimer peripheral base address
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*
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* @return The enabled interrupts. This is the logical OR of members of the
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* enumeration ::ctimer_interrupt_enable_t
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*/
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static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)
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{
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uint32_t enabledIntrs = 0;
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/* Get all the match interrupts enabled */
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enabledIntrs =
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base->MCR & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
|
|
|
|
/* Get all the capture interrupts enabled */
|
|
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE) && (FSL_FEATURE_CTIMER_HAS_NO_INPUT_CAPTURE))
|
|
enabledIntrs |= base->CCR & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK
|
|
#if !(defined(FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2) && FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2)
|
|
| CTIMER_CCR_CAP2I_MASK
|
|
#endif /* FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 */
|
|
#if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
|
|
| CTIMER_CCR_CAP3I_MASK
|
|
#endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
|
|
);
|
|
#endif
|
|
|
|
return enabledIntrs;
|
|
}
|
|
|
|
/*! @}*/
|
|
|
|
/*!
|
|
* @name Status Interface
|
|
* @{
|
|
*/
|
|
|
|
/*!
|
|
* @brief Gets the Timer status flags.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
*
|
|
* @return The status flags. This is the logical OR of members of the
|
|
* enumeration ::ctimer_status_flags_t
|
|
*/
|
|
static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)
|
|
{
|
|
return base->IR;
|
|
}
|
|
|
|
/*!
|
|
* @brief Clears the Timer status flags.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
* @param mask The status flags to clear. This is a logical OR of members of the
|
|
* enumeration ::ctimer_status_flags_t
|
|
*/
|
|
static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)
|
|
{
|
|
base->IR = mask;
|
|
}
|
|
|
|
/*! @}*/
|
|
|
|
/*!
|
|
* @name Counter Start and Stop
|
|
* @{
|
|
*/
|
|
|
|
/*!
|
|
* @brief Starts the Timer counter.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
*/
|
|
static inline void CTIMER_StartTimer(CTIMER_Type *base)
|
|
{
|
|
base->TCR |= CTIMER_TCR_CEN_MASK;
|
|
}
|
|
|
|
/*!
|
|
* @brief Stops the Timer counter.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
*/
|
|
static inline void CTIMER_StopTimer(CTIMER_Type *base)
|
|
{
|
|
base->TCR &= ~CTIMER_TCR_CEN_MASK;
|
|
}
|
|
|
|
/*! @}*/
|
|
|
|
/*!
|
|
* @brief Reset the counter.
|
|
*
|
|
* The timer counter and prescale counter are reset on the next positive edge of the APB clock.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
*/
|
|
static inline void CTIMER_Reset(CTIMER_Type *base)
|
|
{
|
|
base->TCR |= CTIMER_TCR_CRST_MASK;
|
|
base->TCR &= ~CTIMER_TCR_CRST_MASK;
|
|
}
|
|
|
|
/*!
|
|
* @brief Setup the timer prescale value.
|
|
*
|
|
* Specifies the maximum value for the Prescale Counter.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
* @param prescale Prescale value
|
|
*/
|
|
static inline void CTIMER_SetPrescale(CTIMER_Type *base, uint32_t prescale)
|
|
{
|
|
base->PR = CTIMER_PR_PRVAL(prescale);
|
|
}
|
|
|
|
/*!
|
|
* @brief Get capture channel value.
|
|
*
|
|
* Get the counter/timer value on the corresponding capture channel.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
* @param capture Select capture channel
|
|
*
|
|
* @return The timer count capture value.
|
|
*/
|
|
static inline uint32_t CTIMER_GetCaptureValue(CTIMER_Type *base, ctimer_capture_channel_t capture)
|
|
{
|
|
return base->CR[capture];
|
|
}
|
|
|
|
/*!
|
|
* @brief Enable reset match channel.
|
|
*
|
|
* Set the specified match channel reset operation.
|
|
*
|
|
* @param base Ctimer peripheral base address
|
|
* @param match match channel used
|
|
* @param enable Enable match channel reset operation.
|
|
*/
|
|
static inline void CTIMER_EnableResetMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)
|
|
{
|
|
if (enable)
|
|
{
|
|
base->MCR |= (1UL << (CTIMER_MCR_MR0R_SHIFT + ((uint32_t)match * 3U)));
|
|
}
|
|
else
|
|
{
|
|
base->MCR &= ~(1UL << (CTIMER_MCR_MR0R_SHIFT + ((uint32_t)match * 3U)));
|
|
}
|
|
}
|
|
|
|
/*!
|
|
* @brief Enable stop match channel.
|
|
*
|
|
* Set the specified match channel stop operation.
|
|
*
|
|
* @param base Ctimer peripheral base address.
|
|
* @param match match channel used.
|
|
* @param enable Enable match channel stop operation.
|
|
*/
|
|
static inline void CTIMER_EnableStopMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)
|
|
{
|
|
if (enable)
|
|
{
|
|
base->MCR |= (1UL << (CTIMER_MCR_MR0S_SHIFT + ((uint32_t)match * 3U)));
|
|
}
|
|
else
|
|
{
|
|
base->MCR &= ~(1UL << (CTIMER_MCR_MR0S_SHIFT + ((uint32_t)match * 3U)));
|
|
}
|
|
}
|
|
|
|
#if (defined(FSL_FEATURE_CTIMER_HAS_MSR) && (FSL_FEATURE_CTIMER_HAS_MSR))
|
|
/*!
|
|
* @brief Enable reload channel falling edge.
|
|
*
|
|
* Enable the specified match channel reload match shadow value.
|
|
*
|
|
* @param base Ctimer peripheral base address.
|
|
* @param match match channel used.
|
|
* @param enable Enable .
|
|
*/
|
|
static inline void CTIMER_EnableMatchChannelReload(CTIMER_Type *base, ctimer_match_t match, bool enable)
|
|
{
|
|
if (enable)
|
|
{
|
|
base->MCR |= (1UL << (CTIMER_MCR_MR0RL_SHIFT + (uint32_t)match));
|
|
}
|
|
else
|
|
{
|
|
base->MCR &= ~(1UL << (CTIMER_MCR_MR0RL_SHIFT + (uint32_t)match));
|
|
}
|
|
}
|
|
#endif /* FSL_FEATURE_CTIMER_HAS_MSR */
|
|
|
|
/*!
|
|
* @brief Enable capture channel rising edge.
|
|
*
|
|
* Sets the specified capture channel for rising edge capture.
|
|
*
|
|
* @param base Ctimer peripheral base address.
|
|
* @param capture capture channel used.
|
|
* @param enable Enable rising edge capture.
|
|
*/
|
|
static inline void CTIMER_EnableRisingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)
|
|
{
|
|
if (enable)
|
|
{
|
|
base->CCR |= (1UL << (CTIMER_CCR_CAP0RE_SHIFT + ((uint32_t)capture * 3U)));
|
|
}
|
|
else
|
|
{
|
|
base->CCR &= ~(1UL << (CTIMER_CCR_CAP0RE_SHIFT + ((uint32_t)capture * 3U)));
|
|
}
|
|
}
|
|
|
|
/*!
|
|
* @brief Enable capture channel falling edge.
|
|
*
|
|
* Sets the specified capture channel for falling edge capture.
|
|
*
|
|
* @param base Ctimer peripheral base address.
|
|
* @param capture capture channel used.
|
|
* @param enable Enable falling edge capture.
|
|
*/
|
|
static inline void CTIMER_EnableFallingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)
|
|
{
|
|
if (enable)
|
|
{
|
|
base->CCR |= (1UL << (CTIMER_CCR_CAP0FE_SHIFT + ((uint32_t)capture * 3U)));
|
|
}
|
|
else
|
|
{
|
|
base->CCR &= ~(1UL << (CTIMER_CCR_CAP0FE_SHIFT + ((uint32_t)capture * 3U)));
|
|
}
|
|
}
|
|
|
|
#if (defined(FSL_FEATURE_CTIMER_HAS_MSR) && (FSL_FEATURE_CTIMER_HAS_MSR))
|
|
/*!
|
|
* @brief Set the specified match shadow channel.
|
|
*
|
|
* @param base Ctimer peripheral base address.
|
|
* @param match match channel used.
|
|
* @param matchvalue Reload the value of the corresponding match register.
|
|
*/
|
|
static inline void CTIMER_SetShadowValue(CTIMER_Type *base, ctimer_match_t match, uint32_t matchvalue)
|
|
{
|
|
base->MSR[match] = matchvalue;
|
|
}
|
|
#endif /* FSL_FEATURE_CTIMER_HAS_MSR */
|
|
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif
|
|
|
|
/*! @}*/
|
|
|
|
#endif /* FSL_CTIMER_H_ */
|