195 lines
6.3 KiB
C
195 lines
6.3 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2021, 2023 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_inputmux.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.inputmux"
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#endif
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#if defined(INPUTMUX_RSTS)
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#define INPUTMUX_RESETS_ARRAY INPUTMUX_RSTS
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#endif
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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#if defined(INPUTMUX_RESETS_ARRAY)
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/*!
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* @brief Get instance number for INPUTMUX module.
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*
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* @param base INPUTMUX peripheral base address
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*/
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static uint32_t INPUTMUX_GetInstance(INPUTMUX_Type *base);
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#endif
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/*******************************************************************************
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* Variables
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******************************************************************************/
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#if defined(INPUTMUX_RESETS_ARRAY)
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/*! @brief Pointers to INPUTMUX bases for each instance. */
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static INPUTMUX_Type *const s_inputmuxBases[] = INPUTMUX_BASE_PTRS;
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/* Reset array */
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static const reset_ip_name_t s_inputmuxResets[] = INPUTMUX_RESETS_ARRAY;
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#endif
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/*******************************************************************************
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* Code
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******************************************************************************/
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#if defined(INPUTMUX_RESETS_ARRAY)
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static uint32_t INPUTMUX_GetInstance(INPUTMUX_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_inputmuxBases); instance++)
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{
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if (s_inputmuxBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_inputmuxBases));
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return instance;
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}
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#endif
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/*!
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* brief Initialize INPUTMUX peripheral.
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* This function enables the INPUTMUX clock.
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*
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* param base Base address of the INPUTMUX peripheral.
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*
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* retval None.
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*/
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void INPUTMUX_Init(INPUTMUX_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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#if defined(FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE) && FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE
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#if (defined(FSL_FEATURE_SOC_SCT_COUNT) && (FSL_FEATURE_SOC_SCT_COUNT > 0))
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CLOCK_EnableClock(kCLOCK_Sct);
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#endif /* FSL_FEATURE_SOC_SCT_COUNT */
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CLOCK_EnableClock(kCLOCK_Dma);
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#else
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CLOCK_EnableClock(kCLOCK_InputMux);
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#endif /* FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE */
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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#if defined(INPUTMUX_RESETS_ARRAY)
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RESET_ReleasePeripheralReset(s_inputmuxResets[INPUTMUX_GetInstance(base)]);
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#endif
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}
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/*!
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* brief Attaches a signal
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*
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* This function attaches multiplexed signals from INPUTMUX to target signals.
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* For example, to attach GPIO PORT0 Pin 5 to PINT peripheral, do the following:
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* code
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* INPUTMUX_AttachSignal(INPUTMUX, 2, kINPUTMUX_GpioPort0Pin5ToPintsel);
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* endcode
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* In this example, INTMUX has 8 registers for PINT, PINT_SEL0~PINT_SEL7.
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* With parameter p index specified as 2, this function configures register PINT_SEL2.
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*
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* param base Base address of the INPUTMUX peripheral.
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* param index The serial number of destination register in the group of INPUTMUX registers with same name.
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* param connection Applies signal from source signals collection to target signal.
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*
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* retval None.
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*/
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void INPUTMUX_AttachSignal(INPUTMUX_Type *base, uint32_t index, inputmux_connection_t connection)
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{
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uint32_t pmux_id;
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uint32_t output_id;
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/* extract pmux to be used */
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pmux_id = ((uint32_t)(connection)) >> PMUX_SHIFT;
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/* extract function number */
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output_id = ((uint32_t)(connection)) & ((1UL << PMUX_SHIFT) - 1U);
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/* programm signal */
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*(volatile uint32_t *)(((uint32_t)base) + pmux_id + (index * 4U)) = output_id;
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}
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#if defined(FSL_FEATURE_INPUTMUX_HAS_SIGNAL_ENA)
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/*!
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* brief Enable/disable a signal
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*
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* This function gates the INPUTPMUX clock.
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*
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* param base Base address of the INPUTMUX peripheral.
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* param signal Enable signal register id and bit offset.
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* param enable Selects enable or disable.
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*
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* retval None.
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*/
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void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable)
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{
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uint32_t ena_id;
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uint32_t ena_id_mask = (1UL << (32U - ENA_SHIFT)) - 1U;
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uint32_t bit_offset;
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#if defined(FSL_FEATURE_INPUTMUX_HAS_CHANNEL_MUX) && FSL_FEATURE_INPUTMUX_HAS_CHANNEL_MUX
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uint32_t chmux_offset;
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uint32_t chmux_value;
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/* Only enable need to update channel mux */
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if (enable && ((((uint32_t)signal) & (1UL << CHMUX_AVL_SHIFT)) != 0U))
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{
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chmux_offset = (((uint32_t)signal) >> CHMUX_OFF_SHIFT) & ((1UL << (CHMUX_AVL_SHIFT - CHMUX_OFF_SHIFT)) - 1UL);
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chmux_value = (((uint32_t)signal) >> CHMUX_VAL_SHIFT) & ((1UL << (CHMUX_OFF_SHIFT - CHMUX_VAL_SHIFT)) - 1UL);
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*(volatile uint32_t *)(((uint32_t)base) + chmux_offset) = chmux_value;
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}
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ena_id_mask = (1UL << (CHMUX_VAL_SHIFT - ENA_SHIFT)) - 1U;
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#endif
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/* extract enable register to be used */
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ena_id = (((uint32_t)signal) >> ENA_SHIFT) & ena_id_mask;
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/* extract enable bit offset */
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bit_offset = ((uint32_t)signal) & ((1UL << ENA_SHIFT) - 1U);
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/* set signal */
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if (enable)
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{
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*(volatile uint32_t *)(((uint32_t)base) + ena_id) |= (1UL << bit_offset);
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}
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else
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{
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*(volatile uint32_t *)(((uint32_t)base) + ena_id) &= ~(1UL << bit_offset);
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}
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}
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#endif
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/*!
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* brief Deinitialize INPUTMUX peripheral.
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* This function disables the INPUTMUX clock.
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*
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* param base Base address of the INPUTMUX peripheral.
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*
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* retval None.
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*/
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void INPUTMUX_Deinit(INPUTMUX_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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#if defined(FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE) && FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE
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#if (defined(FSL_FEATURE_SOC_SCT_COUNT) && (FSL_FEATURE_SOC_SCT_COUNT > 0))
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CLOCK_DisableClock(kCLOCK_Sct);
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#endif /* FSL_FEATURE_SOC_SCT_COUNT */
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CLOCK_DisableClock(kCLOCK_Dma);
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#else
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CLOCK_DisableClock(kCLOCK_InputMux);
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#endif /* FSL_FEATURE_INPUTMUX_HAS_NO_INPUTMUX_CLOCK_SOURCE */
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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