204 lines
7.0 KiB
C
204 lines
7.0 KiB
C
/*
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* Copyright 2019 NXP
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* All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_sysctl.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.sysctl"
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#endif
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get the instance.
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*
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* @param base SYSCTL peripheral base address.
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* @return Instance number.
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*/
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static uint32_t SYSCTL_GetInstance(SYSCTL_Type *base);
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/*!
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* @brief Enable SYSCTL write protect
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*
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* @param base SYSCTL peripheral base address.
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* @param regAddr register address
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* @param value value to write.
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*/
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static void SYSCTL_UpdateRegister(SYSCTL_Type *base, volatile uint32_t *regAddr, uint32_t value);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*! @brief SYSCTL base address array name */
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static SYSCTL_Type *const s_sysctlBase[] = SYSCTL_BASE_PTRS;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/*! @brief SYSCTL clock array name */
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static const clock_ip_name_t s_sysctlClock[] = SYSCTL_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/*******************************************************************************
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* Code
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******************************************************************************/
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static void SYSCTL_UpdateRegister(SYSCTL_Type *base, volatile uint32_t *regAddr, uint32_t value)
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{
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base->UPDATELCKOUT &= ~SYSCTL_UPDATELCKOUT_UPDATELCKOUT_MASK;
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*regAddr = value;
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base->UPDATELCKOUT |= SYSCTL_UPDATELCKOUT_UPDATELCKOUT_MASK;
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}
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static uint32_t SYSCTL_GetInstance(SYSCTL_Type *base)
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{
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uint8_t instance = 0;
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while ((instance < ARRAY_SIZE(s_sysctlBase)) && (s_sysctlBase[instance] != base))
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{
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instance++;
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}
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assert(instance < ARRAY_SIZE(s_sysctlBase));
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return instance;
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}
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/*!
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* @brief SYSCTL initial
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*
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* @param base Base address of the SYSCTL peripheral.
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*/
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void SYSCTL_Init(SYSCTL_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Enable SYSCTL clock. */
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CLOCK_EnableClock(s_sysctlClock[SYSCTL_GetInstance(base)]);
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#endif
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}
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/*!
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* @brief SYSCTL deinit
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*
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* @param base Base address of the SYSCTL peripheral.
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*/
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void SYSCTL_Deinit(SYSCTL_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Disable SYSCTL clock. */
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CLOCK_DisableClock(s_sysctlClock[SYSCTL_GetInstance(base)]);
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#endif
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}
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/*!
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* @brief SYSCTL share set configure for separate signal
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*
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* @param base Base address of the SYSCTL peripheral
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* @param flexCommIndex index of flexcomm,reference _sysctl_share_src
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* @param setIndex share set for sck, reference _sysctl_share_set_index
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*
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*/
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void SYSCTL_SetShareSet(SYSCTL_Type *base, uint32_t flexCommIndex, sysctl_fcctrlsel_signal_t signal, uint32_t set)
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{
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uint32_t tempReg = base->FCCTRLSEL[flexCommIndex];
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tempReg &= ~((uint32_t)SYSCTL_FCCTRLSEL_SCKINSEL_MASK << (uint32_t)signal);
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tempReg |= (set + 1U) << (uint32_t)signal;
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SYSCTL_UpdateRegister(base, &base->FCCTRLSEL[flexCommIndex], tempReg);
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}
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/*!
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* @brief SYSCTL share set configure for flexcomm
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*
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* @param base Base address of the SYSCTL peripheral.
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* @param flexCommIndex index of flexcomm, reference _sysctl_share_src
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* @param sckSet share set for sck,reference _sysctl_share_set_index
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* @param wsSet share set for ws, reference _sysctl_share_set_index
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* @param dataInSet share set for data in, reference _sysctl_share_set_index
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* @param dataOutSet share set for data out, reference _sysctl_share_set_index
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*
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*/
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void SYSCTL_SetFlexcommShareSet(
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SYSCTL_Type *base, uint32_t flexCommIndex, uint32_t sckSet, uint32_t wsSet, uint32_t dataInSet, uint32_t dataOutSet)
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{
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uint32_t tempReg = base->FCCTRLSEL[flexCommIndex];
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tempReg &= ~(SYSCTL_FCCTRLSEL_SCKINSEL_MASK | SYSCTL_FCCTRLSEL_WSINSEL_MASK | SYSCTL_FCCTRLSEL_DATAINSEL_MASK |
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SYSCTL_FCCTRLSEL_DATAOUTSEL_MASK);
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tempReg |= SYSCTL_FCCTRLSEL_SCKINSEL(sckSet + 1U) | SYSCTL_FCCTRLSEL_WSINSEL(wsSet + 1U) |
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SYSCTL_FCCTRLSEL_DATAINSEL(dataInSet + 1U) | SYSCTL_FCCTRLSEL_DATAOUTSEL(dataOutSet + 1U);
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SYSCTL_UpdateRegister(base, &base->FCCTRLSEL[flexCommIndex], tempReg);
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}
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/*!
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* @brief SYSCTL share set source configure
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*
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* @param base Base address of the SYSCTL peripheral
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* @param setIndex index of share set, reference _sysctl_share_set_index
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* @param sckShareSrc sck source for this share set,reference _sysctl_share_src
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* @param wsShareSrc ws source for this share set,reference _sysctl_share_src
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* @param dataInShareSrc data in source for this share set,reference _sysctl_share_src
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* @param dataOutShareSrc data out source for this share set,reference _sysctl_dataout_mask
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*
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*/
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void SYSCTL_SetShareSetSrc(SYSCTL_Type *base,
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uint32_t setIndex,
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uint32_t sckShareSrc,
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uint32_t wsShareSrc,
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uint32_t dataInShareSrc,
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uint32_t dataOutShareSrc)
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{
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uint32_t tempReg = base->SHAREDCTRLSET[setIndex];
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/* WS,SCK,DATA IN */
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tempReg &= ~(SYSCTL_SHAREDCTRLSET_SHAREDSCKSEL_MASK | SYSCTL_SHAREDCTRLSET_SHAREDWSSEL_MASK |
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SYSCTL_SHAREDCTRLSET_SHAREDDATASEL_MASK);
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tempReg |= SYSCTL_SHAREDCTRLSET_SHAREDSCKSEL(sckShareSrc) | SYSCTL_SHAREDCTRLSET_SHAREDWSSEL(wsShareSrc) |
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SYSCTL_SHAREDCTRLSET_SHAREDDATASEL(dataInShareSrc);
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/* data out */
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tempReg &= ~(SYSCTL_SHAREDCTRLSET_FC0DATAOUTEN_MASK | SYSCTL_SHAREDCTRLSET_FC1DATAOUTEN_MASK |
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SYSCTL_SHAREDCTRLSET_FC2DATAOUTEN_MASK | SYSCTL_SHAREDCTRLSET_FC6DATAOUTEN_MASK |
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SYSCTL_SHAREDCTRLSET_FC7DATAOUTEN_MASK);
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tempReg |= dataOutShareSrc;
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SYSCTL_UpdateRegister(base, &base->SHAREDCTRLSET[setIndex], tempReg);
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}
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/*!
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* @brief SYSCTL sck source configure
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*
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* @param base Base address of the SYSCTL peripheral
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* @param setIndex index of share set, reference _sysctl_share_set_index
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* @param sckShareSrc sck source fro this share set,reference _sysctl_share_src
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*
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*/
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void SYSCTL_SetShareSignalSrc(SYSCTL_Type *base,
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uint32_t setIndex,
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sysctl_sharedctrlset_signal_t signal,
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uint32_t shareSrc)
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{
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uint32_t tempReg = base->SHAREDCTRLSET[setIndex];
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if (signal == kSYSCTL_SharedCtrlSignalDataOut)
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{
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tempReg |= 1UL << ((uint32_t)signal + shareSrc);
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}
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else
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{
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tempReg &= ~((uint32_t)SYSCTL_SHAREDCTRLSET_SHAREDSCKSEL_MASK << (uint32_t)signal);
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tempReg |= shareSrc << (uint32_t)signal;
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}
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SYSCTL_UpdateRegister(base, &base->SHAREDCTRLSET[setIndex], tempReg);
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}
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