2925 lines
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2925 lines
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<div class="title">DMA: Direct Memory Access Controller Driver</div> </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
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<p>The MCUXpresso SDK provides a peripheral driver for the Direct Memory Access (DMA) of MCUXpresso SDK devices.</p>
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<h1><a class="anchor" id="DMATypicalUseCase"></a>
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Typical use case</h1>
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<h2><a class="anchor" id="DMAOper"></a>
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DMA Operation</h2>
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<p>Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/dma </p>
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Files</h2></td></tr>
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<tr class="memitem:a00193"><td class="memItemLeft" align="right" valign="top">file  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00193.html">fsl_dma.h</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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Data Structures</h2></td></tr>
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<tr class="memitem:a00318"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a00318">_dma_descriptor</a></td></tr>
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<tr class="memdesc:a00318"><td class="mdescLeft"> </td><td class="mdescRight">DMA descriptor structure. <a href="a00017.html#a00318">More...</a><br/></td></tr>
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<tr class="separator:a00318"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00321"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a00321">_dma_xfercfg</a></td></tr>
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<tr class="memdesc:a00321"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer configuration. <a href="a00017.html#a00321">More...</a><br/></td></tr>
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<tr class="separator:a00321"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00317"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a00317">_dma_channel_trigger</a></td></tr>
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<tr class="memdesc:a00317"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel trigger. <a href="a00017.html#a00317">More...</a><br/></td></tr>
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<tr class="separator:a00317"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00316"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a00316">_dma_channel_config</a></td></tr>
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<tr class="memdesc:a00316"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel trigger. <a href="a00017.html#a00316">More...</a><br/></td></tr>
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<tr class="separator:a00316"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00320"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a00320">_dma_transfer_config</a></td></tr>
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<tr class="memdesc:a00320"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer configuration. <a href="a00017.html#a00320">More...</a><br/></td></tr>
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<tr class="separator:a00320"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00319"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a00319">_dma_handle</a></td></tr>
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<tr class="memdesc:a00319"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer handle structure. <a href="a00017.html#a00319">More...</a><br/></td></tr>
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<tr class="separator:a00319"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:gaebe7d948ac31ff020dde038034ae3bbd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaebe7d948ac31ff020dde038034ae3bbd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaebe7d948ac31ff020dde038034ae3bbd">DMA_MAX_TRANSFER_COUNT</a>   0x400U</td></tr>
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<tr class="memdesc:gaebe7d948ac31ff020dde038034ae3bbd"><td class="mdescLeft"> </td><td class="mdescRight">DMA max transfer size. <br/></td></tr>
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<tr class="separator:gaebe7d948ac31ff020dde038034ae3bbd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7acdd2a8f51e171c777a4e53bd5c57e7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7acdd2a8f51e171c777a4e53bd5c57e7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga7acdd2a8f51e171c777a4e53bd5c57e7">FSL_FEATURE_DMA_NUMBER_OF_CHANNELSn</a>(x)   FSL_FEATURE_DMA_NUMBER_OF_CHANNELS</td></tr>
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<tr class="memdesc:ga7acdd2a8f51e171c777a4e53bd5c57e7"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel numbers. <br/></td></tr>
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<tr class="separator:ga7acdd2a8f51e171c777a4e53bd5c57e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga160b4ffad583e82ad4a80575e4830592"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga160b4ffad583e82ad4a80575e4830592"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga160b4ffad583e82ad4a80575e4830592">FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE</a>   (16U)</td></tr>
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<tr class="memdesc:ga160b4ffad583e82ad4a80575e4830592"><td class="mdescLeft"> </td><td class="mdescRight">DMA head link descriptor table align size. <br/></td></tr>
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<tr class="separator:ga160b4ffad583e82ad4a80575e4830592"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac52594676141a30266441619dca00d40"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gac52594676141a30266441619dca00d40">DMA_ALLOCATE_HEAD_DESCRIPTORS</a>(name, number)   <a class="el" href="a00242.html#gade00270528e66e9f091cc49d1ac2212c">SDK_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE)</td></tr>
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<tr class="memdesc:gac52594676141a30266441619dca00d40"><td class="mdescLeft"> </td><td class="mdescRight">DMA head descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor. <a href="#gac52594676141a30266441619dca00d40">More...</a><br/></td></tr>
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<tr class="separator:gac52594676141a30266441619dca00d40"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9f9ae6642bb5eeed8ccc1dffa7ec14e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga9f9ae6642bb5eeed8ccc1dffa7ec14e1">DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE</a>(name, number)   <a class="el" href="a00242.html#ga545036768d164aad61b71502371e7165">AT_NONCACHEABLE_SECTION_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE)</td></tr>
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<tr class="memdesc:ga9f9ae6642bb5eeed8ccc1dffa7ec14e1"><td class="mdescLeft"> </td><td class="mdescRight">DMA head descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor. <a href="#ga9f9ae6642bb5eeed8ccc1dffa7ec14e1">More...</a><br/></td></tr>
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<tr class="separator:ga9f9ae6642bb5eeed8ccc1dffa7ec14e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6dcd898a0c546f25356e016b9276a3de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga6dcd898a0c546f25356e016b9276a3de">DMA_ALLOCATE_LINK_DESCRIPTORS</a>(name, number)   <a class="el" href="a00242.html#gade00270528e66e9f091cc49d1ac2212c">SDK_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], <a class="el" href="a00017.html#ga160b4ffad583e82ad4a80575e4830592">FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE</a>)</td></tr>
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<tr class="memdesc:ga6dcd898a0c546f25356e016b9276a3de"><td class="mdescLeft"> </td><td class="mdescRight">DMA link descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor. <a href="#ga6dcd898a0c546f25356e016b9276a3de">More...</a><br/></td></tr>
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<tr class="separator:ga6dcd898a0c546f25356e016b9276a3de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2cc9e4b6dceb1346d950ab7fb5f52bb7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga2cc9e4b6dceb1346d950ab7fb5f52bb7">DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE</a>(name, number)   <a class="el" href="a00242.html#ga545036768d164aad61b71502371e7165">AT_NONCACHEABLE_SECTION_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], <a class="el" href="a00017.html#ga160b4ffad583e82ad4a80575e4830592">FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE</a>)</td></tr>
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<tr class="memdesc:ga2cc9e4b6dceb1346d950ab7fb5f52bb7"><td class="mdescLeft"> </td><td class="mdescRight">DMA link descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor. <a href="#ga2cc9e4b6dceb1346d950ab7fb5f52bb7">More...</a><br/></td></tr>
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<tr class="separator:ga2cc9e4b6dceb1346d950ab7fb5f52bb7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79665a4079015c9420f1dd82e15f4b30"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga79665a4079015c9420f1dd82e15f4b30"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga79665a4079015c9420f1dd82e15f4b30">DMA_ALLOCATE_DATA_TRANSFER_BUFFER</a>(name, width)   <a class="el" href="a00242.html#gade00270528e66e9f091cc49d1ac2212c">SDK_ALIGN</a>(name, width)</td></tr>
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<tr class="memdesc:ga79665a4079015c9420f1dd82e15f4b30"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer buffer address need to align with the transfer width. <br/></td></tr>
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<tr class="separator:ga79665a4079015c9420f1dd82e15f4b30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17d8b80c6e8d8c3ac95c2424f26e723f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga17d8b80c6e8d8c3ac95c2424f26e723f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga17d8b80c6e8d8c3ac95c2424f26e723f">DMA_COMMON_REG_GET</a>(base, channel, reg)   (((volatile uint32_t *)(&((base)->COMMON[0].reg)))[DMA_CHANNEL_GROUP(channel)])</td></tr>
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<tr class="memdesc:ga17d8b80c6e8d8c3ac95c2424f26e723f"><td class="mdescLeft"> </td><td class="mdescRight">DMA linked descriptor address algin size. <br/></td></tr>
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<tr class="separator:ga17d8b80c6e8d8c3ac95c2424f26e723f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa355501ba0bfb05cc9be452396f92bce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaa355501ba0bfb05cc9be452396f92bce">DMA_DESCRIPTOR_END_ADDRESS</a>(start, inc, bytes, width)   ((uint32_t *)((uint32_t)(start) + (inc) * (bytes) - (inc) * (width)))</td></tr>
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<tr class="memdesc:gaa355501ba0bfb05cc9be452396f92bce"><td class="mdescLeft"> </td><td class="mdescRight">DMA descriptor end address calculate. <a href="#gaa355501ba0bfb05cc9be452396f92bce">More...</a><br/></td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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Typedefs</h2></td></tr>
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<tr class="memitem:gadfd370cddb7a377234bcd18910ac65d6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadfd370cddb7a377234bcd18910ac65d6"></a>
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typedef struct <a class="el" href="a00017.html#a00318">_dma_descriptor</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a></td></tr>
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<tr class="memdesc:gadfd370cddb7a377234bcd18910ac65d6"><td class="mdescLeft"> </td><td class="mdescRight">DMA descriptor structure. <br/></td></tr>
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<tr class="memitem:gac6bc4d93e891f0ee4aeac1ecbdd3a0b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac6bc4d93e891f0ee4aeac1ecbdd3a0b5"></a>
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typedef struct <a class="el" href="a00017.html#a00321">_dma_xfercfg</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gac6bc4d93e891f0ee4aeac1ecbdd3a0b5">dma_xfercfg_t</a></td></tr>
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<tr class="memdesc:gac6bc4d93e891f0ee4aeac1ecbdd3a0b5"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer configuration. <br/></td></tr>
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<tr class="memitem:gabf41c1cbda715e9f64dcd1559c6bffaa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabf41c1cbda715e9f64dcd1559c6bffaa"></a>
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typedef enum <a class="el" href="a00017.html#ga67f9174a3cb49946d2b67b0e23aa2e83">_dma_priority</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gabf41c1cbda715e9f64dcd1559c6bffaa">dma_priority_t</a></td></tr>
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<tr class="memdesc:gabf41c1cbda715e9f64dcd1559c6bffaa"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel priority. <br/></td></tr>
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<tr class="memitem:gad7b97bd3834bd63e6f42ec14c5470df2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad7b97bd3834bd63e6f42ec14c5470df2"></a>
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typedef enum <a class="el" href="a00017.html#gaa3d3a75ad649f5766cb6a31f8634db3a">_dma_int</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gad7b97bd3834bd63e6f42ec14c5470df2">dma_irq_t</a></td></tr>
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<tr class="memdesc:gad7b97bd3834bd63e6f42ec14c5470df2"><td class="mdescLeft"> </td><td class="mdescRight">DMA interrupt flags. <br/></td></tr>
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<tr class="separator:gad7b97bd3834bd63e6f42ec14c5470df2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a38ce84a1963836e9c5866b115313ac"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a38ce84a1963836e9c5866b115313ac"></a>
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typedef enum <a class="el" href="a00017.html#ga9dde4b29c52fd80e761d4602af18acd4">_dma_trigger_type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga2a38ce84a1963836e9c5866b115313ac">dma_trigger_type_t</a></td></tr>
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<tr class="memdesc:ga2a38ce84a1963836e9c5866b115313ac"><td class="mdescLeft"> </td><td class="mdescRight">DMA trigger type. <br/></td></tr>
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<tr class="separator:ga2a38ce84a1963836e9c5866b115313ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga417931be4ed3fa6e8c21f5f8a629f320"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga417931be4ed3fa6e8c21f5f8a629f320"></a>
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typedef enum <a class="el" href="a00017.html#ga0f183ffa57f778f141db819590cee922">_dma_trigger_burst</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga417931be4ed3fa6e8c21f5f8a629f320">dma_trigger_burst_t</a></td></tr>
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<tr class="memdesc:ga417931be4ed3fa6e8c21f5f8a629f320"><td class="mdescLeft"> </td><td class="mdescRight">DMA trigger burst. <br/></td></tr>
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<tr class="separator:ga417931be4ed3fa6e8c21f5f8a629f320"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga53891a1cba87aa0026116bcaced7c0ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga53891a1cba87aa0026116bcaced7c0ec"></a>
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typedef enum <a class="el" href="a00017.html#ga1341dcc4840f5aeaffe92f06a123fcd3">_dma_burst_wrap</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga53891a1cba87aa0026116bcaced7c0ec">dma_burst_wrap_t</a></td></tr>
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<tr class="memdesc:ga53891a1cba87aa0026116bcaced7c0ec"><td class="mdescLeft"> </td><td class="mdescRight">DMA burst wrapping. <br/></td></tr>
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<tr class="memitem:ga834a242c5bc2fc0fb4cf928616821de0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga834a242c5bc2fc0fb4cf928616821de0"></a>
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typedef enum <a class="el" href="a00017.html#ga8eb175ece33c966ea83656c6b38e95cb">_dma_transfer_type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga834a242c5bc2fc0fb4cf928616821de0">dma_transfer_type_t</a></td></tr>
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<tr class="memdesc:ga834a242c5bc2fc0fb4cf928616821de0"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer type. <br/></td></tr>
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<tr class="separator:ga834a242c5bc2fc0fb4cf928616821de0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4bb68fc4d95889a685a0f9263574d9e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac4bb68fc4d95889a685a0f9263574d9e"></a>
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typedef struct <a class="el" href="a00017.html#a00317">_dma_channel_trigger</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a></td></tr>
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<tr class="memdesc:gac4bb68fc4d95889a685a0f9263574d9e"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel trigger. <br/></td></tr>
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<tr class="separator:gac4bb68fc4d95889a685a0f9263574d9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad0da2596473587ed2935682a7d1cc78f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad0da2596473587ed2935682a7d1cc78f"></a>
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typedef struct <a class="el" href="a00017.html#a00316">_dma_channel_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gad0da2596473587ed2935682a7d1cc78f">dma_channel_config_t</a></td></tr>
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<tr class="memdesc:gad0da2596473587ed2935682a7d1cc78f"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel trigger. <br/></td></tr>
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<tr class="separator:gad0da2596473587ed2935682a7d1cc78f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb6e4baf9efcf14a889babc34d6f0d80"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadb6e4baf9efcf14a889babc34d6f0d80"></a>
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typedef struct <a class="el" href="a00017.html#a00320">_dma_transfer_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gadb6e4baf9efcf14a889babc34d6f0d80">dma_transfer_config_t</a></td></tr>
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<tr class="memdesc:gadb6e4baf9efcf14a889babc34d6f0d80"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer configuration. <br/></td></tr>
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<tr class="separator:gadb6e4baf9efcf14a889babc34d6f0d80"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab844237884d5badd07ac902a9be34275"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gab844237884d5badd07ac902a9be34275">dma_callback</a> )(struct <a class="el" href="a00017.html#a00319">_dma_handle</a> *handle, void *userData, bool transferDone, uint32_t intmode)</td></tr>
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<tr class="memdesc:gab844237884d5badd07ac902a9be34275"><td class="mdescLeft"> </td><td class="mdescRight">Define Callback function for DMA. <a href="#gab844237884d5badd07ac902a9be34275">More...</a><br/></td></tr>
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<tr class="separator:gab844237884d5badd07ac902a9be34275"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac4a65788d7e5762d16a41a50b2cd7956"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac4a65788d7e5762d16a41a50b2cd7956"></a>
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typedef struct <a class="el" href="a00017.html#a00319">_dma_handle</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a></td></tr>
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<tr class="memdesc:gac4a65788d7e5762d16a41a50b2cd7956"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer handle structure. <br/></td></tr>
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<tr class="separator:gac4a65788d7e5762d16a41a50b2cd7956"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
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Enumerations</h2></td></tr>
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<tr class="memitem:gaf9bdc3014f3d54c426b6d2df10de4960"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <a class="el" href="a00017.html#ggaf9bdc3014f3d54c426b6d2df10de4960a9b95dc670083f57c33f96b0c10d0c8ba">kStatus_DMA_Busy</a> = MAKE_STATUS(kStatusGroup_DMA, 0)
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}</td></tr>
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<tr class="memdesc:gaf9bdc3014f3d54c426b6d2df10de4960"><td class="mdescLeft"> </td><td class="mdescRight">_dma_transfer_status DMA transfer status <a href="a00017.html#gaf9bdc3014f3d54c426b6d2df10de4960">More...</a><br/></td></tr>
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<tr class="separator:gaf9bdc3014f3d54c426b6d2df10de4960"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadb49720dc49f7d4e4cf9adbf2948e409"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00017.html#ggadb49720dc49f7d4e4cf9adbf2948e409ad9802a5e2f1df9d748838e6e23e0279b">kDMA_AddressInterleave0xWidth</a> = 0U,
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<br/>
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  <a class="el" href="a00017.html#ggadb49720dc49f7d4e4cf9adbf2948e409a84af12bf3a826e9f4725ae5bb4bbebb8">kDMA_AddressInterleave1xWidth</a> = 1U,
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  <a class="el" href="a00017.html#ggadb49720dc49f7d4e4cf9adbf2948e409ad703190659614263db03cea5d2dfbb6e">kDMA_AddressInterleave2xWidth</a> = 2U,
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  <a class="el" href="a00017.html#ggadb49720dc49f7d4e4cf9adbf2948e409aecf2cec42cd7819983e265710c691888">kDMA_AddressInterleave4xWidth</a> = 4U
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<br/>
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}</td></tr>
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<tr class="memdesc:gadb49720dc49f7d4e4cf9adbf2948e409"><td class="mdescLeft"> </td><td class="mdescRight">_dma_addr_interleave_size dma address interleave size <a href="a00017.html#gadb49720dc49f7d4e4cf9adbf2948e409">More...</a><br/></td></tr>
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<tr class="separator:gadb49720dc49f7d4e4cf9adbf2948e409"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae05225933a42f81e7c4a9fb286596f9"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00017.html#ggaae05225933a42f81e7c4a9fb286596f9a80c88f3fbb3bb2946149c0ec7a7e922a">kDMA_Transfer8BitWidth</a> = 1U,
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  <a class="el" href="a00017.html#ggaae05225933a42f81e7c4a9fb286596f9a5b38513482d6d6d92927898f9e2c7703">kDMA_Transfer16BitWidth</a> = 2U,
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  <a class="el" href="a00017.html#ggaae05225933a42f81e7c4a9fb286596f9a1a43c564953a0e097907e45cd159c265">kDMA_Transfer32BitWidth</a> = 4U
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}</td></tr>
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<tr class="memdesc:gaae05225933a42f81e7c4a9fb286596f9"><td class="mdescLeft"> </td><td class="mdescRight">_dma_transfer_width dma transfer width <a href="a00017.html#gaae05225933a42f81e7c4a9fb286596f9">More...</a><br/></td></tr>
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<tr class="separator:gaae05225933a42f81e7c4a9fb286596f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga67f9174a3cb49946d2b67b0e23aa2e83"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga67f9174a3cb49946d2b67b0e23aa2e83">_dma_priority</a> { <br/>
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83afaf9bf976bb9d2db3bd2f629cd545f45">kDMA_ChannelPriority0</a> = 0,
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83a6ff9161839b0b5e675b01353a684a63f">kDMA_ChannelPriority1</a>,
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83a259e4e6cf7b6b79608abbe1769e262fe">kDMA_ChannelPriority2</a>,
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83a8615d84237aa24c16fdc1675cc932efb">kDMA_ChannelPriority3</a>,
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83ae7f6c72a518bc4c68b3be696da1a872d">kDMA_ChannelPriority4</a>,
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83a08b83d1381be3c10688f449c9bf90fc4">kDMA_ChannelPriority5</a>,
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83acc5b892b2bcf8a632acb64e9c5645273">kDMA_ChannelPriority6</a>,
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  <a class="el" href="a00017.html#gga67f9174a3cb49946d2b67b0e23aa2e83af238cfde678fdbd26a054fc055f40a4d">kDMA_ChannelPriority7</a>
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}</td></tr>
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<tr class="memdesc:ga67f9174a3cb49946d2b67b0e23aa2e83"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel priority. <a href="a00017.html#ga67f9174a3cb49946d2b67b0e23aa2e83">More...</a><br/></td></tr>
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<tr class="memitem:gaa3d3a75ad649f5766cb6a31f8634db3a"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaa3d3a75ad649f5766cb6a31f8634db3a">_dma_int</a> { <br/>
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  <a class="el" href="a00017.html#ggaa3d3a75ad649f5766cb6a31f8634db3aab39861058eb1c9573babd0752286ea48">kDMA_IntA</a>,
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  <a class="el" href="a00017.html#ggaa3d3a75ad649f5766cb6a31f8634db3aa50cabcc60fb8dc805c62070318fe0c97">kDMA_IntB</a>,
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  <a class="el" href="a00017.html#ggaa3d3a75ad649f5766cb6a31f8634db3aa28e17f00c59b3dde88943be07a8902bd">kDMA_IntError</a>
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}</td></tr>
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<tr class="memdesc:gaa3d3a75ad649f5766cb6a31f8634db3a"><td class="mdescLeft"> </td><td class="mdescRight">DMA interrupt flags. <a href="a00017.html#gaa3d3a75ad649f5766cb6a31f8634db3a">More...</a><br/></td></tr>
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<tr class="separator:gaa3d3a75ad649f5766cb6a31f8634db3a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9dde4b29c52fd80e761d4602af18acd4"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga9dde4b29c52fd80e761d4602af18acd4">_dma_trigger_type</a> { <br/>
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  <a class="el" href="a00017.html#gga9dde4b29c52fd80e761d4602af18acd4ae45693316c3b50f21a0fa93e539e9ae5">kDMA_NoTrigger</a> = 0,
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  <a class="el" href="a00017.html#gga9dde4b29c52fd80e761d4602af18acd4aca6b545d2f8661404c932a70b8a5abcf">kDMA_LowLevelTrigger</a> = DMA_CHANNEL_CFG_HWTRIGEN(1) | DMA_CHANNEL_CFG_TRIGTYPE(1),
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  <a class="el" href="a00017.html#gga9dde4b29c52fd80e761d4602af18acd4a4636793fc071ed9f8e753e84a6e12f85">kDMA_HighLevelTrigger</a>,
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  <a class="el" href="a00017.html#gga9dde4b29c52fd80e761d4602af18acd4a9b9f27849a8e3cf715e30a29b4ba1d04">kDMA_FallingEdgeTrigger</a> = DMA_CHANNEL_CFG_HWTRIGEN(1),
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<br/>
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  <a class="el" href="a00017.html#gga9dde4b29c52fd80e761d4602af18acd4aa4d1b3c95a9ca3d756d2f68a3bb0afc8">kDMA_RisingEdgeTrigger</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga9dde4b29c52fd80e761d4602af18acd4"><td class="mdescLeft"> </td><td class="mdescRight">DMA trigger type. <a href="a00017.html#ga9dde4b29c52fd80e761d4602af18acd4">More...</a><br/></td></tr>
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<tr class="separator:ga9dde4b29c52fd80e761d4602af18acd4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga39fca1837c5ce7715cbf571669660c13"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13afa3126f29988635183fa3851e1ee1f2d">kDMA_BurstSize1</a> = 0U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13a3144a4ab7b2408051fc06ab07b583eab">kDMA_BurstSize2</a> = 1U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13ac5b15e2705b1295a56557036487d291b">kDMA_BurstSize4</a> = 2U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13a7aacfca8b6c86bdd0e727b0c8ae046b1">kDMA_BurstSize8</a> = 3U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13ad6487c57cdb11ae590172c2ff1364ca8">kDMA_BurstSize16</a> = 4U,
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13ae05054c8a11020169733c22349aa158e">kDMA_BurstSize32</a> = 5U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13acb974685c9968ac9dbf74035ecf23bb6">kDMA_BurstSize64</a> = 6U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13a3c0044f4c389c21f73b08dbb0b8ef829">kDMA_BurstSize128</a> = 7U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13ac03b658552cde955b815365386e40a70">kDMA_BurstSize256</a> = 8U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13a491cc51131bb7e9dcd647e54ec8549e7">kDMA_BurstSize512</a> = 9U,
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<br/>
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  <a class="el" href="a00017.html#gga39fca1837c5ce7715cbf571669660c13af12e2d1fe9b0fccba12b6cad6bc685b3">kDMA_BurstSize1024</a> = 10U
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<br/>
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}</td></tr>
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<tr class="memdesc:ga39fca1837c5ce7715cbf571669660c13"><td class="mdescLeft"> </td><td class="mdescRight">_dma_burst_size DMA burst size <a href="a00017.html#ga39fca1837c5ce7715cbf571669660c13">More...</a><br/></td></tr>
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<tr class="separator:ga39fca1837c5ce7715cbf571669660c13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0f183ffa57f778f141db819590cee922"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga0f183ffa57f778f141db819590cee922">_dma_trigger_burst</a> { <br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922aa5f7edec7506a38b3b57d04dd774b0b0">kDMA_SingleTransfer</a> = 0,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922aa6cc38822f852f1ddd1f22c5b79949b8">kDMA_LevelBurstTransfer</a> = DMA_CHANNEL_CFG_TRIGBURST(1),
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922af06ebd49d4066394642c80ece815d55b">kDMA_EdgeBurstTransfer1</a> = DMA_CHANNEL_CFG_TRIGBURST(1),
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922af0ab73a40234a51b14203e7d83621ac9">kDMA_EdgeBurstTransfer2</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922a42eb0fe4fd6b2030e64b5d0173c93c68">kDMA_EdgeBurstTransfer4</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922a4858703ddbc176a60c3015f23a490e17">kDMA_EdgeBurstTransfer8</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922a0641c94c5e494890f587f3cb60ed7800">kDMA_EdgeBurstTransfer16</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922af1764eeb6c94e0e1f86529bf6210c524">kDMA_EdgeBurstTransfer32</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922a8dec3f95cf71d668439e065b17f27235">kDMA_EdgeBurstTransfer64</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922af2c60c5f0dcbd8bd7d782a7c08c87f0b">kDMA_EdgeBurstTransfer128</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922a8640003c589e5d3ffd94d4cd962b8456">kDMA_EdgeBurstTransfer256</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922a0ef881d258e59978faca416630fb1a74">kDMA_EdgeBurstTransfer512</a>,
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<br/>
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  <a class="el" href="a00017.html#gga0f183ffa57f778f141db819590cee922a6aae117efdce18b2c054ddae971559da">kDMA_EdgeBurstTransfer1024</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga0f183ffa57f778f141db819590cee922"><td class="mdescLeft"> </td><td class="mdescRight">DMA trigger burst. <a href="a00017.html#ga0f183ffa57f778f141db819590cee922">More...</a><br/></td></tr>
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<tr class="separator:ga0f183ffa57f778f141db819590cee922"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1341dcc4840f5aeaffe92f06a123fcd3"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga1341dcc4840f5aeaffe92f06a123fcd3">_dma_burst_wrap</a> { <br/>
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  <a class="el" href="a00017.html#gga1341dcc4840f5aeaffe92f06a123fcd3a99b1a9eb98902b9277c2ae64f48e5a88">kDMA_NoWrap</a> = 0,
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<br/>
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  <a class="el" href="a00017.html#gga1341dcc4840f5aeaffe92f06a123fcd3ac0ab79249ad0e6bf887498d0f3e3db90">kDMA_SrcWrap</a> = DMA_CHANNEL_CFG_SRCBURSTWRAP(1),
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<br/>
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  <a class="el" href="a00017.html#gga1341dcc4840f5aeaffe92f06a123fcd3afaae8afb83546031e25b0ac5e6494f2b">kDMA_DstWrap</a> = DMA_CHANNEL_CFG_DSTBURSTWRAP(1),
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<br/>
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  <a class="el" href="a00017.html#gga1341dcc4840f5aeaffe92f06a123fcd3a543352fa3896623517af17829598eb0c">kDMA_SrcAndDstWrap</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga1341dcc4840f5aeaffe92f06a123fcd3"><td class="mdescLeft"> </td><td class="mdescRight">DMA burst wrapping. <a href="a00017.html#ga1341dcc4840f5aeaffe92f06a123fcd3">More...</a><br/></td></tr>
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<tr class="separator:ga1341dcc4840f5aeaffe92f06a123fcd3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8eb175ece33c966ea83656c6b38e95cb"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga8eb175ece33c966ea83656c6b38e95cb">_dma_transfer_type</a> { <br/>
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  <a class="el" href="a00017.html#gga8eb175ece33c966ea83656c6b38e95cba24392a93deeb55e04559201839343f3c">kDMA_MemoryToMemory</a> = 0x0U,
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<br/>
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  <a class="el" href="a00017.html#gga8eb175ece33c966ea83656c6b38e95cba7bf1938ae68b1f494aade7a0f4189303">kDMA_PeripheralToMemory</a>,
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<br/>
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  <a class="el" href="a00017.html#gga8eb175ece33c966ea83656c6b38e95cbaae1c6bab576d7a25d2fa1249f9cd4ee9">kDMA_MemoryToPeripheral</a>,
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<br/>
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  <a class="el" href="a00017.html#gga8eb175ece33c966ea83656c6b38e95cbaf59909afb24e786824cfecdb6afd0da8">kDMA_StaticToStatic</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga8eb175ece33c966ea83656c6b38e95cb"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer type. <a href="a00017.html#ga8eb175ece33c966ea83656c6b38e95cb">More...</a><br/></td></tr>
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<tr class="separator:ga8eb175ece33c966ea83656c6b38e95cb"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Driver version</h2></td></tr>
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<tr class="memitem:gac68c8082b53756a7e58ec6d5f25117d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gac68c8082b53756a7e58ec6d5f25117d2">FSL_DMA_DRIVER_VERSION</a>   (<a class="el" href="a00242.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 5, 1))</td></tr>
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<tr class="memdesc:gac68c8082b53756a7e58ec6d5f25117d2"><td class="mdescLeft"> </td><td class="mdescRight">DMA driver version. <a href="#gac68c8082b53756a7e58ec6d5f25117d2">More...</a><br/></td></tr>
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<tr class="separator:gac68c8082b53756a7e58ec6d5f25117d2"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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DMA initialization and De-initialization</h2></td></tr>
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<tr class="memitem:gade1b5efa61054ce538b37b181dd075bb"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gade1b5efa61054ce538b37b181dd075bb">DMA_Init</a> (DMA_Type *base)</td></tr>
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<tr class="memdesc:gade1b5efa61054ce538b37b181dd075bb"><td class="mdescLeft"> </td><td class="mdescRight">Initializes DMA peripheral. <a href="#gade1b5efa61054ce538b37b181dd075bb">More...</a><br/></td></tr>
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<tr class="separator:gade1b5efa61054ce538b37b181dd075bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga634ced9b86d7dc9543e0b4387123fcac"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga634ced9b86d7dc9543e0b4387123fcac">DMA_Deinit</a> (DMA_Type *base)</td></tr>
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<tr class="memdesc:ga634ced9b86d7dc9543e0b4387123fcac"><td class="mdescLeft"> </td><td class="mdescRight">Deinitializes DMA peripheral. <a href="#ga634ced9b86d7dc9543e0b4387123fcac">More...</a><br/></td></tr>
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<tr class="separator:ga634ced9b86d7dc9543e0b4387123fcac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ba95776f25ee8eae5bdf9bf5fd9c9e6"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga9ba95776f25ee8eae5bdf9bf5fd9c9e6">DMA_InstallDescriptorMemory</a> (DMA_Type *base, void *addr)</td></tr>
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<tr class="memdesc:ga9ba95776f25ee8eae5bdf9bf5fd9c9e6"><td class="mdescLeft"> </td><td class="mdescRight">Install DMA descriptor memory. <a href="#ga9ba95776f25ee8eae5bdf9bf5fd9c9e6">More...</a><br/></td></tr>
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<tr class="separator:ga9ba95776f25ee8eae5bdf9bf5fd9c9e6"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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DMA Channel Operation</h2></td></tr>
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<tr class="memitem:ga0e6279e44ebd6778355f6e9e26e9a8b6"><td class="memItemLeft" align="right" valign="top">static bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga0e6279e44ebd6778355f6e9e26e9a8b6">DMA_ChannelIsActive</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:ga0e6279e44ebd6778355f6e9e26e9a8b6"><td class="mdescLeft"> </td><td class="mdescRight">Return whether DMA channel is processing transfer. <a href="#ga0e6279e44ebd6778355f6e9e26e9a8b6">More...</a><br/></td></tr>
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<tr class="separator:ga0e6279e44ebd6778355f6e9e26e9a8b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade4163a20de203d8ddfccbbeedb6caa9"><td class="memItemLeft" align="right" valign="top">static bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gade4163a20de203d8ddfccbbeedb6caa9">DMA_ChannelIsBusy</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gade4163a20de203d8ddfccbbeedb6caa9"><td class="mdescLeft"> </td><td class="mdescRight">Return whether DMA channel is busy. <a href="#gade4163a20de203d8ddfccbbeedb6caa9">More...</a><br/></td></tr>
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<tr class="separator:gade4163a20de203d8ddfccbbeedb6caa9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga02671643755a7f9395ce1f151a914630"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga02671643755a7f9395ce1f151a914630">DMA_EnableChannelInterrupts</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:ga02671643755a7f9395ce1f151a914630"><td class="mdescLeft"> </td><td class="mdescRight">Enables the interrupt source for the DMA transfer. <a href="#ga02671643755a7f9395ce1f151a914630">More...</a><br/></td></tr>
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<tr class="separator:ga02671643755a7f9395ce1f151a914630"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac9873a0205538dffcba7bb59ed1450c5"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gac9873a0205538dffcba7bb59ed1450c5">DMA_DisableChannelInterrupts</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gac9873a0205538dffcba7bb59ed1450c5"><td class="mdescLeft"> </td><td class="mdescRight">Disables the interrupt source for the DMA transfer. <a href="#gac9873a0205538dffcba7bb59ed1450c5">More...</a><br/></td></tr>
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<tr class="separator:gac9873a0205538dffcba7bb59ed1450c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa0293771d55ee1a7c42a8ffecb0728e7"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaa0293771d55ee1a7c42a8ffecb0728e7">DMA_EnableChannel</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gaa0293771d55ee1a7c42a8ffecb0728e7"><td class="mdescLeft"> </td><td class="mdescRight">Enable DMA channel. <a href="#gaa0293771d55ee1a7c42a8ffecb0728e7">More...</a><br/></td></tr>
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<tr class="separator:gaa0293771d55ee1a7c42a8ffecb0728e7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8025eebc80c23fa9b5a3a4454855e347"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga8025eebc80c23fa9b5a3a4454855e347">DMA_DisableChannel</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:ga8025eebc80c23fa9b5a3a4454855e347"><td class="mdescLeft"> </td><td class="mdescRight">Disable DMA channel. <a href="#ga8025eebc80c23fa9b5a3a4454855e347">More...</a><br/></td></tr>
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<tr class="separator:ga8025eebc80c23fa9b5a3a4454855e347"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa706c05b4875366e7f84c83b8d09ae29"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaa706c05b4875366e7f84c83b8d09ae29">DMA_EnableChannelPeriphRq</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gaa706c05b4875366e7f84c83b8d09ae29"><td class="mdescLeft"> </td><td class="mdescRight">Set PERIPHREQEN of channel configuration register. <a href="#gaa706c05b4875366e7f84c83b8d09ae29">More...</a><br/></td></tr>
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<tr class="separator:gaa706c05b4875366e7f84c83b8d09ae29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2d2f88ed16097b2974d1955c725a5dc"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gab2d2f88ed16097b2974d1955c725a5dc">DMA_DisableChannelPeriphRq</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gab2d2f88ed16097b2974d1955c725a5dc"><td class="mdescLeft"> </td><td class="mdescRight">Get PERIPHREQEN value of channel configuration register. <a href="#gab2d2f88ed16097b2974d1955c725a5dc">More...</a><br/></td></tr>
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<tr class="separator:gab2d2f88ed16097b2974d1955c725a5dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga04d2004d7d054b4f36676304bc2cd8ad"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga04d2004d7d054b4f36676304bc2cd8ad">DMA_ConfigureChannelTrigger</a> (DMA_Type *base, uint32_t channel, <a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a> *trigger)</td></tr>
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<tr class="memdesc:ga04d2004d7d054b4f36676304bc2cd8ad"><td class="mdescLeft"> </td><td class="mdescRight">Set trigger settings of DMA channel. <a href="#ga04d2004d7d054b4f36676304bc2cd8ad">More...</a><br/></td></tr>
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<tr class="separator:ga04d2004d7d054b4f36676304bc2cd8ad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafc795a7c0b3e5f4bbf32c1eed3a9ea47"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gafc795a7c0b3e5f4bbf32c1eed3a9ea47">DMA_SetChannelConfig</a> (DMA_Type *base, uint32_t channel, <a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a> *trigger, bool isPeriph)</td></tr>
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<tr class="memdesc:gafc795a7c0b3e5f4bbf32c1eed3a9ea47"><td class="mdescLeft"> </td><td class="mdescRight">set channel config. <a href="#gafc795a7c0b3e5f4bbf32c1eed3a9ea47">More...</a><br/></td></tr>
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<tr class="separator:gafc795a7c0b3e5f4bbf32c1eed3a9ea47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaed498d0e17c40aa2899869626c238507"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaed498d0e17c40aa2899869626c238507">DMA_SetChannelXferConfig</a> (bool reload, bool clrTrig, bool intA, bool intB, uint8_t width, uint8_t srcInc, uint8_t dstInc, uint32_t bytes)</td></tr>
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<tr class="memdesc:gaed498d0e17c40aa2899869626c238507"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel xfer transfer configurations. <a href="#gaed498d0e17c40aa2899869626c238507">More...</a><br/></td></tr>
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<tr class="separator:gaed498d0e17c40aa2899869626c238507"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf0197c674ce188bf214c13bc7be43e14"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaf0197c674ce188bf214c13bc7be43e14">DMA_GetRemainingBytes</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gaf0197c674ce188bf214c13bc7be43e14"><td class="mdescLeft"> </td><td class="mdescRight">Gets the remaining bytes of the current DMA descriptor transfer. <a href="#gaf0197c674ce188bf214c13bc7be43e14">More...</a><br/></td></tr>
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<tr class="separator:gaf0197c674ce188bf214c13bc7be43e14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad8ae76fc5d858b97de3362100af86df6"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gad8ae76fc5d858b97de3362100af86df6">DMA_SetChannelPriority</a> (DMA_Type *base, uint32_t channel, <a class="el" href="a00017.html#gabf41c1cbda715e9f64dcd1559c6bffaa">dma_priority_t</a> priority)</td></tr>
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<tr class="memdesc:gad8ae76fc5d858b97de3362100af86df6"><td class="mdescLeft"> </td><td class="mdescRight">Set priority of channel configuration register. <a href="#gad8ae76fc5d858b97de3362100af86df6">More...</a><br/></td></tr>
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<tr class="separator:gad8ae76fc5d858b97de3362100af86df6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1a5311b6ad708e230db517fb04f98a5f"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="a00017.html#gabf41c1cbda715e9f64dcd1559c6bffaa">dma_priority_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga1a5311b6ad708e230db517fb04f98a5f">DMA_GetChannelPriority</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:ga1a5311b6ad708e230db517fb04f98a5f"><td class="mdescLeft"> </td><td class="mdescRight">Get priority of channel configuration register. <a href="#ga1a5311b6ad708e230db517fb04f98a5f">More...</a><br/></td></tr>
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<tr class="separator:ga1a5311b6ad708e230db517fb04f98a5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa200c0bd1a2d714f6cd002919ed8a213"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaa200c0bd1a2d714f6cd002919ed8a213">DMA_SetChannelConfigValid</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gaa200c0bd1a2d714f6cd002919ed8a213"><td class="mdescLeft"> </td><td class="mdescRight">Set channel configuration valid. <a href="#gaa200c0bd1a2d714f6cd002919ed8a213">More...</a><br/></td></tr>
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<tr class="separator:gaa200c0bd1a2d714f6cd002919ed8a213"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae8ffd8526580ed3b7ca3520024d0002c"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gae8ffd8526580ed3b7ca3520024d0002c">DMA_DoChannelSoftwareTrigger</a> (DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:gae8ffd8526580ed3b7ca3520024d0002c"><td class="mdescLeft"> </td><td class="mdescRight">Do software trigger for the channel. <a href="#gae8ffd8526580ed3b7ca3520024d0002c">More...</a><br/></td></tr>
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<tr class="separator:gae8ffd8526580ed3b7ca3520024d0002c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga956cf0c90e0562e5087475ceefcc489f"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga956cf0c90e0562e5087475ceefcc489f">DMA_LoadChannelTransferConfig</a> (DMA_Type *base, uint32_t channel, uint32_t xfer)</td></tr>
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<tr class="memdesc:ga956cf0c90e0562e5087475ceefcc489f"><td class="mdescLeft"> </td><td class="mdescRight">Load channel transfer configurations. <a href="#ga956cf0c90e0562e5087475ceefcc489f">More...</a><br/></td></tr>
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<tr class="separator:ga956cf0c90e0562e5087475ceefcc489f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf2955b2c961a33fe24d3154ec801f9fd"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gaf2955b2c961a33fe24d3154ec801f9fd">DMA_CreateDescriptor</a> (<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> *desc, <a class="el" href="a00017.html#gac6bc4d93e891f0ee4aeac1ecbdd3a0b5">dma_xfercfg_t</a> *xfercfg, void *srcAddr, void *dstAddr, void *nextDesc)</td></tr>
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<tr class="memdesc:gaf2955b2c961a33fe24d3154ec801f9fd"><td class="mdescLeft"> </td><td class="mdescRight">Create application specific DMA descriptor to be used in a chain in transfer. <a href="#gaf2955b2c961a33fe24d3154ec801f9fd">More...</a><br/></td></tr>
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<tr class="separator:gaf2955b2c961a33fe24d3154ec801f9fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabbdbf43b54f0a0029cd27c09c094de36"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a> (<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)</td></tr>
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<tr class="memdesc:gabbdbf43b54f0a0029cd27c09c094de36"><td class="mdescLeft"> </td><td class="mdescRight">setup dma descriptor <a href="#gabbdbf43b54f0a0029cd27c09c094de36">More...</a><br/></td></tr>
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<tr class="separator:gabbdbf43b54f0a0029cd27c09c094de36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6c69a736b8e5719fe01bb7d3b76f9088"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga6c69a736b8e5719fe01bb7d3b76f9088">DMA_SetupChannelDescriptor</a> (<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc, <a class="el" href="a00017.html#ga53891a1cba87aa0026116bcaced7c0ec">dma_burst_wrap_t</a> wrapType, uint32_t burstSize)</td></tr>
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<tr class="memdesc:ga6c69a736b8e5719fe01bb7d3b76f9088"><td class="mdescLeft"> </td><td class="mdescRight">setup dma channel descriptor <a href="#ga6c69a736b8e5719fe01bb7d3b76f9088">More...</a><br/></td></tr>
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<tr class="separator:ga6c69a736b8e5719fe01bb7d3b76f9088"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae7c3ca634a04a8afe85b1e55360b17aa"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gae7c3ca634a04a8afe85b1e55360b17aa">DMA_LoadChannelDescriptor</a> (DMA_Type *base, uint32_t channel, <a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> *descriptor)</td></tr>
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<tr class="memdesc:gae7c3ca634a04a8afe85b1e55360b17aa"><td class="mdescLeft"> </td><td class="mdescRight">load channel transfer decriptor. <a href="#gae7c3ca634a04a8afe85b1e55360b17aa">More...</a><br/></td></tr>
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<tr class="separator:gae7c3ca634a04a8afe85b1e55360b17aa"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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DMA Transactional Operation</h2></td></tr>
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<tr class="memitem:ga3c61d6121d88d2cdf287fc1cd72912fd"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga3c61d6121d88d2cdf287fc1cd72912fd">DMA_AbortTransfer</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle)</td></tr>
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<tr class="memdesc:ga3c61d6121d88d2cdf287fc1cd72912fd"><td class="mdescLeft"> </td><td class="mdescRight">Abort running transfer by handle. <a href="#ga3c61d6121d88d2cdf287fc1cd72912fd">More...</a><br/></td></tr>
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<tr class="separator:ga3c61d6121d88d2cdf287fc1cd72912fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5354ff2c0c1ec53e2cbd712169fc5558"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga5354ff2c0c1ec53e2cbd712169fc5558">DMA_CreateHandle</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle, DMA_Type *base, uint32_t channel)</td></tr>
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<tr class="memdesc:ga5354ff2c0c1ec53e2cbd712169fc5558"><td class="mdescLeft"> </td><td class="mdescRight">Creates the DMA handle. <a href="#ga5354ff2c0c1ec53e2cbd712169fc5558">More...</a><br/></td></tr>
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<tr class="separator:ga5354ff2c0c1ec53e2cbd712169fc5558"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2eb9a831b9a84c5108097f770dbe90db"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga2eb9a831b9a84c5108097f770dbe90db">DMA_SetCallback</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle, <a class="el" href="a00017.html#gab844237884d5badd07ac902a9be34275">dma_callback</a> callback, void *userData)</td></tr>
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<tr class="memdesc:ga2eb9a831b9a84c5108097f770dbe90db"><td class="mdescLeft"> </td><td class="mdescRight">Installs a callback function for the DMA transfer. <a href="#ga2eb9a831b9a84c5108097f770dbe90db">More...</a><br/></td></tr>
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<tr class="separator:ga2eb9a831b9a84c5108097f770dbe90db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga01ed2edd4ac04c70f83c7c3091ec4b65"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga01ed2edd4ac04c70f83c7c3091ec4b65">DMA_PrepareTransfer</a> (<a class="el" href="a00017.html#gadb6e4baf9efcf14a889babc34d6f0d80">dma_transfer_config_t</a> *config, void *srcAddr, void *dstAddr, uint32_t byteWidth, uint32_t transferBytes, <a class="el" href="a00017.html#ga834a242c5bc2fc0fb4cf928616821de0">dma_transfer_type_t</a> type, void *nextDesc)</td></tr>
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<tr class="memdesc:ga01ed2edd4ac04c70f83c7c3091ec4b65"><td class="mdescLeft"> </td><td class="mdescRight">Prepares the DMA transfer structure. <a href="#ga01ed2edd4ac04c70f83c7c3091ec4b65">More...</a><br/></td></tr>
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<tr class="separator:ga01ed2edd4ac04c70f83c7c3091ec4b65"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad29055b5d8b160f94bb18abce476af7d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gad29055b5d8b160f94bb18abce476af7d">DMA_PrepareChannelTransfer</a> (<a class="el" href="a00017.html#gad0da2596473587ed2935682a7d1cc78f">dma_channel_config_t</a> *config, void *srcStartAddr, void *dstStartAddr, uint32_t xferCfg, <a class="el" href="a00017.html#ga834a242c5bc2fc0fb4cf928616821de0">dma_transfer_type_t</a> type, <a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a> *trigger, void *nextDesc)</td></tr>
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<tr class="memdesc:gad29055b5d8b160f94bb18abce476af7d"><td class="mdescLeft"> </td><td class="mdescRight">Prepare channel transfer configurations. <a href="#gad29055b5d8b160f94bb18abce476af7d">More...</a><br/></td></tr>
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<tr class="separator:gad29055b5d8b160f94bb18abce476af7d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade169c9d37d6a2ff949546268ba1c382"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gade169c9d37d6a2ff949546268ba1c382">DMA_SubmitTransfer</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle, <a class="el" href="a00017.html#gadb6e4baf9efcf14a889babc34d6f0d80">dma_transfer_config_t</a> *config)</td></tr>
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<tr class="memdesc:gade169c9d37d6a2ff949546268ba1c382"><td class="mdescLeft"> </td><td class="mdescRight">Submits the DMA transfer request. <a href="#gade169c9d37d6a2ff949546268ba1c382">More...</a><br/></td></tr>
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<tr class="separator:gade169c9d37d6a2ff949546268ba1c382"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga55d406dd20fa70d7cca25601bae20777"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga55d406dd20fa70d7cca25601bae20777">DMA_SubmitChannelTransferParameter</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle, uint32_t xferCfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)</td></tr>
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<tr class="memdesc:ga55d406dd20fa70d7cca25601bae20777"><td class="mdescLeft"> </td><td class="mdescRight">Submit channel transfer paramter directly. <a href="#ga55d406dd20fa70d7cca25601bae20777">More...</a><br/></td></tr>
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<tr class="separator:ga55d406dd20fa70d7cca25601bae20777"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabf72e148a82d885b8b4ab3cffd549cc3"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gabf72e148a82d885b8b4ab3cffd549cc3">DMA_SubmitChannelDescriptor</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle, <a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> *descriptor)</td></tr>
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<tr class="memdesc:gabf72e148a82d885b8b4ab3cffd549cc3"><td class="mdescLeft"> </td><td class="mdescRight">Submit channel descriptor. <a href="#gabf72e148a82d885b8b4ab3cffd549cc3">More...</a><br/></td></tr>
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<tr class="separator:gabf72e148a82d885b8b4ab3cffd549cc3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae702541c17430371d54c7aea5dbef084"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gae702541c17430371d54c7aea5dbef084">DMA_SubmitChannelTransfer</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle, <a class="el" href="a00017.html#gad0da2596473587ed2935682a7d1cc78f">dma_channel_config_t</a> *config)</td></tr>
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<tr class="memdesc:gae702541c17430371d54c7aea5dbef084"><td class="mdescLeft"> </td><td class="mdescRight">Submits the DMA channel transfer request. <a href="#gae702541c17430371d54c7aea5dbef084">More...</a><br/></td></tr>
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<tr class="separator:gae702541c17430371d54c7aea5dbef084"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac6fb3f30e13c937cc00fe11218e6ec76"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#gac6fb3f30e13c937cc00fe11218e6ec76">DMA_StartTransfer</a> (<a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> *handle)</td></tr>
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<tr class="memdesc:gac6fb3f30e13c937cc00fe11218e6ec76"><td class="mdescLeft"> </td><td class="mdescRight">DMA start transfer. <a href="#gac6fb3f30e13c937cc00fe11218e6ec76">More...</a><br/></td></tr>
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<tr class="separator:gac6fb3f30e13c937cc00fe11218e6ec76"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9da5a899fb0109cec4fc9303e5df0433"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ga9da5a899fb0109cec4fc9303e5df0433">DMA_IRQHandle</a> (DMA_Type *base)</td></tr>
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<tr class="memdesc:ga9da5a899fb0109cec4fc9303e5df0433"><td class="mdescLeft"> </td><td class="mdescRight">DMA IRQ handler for descriptor transfer complete. <a href="#ga9da5a899fb0109cec4fc9303e5df0433">More...</a><br/></td></tr>
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<tr class="separator:ga9da5a899fb0109cec4fc9303e5df0433"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<hr/><h2 class="groupheader">Data Structure Documentation</h2>
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<a name="a00318" id="a00318"></a>
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<td class="memname">struct _dma_descriptor</td>
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</table>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a0123b3f48283fb0a2b10398f6cc0d0ba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0123b3f48283fb0a2b10398f6cc0d0ba"></a>
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volatile uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a0123b3f48283fb0a2b10398f6cc0d0ba">xfercfg</a></td></tr>
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<tr class="memdesc:a0123b3f48283fb0a2b10398f6cc0d0ba"><td class="mdescLeft"> </td><td class="mdescRight">Transfer configuration. <br/></td></tr>
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<tr class="memitem:a92876a13dbcac0bfb032bc179aaf447d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a92876a13dbcac0bfb032bc179aaf447d"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a92876a13dbcac0bfb032bc179aaf447d">srcEndAddr</a></td></tr>
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<tr class="memdesc:a92876a13dbcac0bfb032bc179aaf447d"><td class="mdescLeft"> </td><td class="mdescRight">Last source address of DMA transfer. <br/></td></tr>
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<tr class="memitem:af8bb95a5682dbdd6d1b508ba2ff4ced9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af8bb95a5682dbdd6d1b508ba2ff4ced9"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#af8bb95a5682dbdd6d1b508ba2ff4ced9">dstEndAddr</a></td></tr>
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<tr class="memdesc:af8bb95a5682dbdd6d1b508ba2ff4ced9"><td class="mdescLeft"> </td><td class="mdescRight">Last destination address of DMA transfer. <br/></td></tr>
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<tr class="memitem:ab0bf2a9cb04bafbe3c0da9e3f3088902"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab0bf2a9cb04bafbe3c0da9e3f3088902"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ab0bf2a9cb04bafbe3c0da9e3f3088902">linkToNextDesc</a></td></tr>
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<tr class="memdesc:ab0bf2a9cb04bafbe3c0da9e3f3088902"><td class="mdescLeft"> </td><td class="mdescRight">Address of next DMA descriptor in chain. <br/></td></tr>
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<a name="a00321" id="a00321"></a>
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<td class="memname">struct _dma_xfercfg</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:aa6d616697dfdbf2ea0d55ce3d15ae15d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aa6d616697dfdbf2ea0d55ce3d15ae15d"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#aa6d616697dfdbf2ea0d55ce3d15ae15d">valid</a></td></tr>
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<tr class="memdesc:aa6d616697dfdbf2ea0d55ce3d15ae15d"><td class="mdescLeft"> </td><td class="mdescRight">Descriptor is ready to transfer. <br/></td></tr>
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<tr class="separator:aa6d616697dfdbf2ea0d55ce3d15ae15d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6265febd7f6c13a94e167da51a1e43b0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6265febd7f6c13a94e167da51a1e43b0"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a6265febd7f6c13a94e167da51a1e43b0">reload</a></td></tr>
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<tr class="memdesc:a6265febd7f6c13a94e167da51a1e43b0"><td class="mdescLeft"> </td><td class="mdescRight">Reload channel configuration register after current descriptor is exhausted. <br/></td></tr>
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<tr class="separator:a6265febd7f6c13a94e167da51a1e43b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:add83c9ead5464ed2bd4b4c9af0c3939c"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#add83c9ead5464ed2bd4b4c9af0c3939c">swtrig</a></td></tr>
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<tr class="memdesc:add83c9ead5464ed2bd4b4c9af0c3939c"><td class="mdescLeft"> </td><td class="mdescRight">Perform software trigger. <a href="#add83c9ead5464ed2bd4b4c9af0c3939c">More...</a><br/></td></tr>
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<tr class="separator:add83c9ead5464ed2bd4b4c9af0c3939c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab10332bb055b0b0c8b4dd1f95613b814"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab10332bb055b0b0c8b4dd1f95613b814"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ab10332bb055b0b0c8b4dd1f95613b814">clrtrig</a></td></tr>
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<tr class="memdesc:ab10332bb055b0b0c8b4dd1f95613b814"><td class="mdescLeft"> </td><td class="mdescRight">Clear trigger. <br/></td></tr>
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<tr class="separator:ab10332bb055b0b0c8b4dd1f95613b814"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aedaabaac2f82660fae876985c7647384"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aedaabaac2f82660fae876985c7647384"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#aedaabaac2f82660fae876985c7647384">intA</a></td></tr>
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<tr class="memdesc:aedaabaac2f82660fae876985c7647384"><td class="mdescLeft"> </td><td class="mdescRight">Raises IRQ when transfer is done and set IRQA status register flag. <br/></td></tr>
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<tr class="separator:aedaabaac2f82660fae876985c7647384"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2498c3167e7409cc0b7ca1fdda760826"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a2498c3167e7409cc0b7ca1fdda760826"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a2498c3167e7409cc0b7ca1fdda760826">intB</a></td></tr>
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<tr class="memdesc:a2498c3167e7409cc0b7ca1fdda760826"><td class="mdescLeft"> </td><td class="mdescRight">Raises IRQ when transfer is done and set IRQB status register flag. <br/></td></tr>
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<tr class="separator:a2498c3167e7409cc0b7ca1fdda760826"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5eb6c40c22fcb78d6c007f73ec030b10"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5eb6c40c22fcb78d6c007f73ec030b10"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a5eb6c40c22fcb78d6c007f73ec030b10">byteWidth</a></td></tr>
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<tr class="memdesc:a5eb6c40c22fcb78d6c007f73ec030b10"><td class="mdescLeft"> </td><td class="mdescRight">Byte width of data to transfer. <br/></td></tr>
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<tr class="separator:a5eb6c40c22fcb78d6c007f73ec030b10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0bdbc91db0db29d376f150c0696cbf1e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0bdbc91db0db29d376f150c0696cbf1e"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a0bdbc91db0db29d376f150c0696cbf1e">srcInc</a></td></tr>
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<tr class="memdesc:a0bdbc91db0db29d376f150c0696cbf1e"><td class="mdescLeft"> </td><td class="mdescRight">Increment source address by 'srcInc' x 'byteWidth'. <br/></td></tr>
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<tr class="separator:a0bdbc91db0db29d376f150c0696cbf1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7581145b400e7c3a2e6f7c48f3ebdcb6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a7581145b400e7c3a2e6f7c48f3ebdcb6"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a7581145b400e7c3a2e6f7c48f3ebdcb6">dstInc</a></td></tr>
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<tr class="memdesc:a7581145b400e7c3a2e6f7c48f3ebdcb6"><td class="mdescLeft"> </td><td class="mdescRight">Increment destination address by 'dstInc' x 'byteWidth'. <br/></td></tr>
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<tr class="memitem:a90638d51e3f312f41de139cbbc12b331"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a90638d51e3f312f41de139cbbc12b331"></a>
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uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a90638d51e3f312f41de139cbbc12b331">transferCount</a></td></tr>
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<tr class="memdesc:a90638d51e3f312f41de139cbbc12b331"><td class="mdescLeft"> </td><td class="mdescRight">Number of transfers. <br/></td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="add83c9ead5464ed2bd4b4c9af0c3939c"></a>
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<td class="memname">bool _dma_xfercfg::swtrig</td>
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</div><div class="memdoc">
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<p>Transfer if fired when 'valid' is set </p>
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<a name="a00317" id="a00317"></a>
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<td class="memname">struct _dma_channel_trigger</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a963af37ca31ac5c801494e97c3aab22a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00017.html#ga2a38ce84a1963836e9c5866b115313ac">dma_trigger_type_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a963af37ca31ac5c801494e97c3aab22a">type</a></td></tr>
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<tr class="memdesc:a963af37ca31ac5c801494e97c3aab22a"><td class="mdescLeft"> </td><td class="mdescRight">Select hardware trigger as edge triggered or level triggered. <a href="#a963af37ca31ac5c801494e97c3aab22a">More...</a><br/></td></tr>
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<tr class="separator:a963af37ca31ac5c801494e97c3aab22a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a97d06b60e0daf2045ebc89923aa5bfc1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00017.html#ga417931be4ed3fa6e8c21f5f8a629f320">dma_trigger_burst_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a97d06b60e0daf2045ebc89923aa5bfc1">burst</a></td></tr>
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<tr class="memdesc:a97d06b60e0daf2045ebc89923aa5bfc1"><td class="mdescLeft"> </td><td class="mdescRight">Select whether hardware triggers cause a single or burst transfer. <a href="#a97d06b60e0daf2045ebc89923aa5bfc1">More...</a><br/></td></tr>
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<tr class="separator:a97d06b60e0daf2045ebc89923aa5bfc1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6317266dd520f59972e99892d1745db4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00017.html#ga53891a1cba87aa0026116bcaced7c0ec">dma_burst_wrap_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a6317266dd520f59972e99892d1745db4">wrap</a></td></tr>
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<tr class="memdesc:a6317266dd520f59972e99892d1745db4"><td class="mdescLeft"> </td><td class="mdescRight">Select wrap type, source wrap or dest wrap, or both. <a href="#a6317266dd520f59972e99892d1745db4">More...</a><br/></td></tr>
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<tr class="separator:a6317266dd520f59972e99892d1745db4"><td class="memSeparator" colspan="2"> </td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a963af37ca31ac5c801494e97c3aab22a"></a>
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<td class="memname"><a class="el" href="a00017.html#ga2a38ce84a1963836e9c5866b115313ac">dma_trigger_type_t</a> _dma_channel_trigger::type</td>
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<td class="memname"><a class="el" href="a00017.html#ga417931be4ed3fa6e8c21f5f8a629f320">dma_trigger_burst_t</a> _dma_channel_trigger::burst</td>
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</div><div class="memdoc">
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<a class="anchor" id="a6317266dd520f59972e99892d1745db4"></a>
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<td class="memname"><a class="el" href="a00017.html#ga53891a1cba87aa0026116bcaced7c0ec">dma_burst_wrap_t</a> _dma_channel_trigger::wrap</td>
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<a name="a00316" id="a00316"></a>
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<td class="memname">struct _dma_channel_config</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:acd6d6ce5daa6d4d97a7239b7b0d0eb56"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="acd6d6ce5daa6d4d97a7239b7b0d0eb56"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#acd6d6ce5daa6d4d97a7239b7b0d0eb56">srcStartAddr</a></td></tr>
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<tr class="memdesc:acd6d6ce5daa6d4d97a7239b7b0d0eb56"><td class="mdescLeft"> </td><td class="mdescRight">Source data address. <br/></td></tr>
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<tr class="separator:acd6d6ce5daa6d4d97a7239b7b0d0eb56"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7c94fe018407578d718af8edc8c3764d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a7c94fe018407578d718af8edc8c3764d"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a7c94fe018407578d718af8edc8c3764d">dstStartAddr</a></td></tr>
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<tr class="memdesc:a7c94fe018407578d718af8edc8c3764d"><td class="mdescLeft"> </td><td class="mdescRight">Destination data address. <br/></td></tr>
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<tr class="separator:a7c94fe018407578d718af8edc8c3764d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1d237585f6be8749ff73eb0cf194e0ba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a1d237585f6be8749ff73eb0cf194e0ba"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a1d237585f6be8749ff73eb0cf194e0ba">nextDesc</a></td></tr>
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<tr class="memdesc:a1d237585f6be8749ff73eb0cf194e0ba"><td class="mdescLeft"> </td><td class="mdescRight">Chain custom descriptor. <br/></td></tr>
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<tr class="memitem:a795a89879108198d09d76db100649330"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a795a89879108198d09d76db100649330"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a795a89879108198d09d76db100649330">xferCfg</a></td></tr>
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<tr class="memdesc:a795a89879108198d09d76db100649330"><td class="mdescLeft"> </td><td class="mdescRight">channel transfer configurations <br/></td></tr>
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<tr class="separator:a795a89879108198d09d76db100649330"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85d3341a4a2c75753e68774b8f2910a0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a85d3341a4a2c75753e68774b8f2910a0"></a>
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<a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a85d3341a4a2c75753e68774b8f2910a0">trigger</a></td></tr>
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<tr class="memdesc:a85d3341a4a2c75753e68774b8f2910a0"><td class="mdescLeft"> </td><td class="mdescRight">DMA trigger type. <br/></td></tr>
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<tr class="separator:a85d3341a4a2c75753e68774b8f2910a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a88a377a5b22357f131bd48c4b857a823"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a88a377a5b22357f131bd48c4b857a823"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a88a377a5b22357f131bd48c4b857a823">isPeriph</a></td></tr>
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<tr class="memdesc:a88a377a5b22357f131bd48c4b857a823"><td class="mdescLeft"> </td><td class="mdescRight">select the request type <br/></td></tr>
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</table>
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<a name="a00320" id="a00320"></a>
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<td class="memname">struct _dma_transfer_config</td>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a71bb48be218a43468036baa0a2d6582f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a71bb48be218a43468036baa0a2d6582f"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a71bb48be218a43468036baa0a2d6582f">srcAddr</a></td></tr>
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<tr class="memdesc:a71bb48be218a43468036baa0a2d6582f"><td class="mdescLeft"> </td><td class="mdescRight">Source data address. <br/></td></tr>
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<tr class="memitem:a8f10119722a970f3f1809d66b24b1825"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a8f10119722a970f3f1809d66b24b1825"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a8f10119722a970f3f1809d66b24b1825">dstAddr</a></td></tr>
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<tr class="memdesc:a8f10119722a970f3f1809d66b24b1825"><td class="mdescLeft"> </td><td class="mdescRight">Destination data address. <br/></td></tr>
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<tr class="memitem:a987f4b6b0b7eaa67c97298d84d506f84"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a987f4b6b0b7eaa67c97298d84d506f84"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a987f4b6b0b7eaa67c97298d84d506f84">nextDesc</a></td></tr>
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<tr class="memdesc:a987f4b6b0b7eaa67c97298d84d506f84"><td class="mdescLeft"> </td><td class="mdescRight">Chain custom descriptor. <br/></td></tr>
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<tr class="memitem:afb87ce88f5cb43e063cea46b25b96845"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="afb87ce88f5cb43e063cea46b25b96845"></a>
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<a class="el" href="a00017.html#gac6bc4d93e891f0ee4aeac1ecbdd3a0b5">dma_xfercfg_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#afb87ce88f5cb43e063cea46b25b96845">xfercfg</a></td></tr>
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<tr class="memdesc:afb87ce88f5cb43e063cea46b25b96845"><td class="mdescLeft"> </td><td class="mdescRight">Transfer options. <br/></td></tr>
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<tr class="separator:afb87ce88f5cb43e063cea46b25b96845"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ace28d6f9062dc6a1b6a7c6c4ef94ccc6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ace28d6f9062dc6a1b6a7c6c4ef94ccc6"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#ace28d6f9062dc6a1b6a7c6c4ef94ccc6">isPeriph</a></td></tr>
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<tr class="memdesc:ace28d6f9062dc6a1b6a7c6c4ef94ccc6"><td class="mdescLeft"> </td><td class="mdescRight">DMA transfer is driven by peripheral. <br/></td></tr>
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<tr class="separator:ace28d6f9062dc6a1b6a7c6c4ef94ccc6"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="a00319" id="a00319"></a>
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<div class="memitem">
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<td class="memname">struct _dma_handle</td>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:af4889548fdba149aa2d1e5cb7dec20ef"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00017.html#gab844237884d5badd07ac902a9be34275">dma_callback</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#af4889548fdba149aa2d1e5cb7dec20ef">callback</a></td></tr>
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<tr class="memdesc:af4889548fdba149aa2d1e5cb7dec20ef"><td class="mdescLeft"> </td><td class="mdescRight">Callback function. <a href="#af4889548fdba149aa2d1e5cb7dec20ef">More...</a><br/></td></tr>
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<tr class="separator:af4889548fdba149aa2d1e5cb7dec20ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abb9f9797349c1860b5693de57c9d1e59"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="abb9f9797349c1860b5693de57c9d1e59"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#abb9f9797349c1860b5693de57c9d1e59">userData</a></td></tr>
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<tr class="memdesc:abb9f9797349c1860b5693de57c9d1e59"><td class="mdescLeft"> </td><td class="mdescRight">Callback function parameter. <br/></td></tr>
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<tr class="separator:abb9f9797349c1860b5693de57c9d1e59"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a46d0403b6263d5fa4c94ba0265dffdd1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a46d0403b6263d5fa4c94ba0265dffdd1"></a>
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DMA_Type * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a46d0403b6263d5fa4c94ba0265dffdd1">base</a></td></tr>
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<tr class="memdesc:a46d0403b6263d5fa4c94ba0265dffdd1"><td class="mdescLeft"> </td><td class="mdescRight">DMA peripheral base address. <br/></td></tr>
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<tr class="separator:a46d0403b6263d5fa4c94ba0265dffdd1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1fd77e5f121c6cac17d04591c233b143"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a1fd77e5f121c6cac17d04591c233b143"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00017.html#a1fd77e5f121c6cac17d04591c233b143">channel</a></td></tr>
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<tr class="memdesc:a1fd77e5f121c6cac17d04591c233b143"><td class="mdescLeft"> </td><td class="mdescRight">DMA channel number. <br/></td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="af4889548fdba149aa2d1e5cb7dec20ef"></a>
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<td class="memname"><a class="el" href="a00017.html#gab844237884d5badd07ac902a9be34275">dma_callback</a> _dma_handle::callback</td>
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</div><div class="memdoc">
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<p>Invoked when transfer of descriptor with interrupt flag finishes </p>
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</div>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<a class="anchor" id="gac68c8082b53756a7e58ec6d5f25117d2"></a>
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<td class="memname">#define FSL_DMA_DRIVER_VERSION   (<a class="el" href="a00242.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 5, 1))</td>
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<p>Version 2.5.1. </p>
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</div>
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<a class="anchor" id="gac52594676141a30266441619dca00d40"></a>
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<td class="memname">#define DMA_ALLOCATE_HEAD_DESCRIPTORS</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">name, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"> </td>
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<td class="paramname">number </td>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td>   <a class="el" href="a00242.html#gade00270528e66e9f091cc49d1ac2212c">SDK_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE)</td>
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</tr>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">name</td><td>Allocate decriptor name. </td></tr>
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<tr><td class="paramname">number</td><td>Number of descriptor to be allocated. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga9f9ae6642bb5eeed8ccc1dffa7ec14e1"></a>
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<td class="memname">#define DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">name, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"> </td>
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<td class="paramname">number </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td>   <a class="el" href="a00242.html#ga545036768d164aad61b71502371e7165">AT_NONCACHEABLE_SECTION_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">name</td><td>Allocate decriptor name. </td></tr>
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<tr><td class="paramname">number</td><td>Number of descriptor to be allocated. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga6dcd898a0c546f25356e016b9276a3de"></a>
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<td class="memname">#define DMA_ALLOCATE_LINK_DESCRIPTORS</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">name, </td>
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</tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"> </td>
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<td class="paramname">number </td>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td>   <a class="el" href="a00242.html#gade00270528e66e9f091cc49d1ac2212c">SDK_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], <a class="el" href="a00017.html#ga160b4ffad583e82ad4a80575e4830592">FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE</a>)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">name</td><td>Allocate decriptor name. </td></tr>
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<tr><td class="paramname">number</td><td>Number of descriptor to be allocated. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga2cc9e4b6dceb1346d950ab7fb5f52bb7"></a>
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<td class="memname">#define DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">name, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"> </td>
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<td class="paramname">number </td>
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<td></td>
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<td>)</td>
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<td></td><td>   <a class="el" href="a00242.html#ga545036768d164aad61b71502371e7165">AT_NONCACHEABLE_SECTION_ALIGN</a>(<a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> name[number], <a class="el" href="a00017.html#ga160b4ffad583e82ad4a80575e4830592">FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE</a>)</td>
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</tr>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">name</td><td>Allocate decriptor name. </td></tr>
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<tr><td class="paramname">number</td><td>Number of descriptor to be allocated. </td></tr>
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</table>
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</dd>
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</dl>
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<a class="anchor" id="gaa355501ba0bfb05cc9be452396f92bce"></a>
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<td class="memname">#define DMA_DESCRIPTOR_END_ADDRESS</td>
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<td>(</td>
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<td class="paramtype"> </td>
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<td class="paramname">start, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"> </td>
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<td class="paramname">inc, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"> </td>
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<td class="paramname">bytes, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"> </td>
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<td class="paramname">width </td>
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<td></td>
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<td>)</td>
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<td></td><td>   ((uint32_t *)((uint32_t)(start) + (inc) * (bytes) - (inc) * (width)))</td>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">start</td><td>start address </td></tr>
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<tr><td class="paramname">inc</td><td>address interleave size </td></tr>
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<tr><td class="paramname">bytes</td><td>transfer bytes </td></tr>
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<tr><td class="paramname">width</td><td>transfer width </td></tr>
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</table>
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<h2 class="groupheader">Typedef Documentation</h2>
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<a class="anchor" id="gab844237884d5badd07ac902a9be34275"></a>
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<td class="memname">typedef void(* dma_callback)(struct <a class="el" href="a00017.html#a00319">_dma_handle</a> *handle, void *userData, bool transferDone, uint32_t intmode)</td>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<a class="anchor" id="gaf9bdc3014f3d54c426b6d2df10de4960"></a>
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<td class="memname">anonymous enum</td>
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaf9bdc3014f3d54c426b6d2df10de4960a9b95dc670083f57c33f96b0c10d0c8ba"></a>kStatus_DMA_Busy</em> </td><td class="fielddoc">
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<p>Channel is busy and can't handle the transfer request. </p>
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</td></tr>
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</table>
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<a class="anchor" id="gadb49720dc49f7d4e4cf9adbf2948e409"></a>
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<td class="memname">anonymous enum</td>
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggadb49720dc49f7d4e4cf9adbf2948e409ad9802a5e2f1df9d748838e6e23e0279b"></a>kDMA_AddressInterleave0xWidth</em> </td><td class="fielddoc">
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<p>dma source/destination address no interleave </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggadb49720dc49f7d4e4cf9adbf2948e409a84af12bf3a826e9f4725ae5bb4bbebb8"></a>kDMA_AddressInterleave1xWidth</em> </td><td class="fielddoc">
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<p>dma source/destination address interleave 1xwidth </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggadb49720dc49f7d4e4cf9adbf2948e409ad703190659614263db03cea5d2dfbb6e"></a>kDMA_AddressInterleave2xWidth</em> </td><td class="fielddoc">
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<p>dma source/destination address interleave 2xwidth </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggadb49720dc49f7d4e4cf9adbf2948e409aecf2cec42cd7819983e265710c691888"></a>kDMA_AddressInterleave4xWidth</em> </td><td class="fielddoc">
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<p>dma source/destination address interleave 3xwidth </p>
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</td></tr>
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</table>
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</div>
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<a class="anchor" id="gaae05225933a42f81e7c4a9fb286596f9"></a>
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<div class="memitem">
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<td class="memname">anonymous enum</td>
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaae05225933a42f81e7c4a9fb286596f9a80c88f3fbb3bb2946149c0ec7a7e922a"></a>kDMA_Transfer8BitWidth</em> </td><td class="fielddoc">
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<p>dma channel transfer bit width is 8 bit </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaae05225933a42f81e7c4a9fb286596f9a5b38513482d6d6d92927898f9e2c7703"></a>kDMA_Transfer16BitWidth</em> </td><td class="fielddoc">
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<p>dma channel transfer bit width is 16 bit </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaae05225933a42f81e7c4a9fb286596f9a1a43c564953a0e097907e45cd159c265"></a>kDMA_Transfer32BitWidth</em> </td><td class="fielddoc">
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<p>dma channel transfer bit width is 32 bit </p>
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</td></tr>
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</table>
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</div>
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<a class="anchor" id="ga67f9174a3cb49946d2b67b0e23aa2e83"></a>
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<td class="memname">enum <a class="el" href="a00017.html#ga67f9174a3cb49946d2b67b0e23aa2e83">_dma_priority</a></td>
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</table>
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|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83afaf9bf976bb9d2db3bd2f629cd545f45"></a>kDMA_ChannelPriority0</em> </td><td class="fielddoc">
|
|
<p>Highest channel priority - priority 0. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83a6ff9161839b0b5e675b01353a684a63f"></a>kDMA_ChannelPriority1</em> </td><td class="fielddoc">
|
|
<p>Channel priority 1. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83a259e4e6cf7b6b79608abbe1769e262fe"></a>kDMA_ChannelPriority2</em> </td><td class="fielddoc">
|
|
<p>Channel priority 2. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83a8615d84237aa24c16fdc1675cc932efb"></a>kDMA_ChannelPriority3</em> </td><td class="fielddoc">
|
|
<p>Channel priority 3. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83ae7f6c72a518bc4c68b3be696da1a872d"></a>kDMA_ChannelPriority4</em> </td><td class="fielddoc">
|
|
<p>Channel priority 4. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83a08b83d1381be3c10688f449c9bf90fc4"></a>kDMA_ChannelPriority5</em> </td><td class="fielddoc">
|
|
<p>Channel priority 5. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83acc5b892b2bcf8a632acb64e9c5645273"></a>kDMA_ChannelPriority6</em> </td><td class="fielddoc">
|
|
<p>Channel priority 6. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga67f9174a3cb49946d2b67b0e23aa2e83af238cfde678fdbd26a054fc055f40a4d"></a>kDMA_ChannelPriority7</em> </td><td class="fielddoc">
|
|
<p>Lowest channel priority - priority 7. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaa3d3a75ad649f5766cb6a31f8634db3a"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
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<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00017.html#gaa3d3a75ad649f5766cb6a31f8634db3a">_dma_int</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaa3d3a75ad649f5766cb6a31f8634db3aab39861058eb1c9573babd0752286ea48"></a>kDMA_IntA</em> </td><td class="fielddoc">
|
|
<p>DMA interrupt flag A. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaa3d3a75ad649f5766cb6a31f8634db3aa50cabcc60fb8dc805c62070318fe0c97"></a>kDMA_IntB</em> </td><td class="fielddoc">
|
|
<p>DMA interrupt flag B. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaa3d3a75ad649f5766cb6a31f8634db3aa28e17f00c59b3dde88943be07a8902bd"></a>kDMA_IntError</em> </td><td class="fielddoc">
|
|
<p>DMA interrupt flag error. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga9dde4b29c52fd80e761d4602af18acd4"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00017.html#ga9dde4b29c52fd80e761d4602af18acd4">_dma_trigger_type</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga9dde4b29c52fd80e761d4602af18acd4ae45693316c3b50f21a0fa93e539e9ae5"></a>kDMA_NoTrigger</em> </td><td class="fielddoc">
|
|
<p>Trigger is disabled. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga9dde4b29c52fd80e761d4602af18acd4aca6b545d2f8661404c932a70b8a5abcf"></a>kDMA_LowLevelTrigger</em> </td><td class="fielddoc">
|
|
<p>Low level active trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga9dde4b29c52fd80e761d4602af18acd4a4636793fc071ed9f8e753e84a6e12f85"></a>kDMA_HighLevelTrigger</em> </td><td class="fielddoc">
|
|
<p>High level active trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga9dde4b29c52fd80e761d4602af18acd4a9b9f27849a8e3cf715e30a29b4ba1d04"></a>kDMA_FallingEdgeTrigger</em> </td><td class="fielddoc">
|
|
<p>Falling edge active trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga9dde4b29c52fd80e761d4602af18acd4aa4d1b3c95a9ca3d756d2f68a3bb0afc8"></a>kDMA_RisingEdgeTrigger</em> </td><td class="fielddoc">
|
|
<p>Rising edge active trigger. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga39fca1837c5ce7715cbf571669660c13"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13afa3126f29988635183fa3851e1ee1f2d"></a>kDMA_BurstSize1</em> </td><td class="fielddoc">
|
|
<p>burst size 1 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13a3144a4ab7b2408051fc06ab07b583eab"></a>kDMA_BurstSize2</em> </td><td class="fielddoc">
|
|
<p>burst size 2 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13ac5b15e2705b1295a56557036487d291b"></a>kDMA_BurstSize4</em> </td><td class="fielddoc">
|
|
<p>burst size 4 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13a7aacfca8b6c86bdd0e727b0c8ae046b1"></a>kDMA_BurstSize8</em> </td><td class="fielddoc">
|
|
<p>burst size 8 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13ad6487c57cdb11ae590172c2ff1364ca8"></a>kDMA_BurstSize16</em> </td><td class="fielddoc">
|
|
<p>burst size 16 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13ae05054c8a11020169733c22349aa158e"></a>kDMA_BurstSize32</em> </td><td class="fielddoc">
|
|
<p>burst size 32 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13acb974685c9968ac9dbf74035ecf23bb6"></a>kDMA_BurstSize64</em> </td><td class="fielddoc">
|
|
<p>burst size 64 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13a3c0044f4c389c21f73b08dbb0b8ef829"></a>kDMA_BurstSize128</em> </td><td class="fielddoc">
|
|
<p>burst size 128 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13ac03b658552cde955b815365386e40a70"></a>kDMA_BurstSize256</em> </td><td class="fielddoc">
|
|
<p>burst size 256 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13a491cc51131bb7e9dcd647e54ec8549e7"></a>kDMA_BurstSize512</em> </td><td class="fielddoc">
|
|
<p>burst size 512 transfer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga39fca1837c5ce7715cbf571669660c13af12e2d1fe9b0fccba12b6cad6bc685b3"></a>kDMA_BurstSize1024</em> </td><td class="fielddoc">
|
|
<p>burst size 1024 transfer </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga0f183ffa57f778f141db819590cee922"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00017.html#ga0f183ffa57f778f141db819590cee922">_dma_trigger_burst</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922aa5f7edec7506a38b3b57d04dd774b0b0"></a>kDMA_SingleTransfer</em> </td><td class="fielddoc">
|
|
<p>Single transfer. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922aa6cc38822f852f1ddd1f22c5b79949b8"></a>kDMA_LevelBurstTransfer</em> </td><td class="fielddoc">
|
|
<p>Burst transfer driven by level trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922af06ebd49d4066394642c80ece815d55b"></a>kDMA_EdgeBurstTransfer1</em> </td><td class="fielddoc">
|
|
<p>Perform 1 transfer by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922af0ab73a40234a51b14203e7d83621ac9"></a>kDMA_EdgeBurstTransfer2</em> </td><td class="fielddoc">
|
|
<p>Perform 2 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922a42eb0fe4fd6b2030e64b5d0173c93c68"></a>kDMA_EdgeBurstTransfer4</em> </td><td class="fielddoc">
|
|
<p>Perform 4 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922a4858703ddbc176a60c3015f23a490e17"></a>kDMA_EdgeBurstTransfer8</em> </td><td class="fielddoc">
|
|
<p>Perform 8 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922a0641c94c5e494890f587f3cb60ed7800"></a>kDMA_EdgeBurstTransfer16</em> </td><td class="fielddoc">
|
|
<p>Perform 16 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922af1764eeb6c94e0e1f86529bf6210c524"></a>kDMA_EdgeBurstTransfer32</em> </td><td class="fielddoc">
|
|
<p>Perform 32 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922a8dec3f95cf71d668439e065b17f27235"></a>kDMA_EdgeBurstTransfer64</em> </td><td class="fielddoc">
|
|
<p>Perform 64 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922af2c60c5f0dcbd8bd7d782a7c08c87f0b"></a>kDMA_EdgeBurstTransfer128</em> </td><td class="fielddoc">
|
|
<p>Perform 128 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922a8640003c589e5d3ffd94d4cd962b8456"></a>kDMA_EdgeBurstTransfer256</em> </td><td class="fielddoc">
|
|
<p>Perform 256 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922a0ef881d258e59978faca416630fb1a74"></a>kDMA_EdgeBurstTransfer512</em> </td><td class="fielddoc">
|
|
<p>Perform 512 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0f183ffa57f778f141db819590cee922a6aae117efdce18b2c054ddae971559da"></a>kDMA_EdgeBurstTransfer1024</em> </td><td class="fielddoc">
|
|
<p>Perform 1024 transfers by edge trigger. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga1341dcc4840f5aeaffe92f06a123fcd3"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00017.html#ga1341dcc4840f5aeaffe92f06a123fcd3">_dma_burst_wrap</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga1341dcc4840f5aeaffe92f06a123fcd3a99b1a9eb98902b9277c2ae64f48e5a88"></a>kDMA_NoWrap</em> </td><td class="fielddoc">
|
|
<p>Wrapping is disabled. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga1341dcc4840f5aeaffe92f06a123fcd3ac0ab79249ad0e6bf887498d0f3e3db90"></a>kDMA_SrcWrap</em> </td><td class="fielddoc">
|
|
<p>Wrapping is enabled for source. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga1341dcc4840f5aeaffe92f06a123fcd3afaae8afb83546031e25b0ac5e6494f2b"></a>kDMA_DstWrap</em> </td><td class="fielddoc">
|
|
<p>Wrapping is enabled for destination. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga1341dcc4840f5aeaffe92f06a123fcd3a543352fa3896623517af17829598eb0c"></a>kDMA_SrcAndDstWrap</em> </td><td class="fielddoc">
|
|
<p>Wrapping is enabled for source and destination. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga8eb175ece33c966ea83656c6b38e95cb"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00017.html#ga8eb175ece33c966ea83656c6b38e95cb">_dma_transfer_type</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga8eb175ece33c966ea83656c6b38e95cba24392a93deeb55e04559201839343f3c"></a>kDMA_MemoryToMemory</em> </td><td class="fielddoc">
|
|
<p>Transfer from memory to memory (increment source and destination) </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga8eb175ece33c966ea83656c6b38e95cba7bf1938ae68b1f494aade7a0f4189303"></a>kDMA_PeripheralToMemory</em> </td><td class="fielddoc">
|
|
<p>Transfer from peripheral to memory (increment only destination) </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga8eb175ece33c966ea83656c6b38e95cbaae1c6bab576d7a25d2fa1249f9cd4ee9"></a>kDMA_MemoryToPeripheral</em> </td><td class="fielddoc">
|
|
<p>Transfer from memory to peripheral (increment only source) </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga8eb175ece33c966ea83656c6b38e95cbaf59909afb24e786824cfecdb6afd0da8"></a>kDMA_StaticToStatic</em> </td><td class="fielddoc">
|
|
<p>Peripheral to static memory (do not increment source or destination) </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<h2 class="groupheader">Function Documentation</h2>
|
|
<a class="anchor" id="gade1b5efa61054ce538b37b181dd075bb"></a>
|
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
|
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<tr>
|
|
<td class="memname">void DMA_Init </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>This function enable the DMA clock, set descriptor table and enable DMA peripheral.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga634ced9b86d7dc9543e0b4387123fcac"></a>
|
|
<div class="memitem">
|
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<div class="memproto">
|
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<table class="memname">
|
|
<tr>
|
|
<td class="memname">void DMA_Deinit </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>This function gates the DMA clock.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
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<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga9ba95776f25ee8eae5bdf9bf5fd9c9e6"></a>
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<td class="memname">void DMA_InstallDescriptorMemory </td>
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<td>(</td>
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<td class="paramtype">DMA_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">void * </td>
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<td class="paramname"><em>addr</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
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<p>This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, althrough current DMA driver has a default DMA descriptor buffer, but it support one DMA descriptor for one channel only.</p>
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA base address. </td></tr>
|
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<tr><td class="paramname">addr</td><td>DMA descriptor address </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga0e6279e44ebd6778355f6e9e26e9a8b6"></a>
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<td class="mlabels-left">
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<tr>
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<td class="memname">static bool DMA_ChannelIsActive </td>
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<td>(</td>
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<td class="paramtype">DMA_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>channel</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>True for active state, false otherwise. </dd></dl>
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</div>
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</div>
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<a class="anchor" id="gade4163a20de203d8ddfccbbeedb6caa9"></a>
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static bool DMA_ChannelIsBusy </td>
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<td>(</td>
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<td class="paramtype">DMA_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>channel</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
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<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>True for busy state, false otherwise. </dd></dl>
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</div>
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</div>
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<a class="anchor" id="ga02671643755a7f9395ce1f151a914630"></a>
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static void DMA_EnableChannelInterrupts </td>
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|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>channel</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
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</table>
|
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="gac9873a0205538dffcba7bb59ed1450c5"></a>
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<div class="memitem">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<td class="memname">static void DMA_DisableChannelInterrupts </td>
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|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
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</tr>
|
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
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</dd>
|
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</dl>
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</div>
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</div>
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<a class="anchor" id="gaa0293771d55ee1a7c42a8ffecb0728e7"></a>
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<tr>
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<td class="mlabels-left">
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<td class="memname">static void DMA_EnableChannel </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
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<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
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</div>
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</div>
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<a class="anchor" id="ga8025eebc80c23fa9b5a3a4454855e347"></a>
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<div class="memitem">
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<td class="mlabels-left">
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<td class="memname">static void DMA_DisableChannel </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
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|
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</div>
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</div>
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<a class="anchor" id="gaa706c05b4875366e7f84c83b8d09ae29"></a>
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<div class="memitem">
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<td class="mlabels-left">
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<td class="memname">static void DMA_EnableChannelPeriphRq </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
|
|
<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
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</div>
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</div>
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<a class="anchor" id="gab2d2f88ed16097b2974d1955c725a5dc"></a>
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<div class="memitem">
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<tr>
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<td class="memname">static void DMA_DisableChannelPeriphRq </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
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</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>True for enabled PeriphRq, false for disabled. </dd></dl>
|
|
|
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</div>
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</div>
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<a class="anchor" id="ga04d2004d7d054b4f36676304bc2cd8ad"></a>
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<div class="memitem">
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<td class="memname">void DMA_ConfigureChannelTrigger </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a> * </td>
|
|
<td class="paramname"><em>trigger</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="deprecated"><dt><b><a class="el" href="a00296.html#_deprecated000002">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="a00017.html#gafc795a7c0b3e5f4bbf32c1eed3a9ea47">DMA_SetChannelConfig</a>.</dd></dl>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
<tr><td class="paramname">trigger</td><td>trigger configuration. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="gafc795a7c0b3e5f4bbf32c1eed3a9ea47"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
|
|
<td class="memname">void DMA_SetChannelConfig </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a> * </td>
|
|
<td class="paramname"><em>trigger</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>isPeriph</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
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</div><div class="memdoc">
|
|
<p>This function provide a interface to configure channel configuration reisters.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
<tr><td class="paramname">trigger</td><td>channel configurations structure. </td></tr>
|
|
<tr><td class="paramname">isPeriph</td><td>true is periph request, false is not. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="gaed498d0e17c40aa2899869626c238507"></a>
|
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<div class="memitem">
|
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<div class="memproto">
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<td class="mlabels-left">
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<tr>
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<td class="memname">static uint32_t DMA_SetChannelXferConfig </td>
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<td>(</td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>reload</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>clrTrig</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>intA</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>intB</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint8_t </td>
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<td class="paramname"><em>width</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint8_t </td>
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<td class="paramname"><em>srcInc</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint8_t </td>
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<td class="paramname"><em>dstInc</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>bytes</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
|
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<tr><td class="paramname">reload</td><td>true is reload link descriptor after current exhaust, false is not </td></tr>
|
|
<tr><td class="paramname">clrTrig</td><td>true is clear trigger status, wait software trigger, false is not </td></tr>
|
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<tr><td class="paramname">intA</td><td>enable interruptA </td></tr>
|
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<tr><td class="paramname">intB</td><td>enable interruptB </td></tr>
|
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<tr><td class="paramname">width</td><td>transfer width </td></tr>
|
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<tr><td class="paramname">srcInc</td><td>source address interleave size </td></tr>
|
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<tr><td class="paramname">dstInc</td><td>destination address interleave size </td></tr>
|
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<tr><td class="paramname">bytes</td><td>transfer bytes </td></tr>
|
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>The vaule of xfer config </dd></dl>
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</div>
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</div>
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<a class="anchor" id="gaf0197c674ce188bf214c13bc7be43e14"></a>
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<div class="memitem">
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<table class="memname">
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<tr>
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<td class="memname">uint32_t DMA_GetRemainingBytes </td>
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<td>(</td>
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<td class="paramtype">DMA_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>channel</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
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<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
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</table>
|
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>The number of bytes which have not been transferred yet. </dd></dl>
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</div>
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</div>
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<a class="anchor" id="gad8ae76fc5d858b97de3362100af86df6"></a>
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static void DMA_SetChannelPriority </td>
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<td>(</td>
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<td class="paramtype">DMA_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>channel</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="a00017.html#gabf41c1cbda715e9f64dcd1559c6bffaa">dma_priority_t</a> </td>
|
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<td class="paramname"><em>priority</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
<tr><td class="paramname">priority</td><td>Channel priority value. </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
|
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</div>
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</div>
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<a class="anchor" id="ga1a5311b6ad708e230db517fb04f98a5f"></a>
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<div class="memitem">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static <a class="el" href="a00017.html#gabf41c1cbda715e9f64dcd1559c6bffaa">dma_priority_t</a> DMA_GetChannelPriority </td>
|
|
<td>(</td>
|
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<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
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<td class="paramkey"></td>
|
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<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>channel</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>Channel priority value. </dd></dl>
|
|
|
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</div>
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</div>
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<a class="anchor" id="gaa200c0bd1a2d714f6cd002919ed8a213"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static void DMA_SetChannelConfigValid </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
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</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
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</div>
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<a class="anchor" id="gae8ffd8526580ed3b7ca3520024d0002c"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
|
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<td class="memname">static void DMA_DoChannelSoftwareTrigger </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
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</div>
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<a class="anchor" id="ga956cf0c90e0562e5087475ceefcc489f"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
|
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<td class="memname">static void DMA_LoadChannelTransferConfig </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>xfer</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
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</tr>
|
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</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
<tr><td class="paramname">xfer</td><td>transfer configurations. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
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|
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</div>
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</div>
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<a class="anchor" id="gaf2955b2c961a33fe24d3154ec801f9fd"></a>
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<div class="memitem">
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<div class="memproto">
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<td class="memname">void DMA_CreateDescriptor </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> * </td>
|
|
<td class="paramname"><em>desc</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac6bc4d93e891f0ee4aeac1ecbdd3a0b5">dma_xfercfg_t</a> * </td>
|
|
<td class="paramname"><em>xfercfg</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>srcAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>dstAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>nextDesc</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="deprecated"><dt><b><a class="el" href="a00296.html#_deprecated000003">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>. </dd></dl>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">desc</td><td>DMA descriptor address. </td></tr>
|
|
<tr><td class="paramname">xfercfg</td><td>Transfer configuration for DMA descriptor. </td></tr>
|
|
<tr><td class="paramname">srcAddr</td><td>Address of last item to transmit </td></tr>
|
|
<tr><td class="paramname">dstAddr</td><td>Address of last item to receive. </td></tr>
|
|
<tr><td class="paramname">nextDesc</td><td>Address of next descriptor in chain. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="gabbdbf43b54f0a0029cd27c09c094de36"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
|
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<td class="memname">void DMA_SetupDescriptor </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> * </td>
|
|
<td class="paramname"><em>desc</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>xfercfg</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>srcStartAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>dstStartAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>nextDesc</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
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<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>Note: This function do not support configure wrap descriptor.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">desc</td><td>DMA descriptor address. </td></tr>
|
|
<tr><td class="paramname">xfercfg</td><td>Transfer configuration for DMA descriptor. </td></tr>
|
|
<tr><td class="paramname">srcStartAddr</td><td>Start address of source address. </td></tr>
|
|
<tr><td class="paramname">dstStartAddr</td><td>Start address of destination address. </td></tr>
|
|
<tr><td class="paramname">nextDesc</td><td>Address of next descriptor in chain. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga6c69a736b8e5719fe01bb7d3b76f9088"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
|
|
<td class="memname">void DMA_SetupChannelDescriptor </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> * </td>
|
|
<td class="paramname"><em>desc</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>xfercfg</em>, </td>
|
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</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">void * </td>
|
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<td class="paramname"><em>srcStartAddr</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">void * </td>
|
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<td class="paramname"><em>dstStartAddr</em>, </td>
|
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</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>nextDesc</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#ga53891a1cba87aa0026116bcaced7c0ec">dma_burst_wrap_t</a> </td>
|
|
<td class="paramname"><em>wrapType</em>, </td>
|
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</tr>
|
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<tr>
|
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<td class="paramkey"></td>
|
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<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
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<td class="paramname"><em>burstSize</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<p>Note: This function support configure wrap descriptor.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">desc</td><td>DMA descriptor address. </td></tr>
|
|
<tr><td class="paramname">xfercfg</td><td>Transfer configuration for DMA descriptor. </td></tr>
|
|
<tr><td class="paramname">srcStartAddr</td><td>Start address of source address. </td></tr>
|
|
<tr><td class="paramname">dstStartAddr</td><td>Start address of destination address. </td></tr>
|
|
<tr><td class="paramname">nextDesc</td><td>Address of next descriptor in chain. </td></tr>
|
|
<tr><td class="paramname">wrapType</td><td>burst wrap type. </td></tr>
|
|
<tr><td class="paramname">burstSize</td><td>burst size, reference _dma_burst_size. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
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|
|
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</div>
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</div>
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<a class="anchor" id="gae7c3ca634a04a8afe85b1e55360b17aa"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">void DMA_LoadChannelDescriptor </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> * </td>
|
|
<td class="paramname"><em>descriptor</em> </td>
|
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<p>This function can be used to load desscriptor to driver internal channel descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:</p>
|
|
<ol type="1">
|
|
<li>for the polling transfer, application can allocate a local descriptor memory table to prepare a descriptor firstly and then call this api to load the configured descriptor to driver descriptor table. <div class="fragment"><div class="line">* <a class="code" href="a00017.html#gade1b5efa61054ce538b37b181dd075bb">DMA_Init</a>(DMA0);</div>
|
|
<div class="line">* <a class="code" href="a00017.html#gaa0293771d55ee1a7c42a8ffecb0728e7">DMA_EnableChannel</a>(DMA0, DEMO_DMA_CHANNEL);</div>
|
|
<div class="line">* <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(desc, xferCfg, s_srcBuffer, &s_destBuffer[0], NULL);</div>
|
|
<div class="line">* <a class="code" href="a00017.html#gae7c3ca634a04a8afe85b1e55360b17aa">DMA_LoadChannelDescriptor</a>(DMA0, DEMO_DMA_CHANNEL, (<a class="code" href="a00017.html#a00318">dma_descriptor_t</a> *)desc);</div>
|
|
<div class="line">* <a class="code" href="a00017.html#gae8ffd8526580ed3b7ca3520024d0002c">DMA_DoChannelSoftwareTrigger</a>(DMA0, DEMO_DMA_CHANNEL);</div>
|
|
<div class="line">* <span class="keywordflow">while</span>(<a class="code" href="a00017.html#gade4163a20de203d8ddfccbbeedb6caa9">DMA_ChannelIsBusy</a>(DMA0, DEMO_DMA_CHANNEL))</div>
|
|
<div class="line">* {}</div>
|
|
<div class="line">* </div>
|
|
</div><!-- fragment --></li>
|
|
</ol>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel. </td></tr>
|
|
<tr><td class="paramname">descriptor</td><td>configured DMA descriptor. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
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</div>
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<a class="anchor" id="ga3c61d6121d88d2cdf287fc1cd72912fd"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
|
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<tr>
|
|
<td class="memname">void DMA_AbortTransfer </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>This function aborts DMA transfer specified by handle.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">handle</td><td>DMA handle pointer. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga5354ff2c0c1ec53e2cbd712169fc5558"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">void DMA_CreateHandle </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>channel</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>This function is called if using transaction API for DMA. This function initializes the internal state of DMA handle.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">handle</td><td>DMA handle pointer. The DMA handle stores callback function and parameters. </td></tr>
|
|
<tr><td class="paramname">base</td><td>DMA peripheral base address. </td></tr>
|
|
<tr><td class="paramname">channel</td><td>DMA channel number. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga2eb9a831b9a84c5108097f770dbe90db"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">void DMA_SetCallback </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gab844237884d5badd07ac902a9be34275">dma_callback</a> </td>
|
|
<td class="paramname"><em>callback</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>userData</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>This callback is called in DMA IRQ handler. Use the callback to do something after the current major loop transfer completes.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">handle</td><td>DMA handle pointer. </td></tr>
|
|
<tr><td class="paramname">callback</td><td>DMA callback function pointer. </td></tr>
|
|
<tr><td class="paramname">userData</td><td>Parameter for callback function. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga01ed2edd4ac04c70f83c7c3091ec4b65"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">void DMA_PrepareTransfer </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gadb6e4baf9efcf14a889babc34d6f0d80">dma_transfer_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>srcAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>dstAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>byteWidth</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>transferBytes</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#ga834a242c5bc2fc0fb4cf928616821de0">dma_transfer_type_t</a> </td>
|
|
<td class="paramname"><em>type</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>nextDesc</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="deprecated"><dt><b><a class="el" href="a00296.html#_deprecated000004">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="a00017.html#gad29055b5d8b160f94bb18abce476af7d">DMA_PrepareChannelTransfer</a>. This function prepares the transfer configuration structure according to the user input.</dd></dl>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">config</td><td>The user configuration structure of type dma_transfer_t. </td></tr>
|
|
<tr><td class="paramname">srcAddr</td><td>DMA transfer source address. </td></tr>
|
|
<tr><td class="paramname">dstAddr</td><td>DMA transfer destination address. </td></tr>
|
|
<tr><td class="paramname">byteWidth</td><td>DMA transfer destination address width(bytes). </td></tr>
|
|
<tr><td class="paramname">transferBytes</td><td>DMA transfer bytes to be transferred. </td></tr>
|
|
<tr><td class="paramname">type</td><td>DMA transfer type. </td></tr>
|
|
<tr><td class="paramname">nextDesc</td><td>Chain custom descriptor to transfer. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="section note"><dt>Note</dt><dd>The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the source address must be 4 bytes aligned, or it shall result in source address error(SAE). </dd></dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gad29055b5d8b160f94bb18abce476af7d"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">void DMA_PrepareChannelTransfer </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gad0da2596473587ed2935682a7d1cc78f">dma_channel_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>srcStartAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>dstStartAddr</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>xferCfg</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#ga834a242c5bc2fc0fb4cf928616821de0">dma_transfer_type_t</a> </td>
|
|
<td class="paramname"><em>type</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4bb68fc4d95889a685a0f9263574d9e">dma_channel_trigger_t</a> * </td>
|
|
<td class="paramname"><em>trigger</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>nextDesc</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>This function used to prepare channel transfer configurations.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">config</td><td>Pointer to DMA channel transfer configuration structure. </td></tr>
|
|
<tr><td class="paramname">srcStartAddr</td><td>source start address. </td></tr>
|
|
<tr><td class="paramname">dstStartAddr</td><td>destination start address. </td></tr>
|
|
<tr><td class="paramname">xferCfg</td><td>xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value. </td></tr>
|
|
<tr><td class="paramname">type</td><td>transfer type. </td></tr>
|
|
<tr><td class="paramname">trigger</td><td>DMA channel trigger configurations. </td></tr>
|
|
<tr><td class="paramname">nextDesc</td><td>address of next descriptor. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gade169c9d37d6a2ff949546268ba1c382"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> DMA_SubmitTransfer </td>
|
|
<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gadb6e4baf9efcf14a889babc34d6f0d80">dma_transfer_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="deprecated"><dt><b><a class="el" href="a00296.html#_deprecated000005">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="a00017.html#gae702541c17430371d54c7aea5dbef084">DMA_SubmitChannelTransfer</a>.</dd></dl>
|
|
<p>This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">handle</td><td>DMA handle pointer. </td></tr>
|
|
<tr><td class="paramname">config</td><td>Pointer to DMA transfer configuration structure. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">kStatus_DMA_Success</td><td>It means submit transfer request succeed. </td></tr>
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<tr><td class="paramname">kStatus_DMA_QueueFull</td><td>It means TCD queue is full. Submit transfer request is not allowed. </td></tr>
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<tr><td class="paramname">kStatus_DMA_Busy</td><td>It means the given channel is busy, need to submit request later. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga55d406dd20fa70d7cca25601bae20777"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void DMA_SubmitChannelTransferParameter </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
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<td class="paramname"><em>handle</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>xferCfg</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">void * </td>
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<td class="paramname"><em>srcStartAddr</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">void * </td>
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<td class="paramname"><em>dstStartAddr</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">void * </td>
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<td class="paramname"><em>nextDesc</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:</p>
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<ol type="1">
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<li>for the single transfer, application doesn't need to allocate descriptor table, the head descriptor can be used for it. <div class="fragment"><div class="line"> <a class="code" href="a00017.html#gafc795a7c0b3e5f4bbf32c1eed3a9ea47">DMA_SetChannelConfig</a>(base, channel, trigger, isPeriph);</div>
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<div class="line"> <a class="code" href="a00017.html#ga5354ff2c0c1ec53e2cbd712169fc5558">DMA_CreateHandle</a>(handle, base, channel)</div>
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<div class="line"> <a class="code" href="a00017.html#ga55d406dd20fa70d7cca25601bae20777">DMA_SubmitChannelTransferParameter</a>(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,</div>
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<div class="line">bytes), srcStartAddr, dstStartAddr, NULL);</div>
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<div class="line"> <a class="code" href="a00017.html#gac6fb3f30e13c937cc00fe11218e6ec76">DMA_StartTransfer</a>(handle)</div>
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<div class="line">* </div>
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</div><!-- fragment --></li>
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<li>for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor. <div class="fragment"><div class="line"> define link descriptor table in application with macro</div>
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<div class="line"> DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[3]);</div>
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<div class="line"></div>
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<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
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<div class="line">srcStartAddr, dstStartAddr, nextDesc1);</div>
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<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
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<div class="line">srcStartAddr, dstStartAddr, nextDesc2);</div>
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<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc2, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
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<div class="line">srcStartAddr, dstStartAddr, NULL);</div>
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<div class="line"> <a class="code" href="a00017.html#gafc795a7c0b3e5f4bbf32c1eed3a9ea47">DMA_SetChannelConfig</a>(base, channel, trigger, isPeriph);</div>
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<div class="line"> <a class="code" href="a00017.html#ga5354ff2c0c1ec53e2cbd712169fc5558">DMA_CreateHandle</a>(handle, base, channel)</div>
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<div class="line"> <a class="code" href="a00017.html#ga55d406dd20fa70d7cca25601bae20777">DMA_SubmitChannelTransferParameter</a>(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,</div>
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<div class="line">bytes), srcStartAddr, dstStartAddr, nextDesc0);</div>
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<div class="line"> <a class="code" href="a00017.html#gac6fb3f30e13c937cc00fe11218e6ec76">DMA_StartTransfer</a>(handle);</div>
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<div class="line">* </div>
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</div><!-- fragment --></li>
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</ol>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">handle</td><td>Pointer to DMA handle. </td></tr>
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<tr><td class="paramname">xferCfg</td><td>xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value. </td></tr>
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<tr><td class="paramname">srcStartAddr</td><td>source start address. </td></tr>
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<tr><td class="paramname">dstStartAddr</td><td>destination start address. </td></tr>
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<tr><td class="paramname">nextDesc</td><td>address of next descriptor. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="gabf72e148a82d885b8b4ab3cffd549cc3"></a>
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<div class="memitem">
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<tr>
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<td class="memname">void DMA_SubmitChannelDescriptor </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
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<td class="paramname"><em>handle</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="a00017.html#gadfd370cddb7a377234bcd18910ac65d6">dma_descriptor_t</a> * </td>
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<td class="paramname"><em>descriptor</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, this functiono is typical for the ping pong case:</p>
|
|
<ol type="1">
|
|
<li>for the ping pong case, application should responsible for the descriptor, for example, application should prepare two descriptor table with macro. <div class="fragment"><div class="line"> define link descriptor table in application with macro</div>
|
|
<div class="line"> DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[2]);</div>
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<div class="line"></div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
|
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<div class="line">srcStartAddr, dstStartAddr, nextDesc1);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
|
|
<div class="line">srcStartAddr, dstStartAddr, nextDesc0);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gafc795a7c0b3e5f4bbf32c1eed3a9ea47">DMA_SetChannelConfig</a>(base, channel, trigger, isPeriph);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#ga5354ff2c0c1ec53e2cbd712169fc5558">DMA_CreateHandle</a>(handle, base, channel)</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabf72e148a82d885b8b4ab3cffd549cc3">DMA_SubmitChannelDescriptor</a>(handle, nextDesc0);</div>
|
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<div class="line"> <a class="code" href="a00017.html#gac6fb3f30e13c937cc00fe11218e6ec76">DMA_StartTransfer</a>(handle);</div>
|
|
<div class="line">* </div>
|
|
</div><!-- fragment --></li>
|
|
</ol>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">handle</td><td>Pointer to DMA handle. </td></tr>
|
|
<tr><td class="paramname">descriptor</td><td>descriptor to submit. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="gae702541c17430371d54c7aea5dbef084"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> DMA_SubmitChannelTransfer </td>
|
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<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
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</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gad0da2596473587ed2935682a7d1cc78f">dma_channel_config_t</a> * </td>
|
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<td class="paramname"><em>config</em> </td>
|
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</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time. It is used for the case:</p>
|
|
<ol type="1">
|
|
<li>for the single transfer, application doesn't need to allocate descriptor table, the head descriptor can be used for it. <div class="fragment"><div class="line"> <a class="code" href="a00017.html#ga5354ff2c0c1ec53e2cbd712169fc5558">DMA_CreateHandle</a>(handle, base, channel)</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gad29055b5d8b160f94bb18abce476af7d">DMA_PrepareChannelTransfer</a>(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,NULL);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gae702541c17430371d54c7aea5dbef084">DMA_SubmitChannelTransfer</a>(handle, config)</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gac6fb3f30e13c937cc00fe11218e6ec76">DMA_StartTransfer</a>(handle)</div>
|
|
<div class="line">* </div>
|
|
</div><!-- fragment --></li>
|
|
<li>for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor. <div class="fragment"><div class="line"> define link descriptor table in application with macro</div>
|
|
<div class="line"> DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
|
|
<div class="line">srcStartAddr, dstStartAddr, nextDesc1);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
|
|
<div class="line">srcStartAddr, dstStartAddr, nextDesc2);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc2, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
|
|
<div class="line">srcStartAddr, dstStartAddr, NULL);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#ga5354ff2c0c1ec53e2cbd712169fc5558">DMA_CreateHandle</a>(handle, base, channel)</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gad29055b5d8b160f94bb18abce476af7d">DMA_PrepareChannelTransfer</a>(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gae702541c17430371d54c7aea5dbef084">DMA_SubmitChannelTransfer</a>(handle, config)</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gac6fb3f30e13c937cc00fe11218e6ec76">DMA_StartTransfer</a>(handle)</div>
|
|
<div class="line">* </div>
|
|
</div><!-- fragment --></li>
|
|
<li>for the ping pong case, application should responsible for link descriptor, for example, application should prepare two descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor. <div class="fragment"><div class="line"> define link descriptor table in application with macro</div>
|
|
<div class="line"> DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);</div>
|
|
<div class="line"></div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc0, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
|
|
<div class="line">srcStartAddr, dstStartAddr, nextDesc1);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gabbdbf43b54f0a0029cd27c09c094de36">DMA_SetupDescriptor</a>(nextDesc1, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),</div>
|
|
<div class="line">srcStartAddr, dstStartAddr, nextDesc0);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#ga5354ff2c0c1ec53e2cbd712169fc5558">DMA_CreateHandle</a>(handle, base, channel)</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gad29055b5d8b160f94bb18abce476af7d">DMA_PrepareChannelTransfer</a>(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gae702541c17430371d54c7aea5dbef084">DMA_SubmitChannelTransfer</a>(handle, config)</div>
|
|
<div class="line"> <a class="code" href="a00017.html#gac6fb3f30e13c937cc00fe11218e6ec76">DMA_StartTransfer</a>(handle)</div>
|
|
<div class="line">* </div>
|
|
</div><!-- fragment --> <dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">handle</td><td>DMA handle pointer. </td></tr>
|
|
<tr><td class="paramname">config</td><td>Pointer to DMA transfer configuration structure. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">kStatus_DMA_Success</td><td>It means submit transfer request succeed. </td></tr>
|
|
<tr><td class="paramname">kStatus_DMA_QueueFull</td><td>It means TCD queue is full. Submit transfer request is not allowed. </td></tr>
|
|
<tr><td class="paramname">kStatus_DMA_Busy</td><td>It means the given channel is busy, need to submit request later. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
</li>
|
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</ol>
|
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|
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</div>
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</div>
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<a class="anchor" id="gac6fb3f30e13c937cc00fe11218e6ec76"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void DMA_StartTransfer </td>
|
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<td>(</td>
|
|
<td class="paramtype"><a class="el" href="a00017.html#gac4a65788d7e5762d16a41a50b2cd7956">dma_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em></td><td>)</td>
|
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<td></td>
|
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<p>This function enables the channel request. User can call this function after submitting the transfer request It will trigger transfer start with software trigger only when hardware trigger is not used.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">handle</td><td>DMA handle pointer. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga9da5a899fb0109cec4fc9303e5df0433"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void DMA_IRQHandle </td>
|
|
<td>(</td>
|
|
<td class="paramtype">DMA_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<p>This function clears the channel major interrupt flag and call the callback function if it is not NULL.</p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>DMA base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
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</div>
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</div>
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</div><!-- contents -->
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</div><!-- doc-content -->
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