3138 lines
189 KiB
HTML
3138 lines
189 KiB
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<a href="#nested-classes">Data Structures</a> |
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<a href="#func-members">Functions</a> </div>
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<div class="title">SDIF: SD/MMC/SDIO card interface</div> </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
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<p>The MCUXpresso SDK provides a peripheral driver for the SD/MMC/SDIO card interface (sdif) module of MCUXpresso SDK devices.</p>
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<h1><a class="anchor" id="sdifTypUC"></a>
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Typical use case</h1>
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<h2><a class="anchor" id="sdifOperation"></a>
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sdif Operation</h2>
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<p>Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/sdif </p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
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<tr class="memitem:a00402"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00402">_sdif_dma_descriptor</a></td></tr>
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<tr class="memdesc:a00402"><td class="mdescLeft"> </td><td class="mdescRight">define the internal DMA descriptor <a href="a00050.html#a00402">More...</a><br/></td></tr>
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<tr class="separator:a00402"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00401"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00401">_sdif_dma_config</a></td></tr>
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<tr class="memdesc:a00401"><td class="mdescLeft"> </td><td class="mdescRight">Defines the internal DMA configure structure. <a href="a00050.html#a00401">More...</a><br/></td></tr>
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<tr class="separator:a00401"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00400"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00400">_sdif_data</a></td></tr>
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<tr class="memdesc:a00400"><td class="mdescLeft"> </td><td class="mdescRight">Card data descriptor. <a href="a00050.html#a00400">More...</a><br/></td></tr>
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<tr class="separator:a00400"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00398"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00398">_sdif_command</a></td></tr>
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<tr class="memdesc:a00398"><td class="mdescLeft"> </td><td class="mdescRight">Card command descriptor. <a href="a00050.html#a00398">More...</a><br/></td></tr>
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<tr class="separator:a00398"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00405"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00405">_sdif_transfer</a></td></tr>
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<tr class="memdesc:a00405"><td class="mdescLeft"> </td><td class="mdescRight">Transfer state. <a href="a00050.html#a00405">More...</a><br/></td></tr>
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<tr class="separator:a00405"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00399"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00399">_sdif_config</a></td></tr>
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<tr class="memdesc:a00399"><td class="mdescLeft"> </td><td class="mdescRight">Data structure to initialize the sdif. <a href="a00050.html#a00399">More...</a><br/></td></tr>
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<tr class="separator:a00399"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00397"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00397">_sdif_capability</a></td></tr>
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<tr class="memdesc:a00397"><td class="mdescLeft"> </td><td class="mdescRight">SDIF capability information. <a href="a00050.html#a00397">More...</a><br/></td></tr>
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<tr class="separator:a00397"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00406"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00406">_sdif_transfer_callback</a></td></tr>
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<tr class="memdesc:a00406"><td class="mdescLeft"> </td><td class="mdescRight">sdif callback functions. <a href="a00050.html#a00406">More...</a><br/></td></tr>
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<tr class="separator:a00406"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00403"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00403">_sdif_handle</a></td></tr>
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<tr class="memdesc:a00403"><td class="mdescLeft"> </td><td class="mdescRight">sdif handle <a href="a00050.html#a00403">More...</a><br/></td></tr>
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<tr class="separator:a00403"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00404"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a00404">_sdif_host</a></td></tr>
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<tr class="memdesc:a00404"><td class="mdescLeft"> </td><td class="mdescRight">sdif host descriptor <a href="a00050.html#a00404">More...</a><br/></td></tr>
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<tr class="separator:a00404"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga21e0ec02d52ccc6c1790785e0a1e4c15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga21e0ec02d52ccc6c1790785e0a1e4c15">SDIF_CLOCK_RANGE_NEED_DELAY</a>   (50000000U)</td></tr>
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<tr class="memdesc:ga21e0ec02d52ccc6c1790785e0a1e4c15"><td class="mdescLeft"> </td><td class="mdescRight">SDIOCLKCTRL setting Below clock delay setting should depend on specific platform, so it can be redefined when timing mismatch issue occur. <a href="#ga21e0ec02d52ccc6c1790785e0a1e4c15">More...</a><br/></td></tr>
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<tr class="separator:ga21e0ec02d52ccc6c1790785e0a1e4c15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac8d7da6e4ec1cee68577dce64f2d4e30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gac8d7da6e4ec1cee68577dce64f2d4e30">SDIF_HIGHSPEED_SAMPLE_DELAY</a>   (12U)</td></tr>
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<tr class="memdesc:gac8d7da6e4ec1cee68577dce64f2d4e30"><td class="mdescLeft"> </td><td class="mdescRight">High speed mode clk_sample fixed delay. <a href="#gac8d7da6e4ec1cee68577dce64f2d4e30">More...</a><br/></td></tr>
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<tr class="separator:gac8d7da6e4ec1cee68577dce64f2d4e30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8075c2549cb54cffef00d5cf382c3d3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga8075c2549cb54cffef00d5cf382c3d3c">SDIF_HIGHSPEED_DRV_DELAY</a>   (31U)</td></tr>
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<tr class="memdesc:ga8075c2549cb54cffef00d5cf382c3d3c"><td class="mdescLeft"> </td><td class="mdescRight">High speed mode clk_drv fixed delay. <a href="#ga8075c2549cb54cffef00d5cf382c3d3c">More...</a><br/></td></tr>
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<tr class="separator:ga8075c2549cb54cffef00d5cf382c3d3c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga906dab6d45428259f06b9f29de9af0fa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga906dab6d45428259f06b9f29de9af0fa"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga906dab6d45428259f06b9f29de9af0fa">SDIF_HIGHSPEED_SAMPLE_PHASE_SHIFT</a>   (0U)</td></tr>
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<tr class="memdesc:ga906dab6d45428259f06b9f29de9af0fa"><td class="mdescLeft"> </td><td class="mdescRight">High speed mode clk_sample phase shift. <br/></td></tr>
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<tr class="separator:ga906dab6d45428259f06b9f29de9af0fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6d7869e0992a3d7753be40d88c868bcf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6d7869e0992a3d7753be40d88c868bcf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga6d7869e0992a3d7753be40d88c868bcf">SDIF_HIGHSPEED_DRV_PHASE_SHIFT</a>   (1U) /* 90 degrees clk_drv phase delay */</td></tr>
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<tr class="memdesc:ga6d7869e0992a3d7753be40d88c868bcf"><td class="mdescLeft"> </td><td class="mdescRight">High speed mode clk_drv phase shift. <br/></td></tr>
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<tr class="separator:ga6d7869e0992a3d7753be40d88c868bcf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae4f0b6438ebc1c7429ccfdfd043f5266"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gae4f0b6438ebc1c7429ccfdfd043f5266">SDIF_DEFAULT_MODE_SAMPLE_DELAY</a>   (12U)</td></tr>
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<tr class="memdesc:gae4f0b6438ebc1c7429ccfdfd043f5266"><td class="mdescLeft"> </td><td class="mdescRight">default mode sample fixed delay <a href="#gae4f0b6438ebc1c7429ccfdfd043f5266">More...</a><br/></td></tr>
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<tr class="separator:gae4f0b6438ebc1c7429ccfdfd043f5266"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2a2ba275bf95c89fad422728a8492e8e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2a2ba275bf95c89fad422728a8492e8e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga2a2ba275bf95c89fad422728a8492e8e">SDIF_DEFAULT_MODE_DRV_DELAY</a>   (31U)</td></tr>
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<tr class="memdesc:ga2a2ba275bf95c89fad422728a8492e8e"><td class="mdescLeft"> </td><td class="mdescRight">31 * 250ps = 7.75ns <br/></td></tr>
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<tr class="separator:ga2a2ba275bf95c89fad422728a8492e8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga63dcbfc54eb685191ac6485a521a1908"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga63dcbfc54eb685191ac6485a521a1908"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga63dcbfc54eb685191ac6485a521a1908">SDIF_INTERNAL_DMA_ADDR_ALIGN</a>   (4U)</td></tr>
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<tr class="memdesc:ga63dcbfc54eb685191ac6485a521a1908"><td class="mdescLeft"> </td><td class="mdescRight">SDIF internal DMA descriptor address and the data buffer address align. <br/></td></tr>
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<tr class="separator:ga63dcbfc54eb685191ac6485a521a1908"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga73dbfaf197fe4fc5eab0549aaa8f4a4e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga73dbfaf197fe4fc5eab0549aaa8f4a4e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga73dbfaf197fe4fc5eab0549aaa8f4a4e">SDIF_DMA_DESCRIPTOR_DISABLE_COMPLETE_INT_FLAG</a>   (1UL << 1U)</td></tr>
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<tr class="memdesc:ga73dbfaf197fe4fc5eab0549aaa8f4a4e"><td class="mdescLeft"> </td><td class="mdescRight">SDIF DMA descriptor flag. <br/></td></tr>
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<tr class="separator:ga73dbfaf197fe4fc5eab0549aaa8f4a4e"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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Typedefs</h2></td></tr>
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<tr class="memitem:gac37b3617968ac9f175b48d38d1de6a22"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac37b3617968ac9f175b48d38d1de6a22"></a>
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typedef enum <a class="el" href="a00050.html#ga072babb2a973c08a492c7ce298ba5434">_sdif_bus_width</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gac37b3617968ac9f175b48d38d1de6a22">sdif_bus_width_t</a></td></tr>
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<tr class="memdesc:gac37b3617968ac9f175b48d38d1de6a22"><td class="mdescLeft"> </td><td class="mdescRight">define the card bus width type <br/></td></tr>
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<tr class="memitem:gaa2dd65df89da0ddf0071c1ad8c36fc9d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa2dd65df89da0ddf0071c1ad8c36fc9d"></a>
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typedef enum <a class="el" href="a00050.html#gacd95056faf986ed27c29786acb0074f0">_sdif_dma_mode</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaa2dd65df89da0ddf0071c1ad8c36fc9d">sdif_dma_mode_t</a></td></tr>
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<tr class="memdesc:gaa2dd65df89da0ddf0071c1ad8c36fc9d"><td class="mdescLeft"> </td><td class="mdescRight">define the internal DMA mode <br/></td></tr>
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typedef struct <a class="el" href="a00050.html#a00402">_sdif_dma_descriptor</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga84da8a71b2bab48a66e2f609f68a1fc1">sdif_dma_descriptor_t</a></td></tr>
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<tr class="memdesc:ga84da8a71b2bab48a66e2f609f68a1fc1"><td class="mdescLeft"> </td><td class="mdescRight">define the internal DMA descriptor <br/></td></tr>
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<tr class="separator:ga84da8a71b2bab48a66e2f609f68a1fc1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae6d0cda258bab3c5c069370756dffba7"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00050.html#a00401">_sdif_dma_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a></td></tr>
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<tr class="memdesc:gae6d0cda258bab3c5c069370756dffba7"><td class="mdescLeft"> </td><td class="mdescRight">Defines the internal DMA configure structure. <a href="#gae6d0cda258bab3c5c069370756dffba7">More...</a><br/></td></tr>
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<tr class="separator:gae6d0cda258bab3c5c069370756dffba7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5867e5466af41cd4a9fb614e9fdd8943"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5867e5466af41cd4a9fb614e9fdd8943"></a>
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typedef struct <a class="el" href="a00050.html#a00400">_sdif_data</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga5867e5466af41cd4a9fb614e9fdd8943">sdif_data_t</a></td></tr>
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<tr class="memdesc:ga5867e5466af41cd4a9fb614e9fdd8943"><td class="mdescLeft"> </td><td class="mdescRight">Card data descriptor. <br/></td></tr>
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<tr class="separator:ga5867e5466af41cd4a9fb614e9fdd8943"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafdde0422895c51cdc357bd9f802eb1ce"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00050.html#a00398">_sdif_command</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gafdde0422895c51cdc357bd9f802eb1ce">sdif_command_t</a></td></tr>
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<tr class="memdesc:gafdde0422895c51cdc357bd9f802eb1ce"><td class="mdescLeft"> </td><td class="mdescRight">Card command descriptor. <a href="#gafdde0422895c51cdc357bd9f802eb1ce">More...</a><br/></td></tr>
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<tr class="separator:gafdde0422895c51cdc357bd9f802eb1ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa092db6631be91815d3659207c75e7dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa092db6631be91815d3659207c75e7dc"></a>
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typedef struct <a class="el" href="a00050.html#a00405">_sdif_transfer</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaa092db6631be91815d3659207c75e7dc">sdif_transfer_t</a></td></tr>
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<tr class="memdesc:gaa092db6631be91815d3659207c75e7dc"><td class="mdescLeft"> </td><td class="mdescRight">Transfer state. <br/></td></tr>
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<tr class="separator:gaa092db6631be91815d3659207c75e7dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9c23bbca54bba64556f3392d9d085c60"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga9c23bbca54bba64556f3392d9d085c60"></a>
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typedef struct <a class="el" href="a00050.html#a00399">_sdif_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga9c23bbca54bba64556f3392d9d085c60">sdif_config_t</a></td></tr>
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<tr class="memdesc:ga9c23bbca54bba64556f3392d9d085c60"><td class="mdescLeft"> </td><td class="mdescRight">Data structure to initialize the sdif. <br/></td></tr>
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<tr class="separator:ga9c23bbca54bba64556f3392d9d085c60"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9d783f07ed845d9b0fd2cdce1846443d"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00050.html#a00397">_sdif_capability</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga9d783f07ed845d9b0fd2cdce1846443d">sdif_capability_t</a></td></tr>
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<tr class="memdesc:ga9d783f07ed845d9b0fd2cdce1846443d"><td class="mdescLeft"> </td><td class="mdescRight">SDIF capability information. <a href="#ga9d783f07ed845d9b0fd2cdce1846443d">More...</a><br/></td></tr>
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<tr class="separator:ga9d783f07ed845d9b0fd2cdce1846443d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeffa26738150dee3d0af5b65608a057f"><td class="memItemLeft" align="right" valign="top">typedef struct <br class="typebreak"/>
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<a class="el" href="a00050.html#a00406">_sdif_transfer_callback</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaeffa26738150dee3d0af5b65608a057f">sdif_transfer_callback_t</a></td></tr>
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<tr class="memdesc:gaeffa26738150dee3d0af5b65608a057f"><td class="mdescLeft"> </td><td class="mdescRight">sdif callback functions. <a href="#gaeffa26738150dee3d0af5b65608a057f">More...</a><br/></td></tr>
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<tr class="separator:gaeffa26738150dee3d0af5b65608a057f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaabd0af455c37e449cdd1cee065d04c73"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00050.html#a00403">_sdif_handle</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaabd0af455c37e449cdd1cee065d04c73">sdif_handle_t</a></td></tr>
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<tr class="memdesc:gaabd0af455c37e449cdd1cee065d04c73"><td class="mdescLeft"> </td><td class="mdescRight">sdif handle <a href="#gaabd0af455c37e449cdd1cee065d04c73">More...</a><br/></td></tr>
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<tr class="separator:gaabd0af455c37e449cdd1cee065d04c73"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga24f457e1fc3ee1d874b8174efd5d554b"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a>(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga24f457e1fc3ee1d874b8174efd5d554b">sdif_transfer_function_t</a> )(SDIF_Type *base, <a class="el" href="a00050.html#gaa092db6631be91815d3659207c75e7dc">sdif_transfer_t</a> *content)</td></tr>
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<tr class="memdesc:ga24f457e1fc3ee1d874b8174efd5d554b"><td class="mdescLeft"> </td><td class="mdescRight">sdif transfer function. <a href="#ga24f457e1fc3ee1d874b8174efd5d554b">More...</a><br/></td></tr>
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<tr class="separator:ga24f457e1fc3ee1d874b8174efd5d554b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0230d1970414701ade5cea3021c1376d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0230d1970414701ade5cea3021c1376d"></a>
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typedef struct <a class="el" href="a00050.html#a00404">_sdif_host</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga0230d1970414701ade5cea3021c1376d">sdif_host_t</a></td></tr>
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<tr class="memdesc:ga0230d1970414701ade5cea3021c1376d"><td class="mdescLeft"> </td><td class="mdescRight">sdif host descriptor <br/></td></tr>
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<tr class="separator:ga0230d1970414701ade5cea3021c1376d"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
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Enumerations</h2></td></tr>
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<tr class="memitem:ga94798fdadfbf49a7c658ace669a1d310"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310affb9182360cf683b9b56bb7d6137f1fa">kStatus_SDIF_DescriptorBufferLenError</a> = MAKE_STATUS(kStatusGroup_SDIF, 0U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310a14433840ce27b3e4f9e93adc7bd0ff96">kStatus_SDIF_InvalidArgument</a> = MAKE_STATUS(kStatusGroup_SDIF, 1U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310a768343b1047ef305d1f6d4890dc2f6e8">kStatus_SDIF_SyncCmdTimeout</a> = MAKE_STATUS(kStatusGroup_SDIF, 2U),
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<br/>
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310ada6e65b3f5e6bb69c529d8521893077a">kStatus_SDIF_SendCmdFail</a> = MAKE_STATUS(kStatusGroup_SDIF, 3U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310aa949a8ea4ebdf057c3302c2691f9e1a7">kStatus_SDIF_SendCmdErrorBufferFull</a>,
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310a66bfe56d1576b4a8c2b0e9918798b536">kStatus_SDIF_DMATransferFailWithFBE</a>,
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310a8fc19c221f2d75afed23dd787ab9f3df">kStatus_SDIF_DMATransferDescriptorUnavailable</a>,
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310ad109309cb0d032eaeab7aff5aed50643">kStatus_SDIF_DataTransferFail</a> = MAKE_STATUS(kStatusGroup_SDIF, 6U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310a5ea0e44c0cae54e6d6522869f38c57aa">kStatus_SDIF_ResponseError</a> = MAKE_STATUS(kStatusGroup_SDIF, 7U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310add0613dcab7dc57b9fc808a7244c80b8">kStatus_SDIF_DMAAddrNotAlign</a> = MAKE_STATUS(kStatusGroup_SDIF, 8U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310acf576c022cbc7f0f8c5b3a7d41982800">kStatus_SDIF_BusyTransferring</a> = MAKE_STATUS(kStatusGroup_SDIF, 9U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310ae4b2a2b0998dcdf940fa2bc5aecf217e">kStatus_SDIF_DataTransferSuccess</a> = MAKE_STATUS(kStatusGroup_SDIF, 10U),
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  <a class="el" href="a00050.html#gga94798fdadfbf49a7c658ace669a1d310a0938352eb53bfa49dd714852cb5973f8">kStatus_SDIF_SendCmdSuccess</a> = MAKE_STATUS(kStatusGroup_SDIF, 11U)
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<br/>
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}</td></tr>
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<tr class="memdesc:ga94798fdadfbf49a7c658ace669a1d310"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_status SDIF status <a href="a00050.html#ga94798fdadfbf49a7c658ace669a1d310">More...</a><br/></td></tr>
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<tr class="separator:ga94798fdadfbf49a7c658ace669a1d310"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae4d5251432e1a9e6803c0240cc492e18"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#ggae4d5251432e1a9e6803c0240cc492e18a37d71dded0a8486f1903bf9d388d0f19">kSDIF_SupportHighSpeedFlag</a> = 0x1U,
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<br/>
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  <a class="el" href="a00050.html#ggae4d5251432e1a9e6803c0240cc492e18a5e195eba807f307e481e5e650eb3aed7">kSDIF_SupportDmaFlag</a> = 0x2U,
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  <a class="el" href="a00050.html#ggae4d5251432e1a9e6803c0240cc492e18a8d919e7879aa3cb1dd653233ca804d8f">kSDIF_SupportSuspendResumeFlag</a> = 0x4U,
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  <a class="el" href="a00050.html#ggae4d5251432e1a9e6803c0240cc492e18a7f35069105bd14ef049563536cb26ebb">kSDIF_SupportV330Flag</a> = 0x8U,
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  <a class="el" href="a00050.html#ggae4d5251432e1a9e6803c0240cc492e18a85bd0f974c1db6fbb3e9ff905c5ced33">kSDIF_Support4BitFlag</a> = 0x10U,
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  <a class="el" href="a00050.html#ggae4d5251432e1a9e6803c0240cc492e18ac3e1e0c96d0a6d6a3fdf004d3306bae4">kSDIF_Support8BitFlag</a> = 0x20U
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}</td></tr>
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<tr class="memdesc:gae4d5251432e1a9e6803c0240cc492e18"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_capability_flag Host controller capabilities flag mask <a href="a00050.html#gae4d5251432e1a9e6803c0240cc492e18">More...</a><br/></td></tr>
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<tr class="separator:gae4d5251432e1a9e6803c0240cc492e18"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7ff5f2dff38e7639981794c43dc9167b"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#gga7ff5f2dff38e7639981794c43dc9167baef40cc6fcf0a97b4b2fd2c75f88bc779">kSDIF_ResetController</a> = SDIF_CTRL_CONTROLLER_RESET_MASK,
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  <a class="el" href="a00050.html#gga7ff5f2dff38e7639981794c43dc9167bac0fb2455d783502198e25620759737e6">kSDIF_ResetFIFO</a> = SDIF_CTRL_FIFO_RESET_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga7ff5f2dff38e7639981794c43dc9167ba9200d7f30ecc3222473158089913bd3a">kSDIF_ResetDMAInterface</a> = SDIF_CTRL_DMA_RESET_MASK,
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  <a class="el" href="a00050.html#gga7ff5f2dff38e7639981794c43dc9167ba1e49461e4d4843585850d067d207d582">kSDIF_ResetAll</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga7ff5f2dff38e7639981794c43dc9167b"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_reset_type define the reset type <a href="a00050.html#ga7ff5f2dff38e7639981794c43dc9167b">More...</a><br/></td></tr>
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<tr class="separator:ga7ff5f2dff38e7639981794c43dc9167b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga072babb2a973c08a492c7ce298ba5434"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga072babb2a973c08a492c7ce298ba5434">_sdif_bus_width</a> { <br/>
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  <a class="el" href="a00050.html#gga072babb2a973c08a492c7ce298ba5434ab7d8da1ba7af8502355e546b5f086ed2">kSDIF_Bus1BitWidth</a> = 0U,
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  <a class="el" href="a00050.html#gga072babb2a973c08a492c7ce298ba5434a1baf3ad61dd63b12c5d89df87ae58fea">kSDIF_Bus4BitWidth</a> = 1U,
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  <a class="el" href="a00050.html#gga072babb2a973c08a492c7ce298ba5434af919b8fe0e8e5531cb62ad00a7135d6b">kSDIF_Bus8BitWidth</a> = 2U
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<br/>
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}</td></tr>
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<tr class="memdesc:ga072babb2a973c08a492c7ce298ba5434"><td class="mdescLeft"> </td><td class="mdescRight">define the card bus width type <a href="a00050.html#ga072babb2a973c08a492c7ce298ba5434">More...</a><br/></td></tr>
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<tr class="separator:ga072babb2a973c08a492c7ce298ba5434"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaabfcbcb5ac86a1edac4035264bc7d2b8"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a69b983ebdb8a3e9417e1448d9e257772">kSDIF_CmdResponseExpect</a> = SDIF_CMD_RESPONSE_EXPECT_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a7881b17a0812647bf1211bd6c2ecbacd">kSDIF_CmdResponseLengthLong</a> = SDIF_CMD_RESPONSE_LENGTH_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a60b2fc9d9d799ce1a402feb88ad1d0f7">kSDIF_CmdCheckResponseCRC</a> = SDIF_CMD_CHECK_RESPONSE_CRC_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8afaca694830ba3659fc5f4ab0c54727ce">kSDIF_DataExpect</a> = SDIF_CMD_DATA_EXPECTED_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a1d8afe6680f1803f334c6242595636ac">kSDIF_DataWriteToCard</a> = SDIF_CMD_READ_WRITE_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8ae63bc8f0de5089a3f50fcd881f42b222">kSDIF_DataStreamTransfer</a> = SDIF_CMD_TRANSFER_MODE_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a7b124728d0045868bd9ee09da3cdab07">kSDIF_DataTransferAutoStop</a> = SDIF_CMD_SEND_AUTO_STOP_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8afec895df86c912894df96ed10958a521">kSDIF_WaitPreTransferComplete</a>,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a94065d24edd9a7668a66dc9bd591950a">kSDIF_TransferStopAbort</a> = SDIF_CMD_STOP_ABORT_CMD_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a9fb7d6c27a3fcd251d4fe32ec4840480">kSDIF_SendInitialization</a>,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8aa4c4bf9a08b7e29d4847753f9b16ad17">kSDIF_CmdUpdateClockRegisterOnly</a>,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a093f1056ae474c3e6c0fbc50794b4cdf">kSDIF_CmdtoReadCEATADevice</a> = SDIF_CMD_READ_CEATA_DEVICE_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a1565e1a4e13a968d157f9262381bb5c7">kSDIF_CmdExpectCCS</a> = SDIF_CMD_CCS_EXPECTED_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8ae80eb10284249894dce0ab1858fe733f">kSDIF_BootModeEnable</a> = SDIF_CMD_ENABLE_BOOT_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8ae82a77a4612cab23fd02d796dd92e319">kSDIF_BootModeExpectAck</a> = SDIF_CMD_EXPECT_BOOT_ACK_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8ad7f0a31bd66b1494e9c0bf2859f1628d">kSDIF_BootModeDisable</a> = SDIF_CMD_DISABLE_BOOT_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8ae06160be54c46c5f69e9c0eedf381270">kSDIF_BootModeAlternate</a> = SDIF_CMD_BOOT_MODE_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a33079fbf59cf33517c65161da234bade">kSDIF_CmdVoltageSwitch</a> = SDIF_CMD_VOLT_SWITCH_MASK,
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<br/>
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  <a class="el" href="a00050.html#ggaabfcbcb5ac86a1edac4035264bc7d2b8a6b5255fe7e86c08e16ce8d007910fe59">kSDIF_CmdDataUseHoldReg</a> = SDIF_CMD_USE_HOLD_REG_MASK
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<br/>
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}</td></tr>
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<tr class="memdesc:gaabfcbcb5ac86a1edac4035264bc7d2b8"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_command_flags define the command flags <a href="a00050.html#gaabfcbcb5ac86a1edac4035264bc7d2b8">More...</a><br/></td></tr>
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<tr class="separator:gaabfcbcb5ac86a1edac4035264bc7d2b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d76b81b0ad4c19007a781d4edb8181f"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#gga5d76b81b0ad4c19007a781d4edb8181fae24ab83bd6c0959918366bee522417f9">kCARD_CommandTypeNormal</a> = 0U,
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<br/>
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  <a class="el" href="a00050.html#gga5d76b81b0ad4c19007a781d4edb8181fa635a0b0c8ce3312236ca7a2d1ce159f5">kCARD_CommandTypeSuspend</a> = 1U,
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<br/>
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  <a class="el" href="a00050.html#gga5d76b81b0ad4c19007a781d4edb8181fa5c6154a2bf09464d521d21c874fc76a7">kCARD_CommandTypeResume</a> = 2U,
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<br/>
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  <a class="el" href="a00050.html#gga5d76b81b0ad4c19007a781d4edb8181faa3909c9f96f6ec9fa625efe84ecfb5c9">kCARD_CommandTypeAbort</a> = 3U
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<br/>
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}</td></tr>
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<tr class="memdesc:ga5d76b81b0ad4c19007a781d4edb8181f"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_command_type The command type <a href="a00050.html#ga5d76b81b0ad4c19007a781d4edb8181f">More...</a><br/></td></tr>
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<tr class="separator:ga5d76b81b0ad4c19007a781d4edb8181f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaac34dfe6c6b73b43a4656c9dce041034"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034a5d49d4b2f8a98053ee48d5012acf9ed2">kCARD_ResponseTypeNone</a> = 0U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034a74964391f7a0126c628c74baeafa518b">kCARD_ResponseTypeR1</a> = 1U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034a7e8a8155761b6f1511f498ce53e07ccf">kCARD_ResponseTypeR1b</a> = 2U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034ac4895a8c8ba120c3732db68b89f96953">kCARD_ResponseTypeR2</a> = 3U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034ad1f920acb2d8a5a28bff976cae7aff46">kCARD_ResponseTypeR3</a> = 4U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034a8298df9537021d76ecfe0a026c4c3fdd">kCARD_ResponseTypeR4</a> = 5U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034a9c1b4e62f3f81d7d23ec127c3a4a213f">kCARD_ResponseTypeR5</a> = 6U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034ae08443bb563fccdaba2fc81737292fb1">kCARD_ResponseTypeR5b</a> = 7U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034a1a659f655dbc1e029fd601f496e81bb5">kCARD_ResponseTypeR6</a> = 8U,
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<br/>
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  <a class="el" href="a00050.html#ggaac34dfe6c6b73b43a4656c9dce041034a3e8c6d2dc60235e4134e3a46789bebd1">kCARD_ResponseTypeR7</a> = 9U
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<br/>
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}</td></tr>
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<tr class="memdesc:gaac34dfe6c6b73b43a4656c9dce041034"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_response_type The command response type. <a href="a00050.html#gaac34dfe6c6b73b43a4656c9dce041034">More...</a><br/></td></tr>
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<tr class="separator:gaac34dfe6c6b73b43a4656c9dce041034"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0ed680fdb405e7195d9f14032851eebb"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba160a4abad8284aacf4126987ee59324d">kSDIF_CardDetect</a> = SDIF_INTMASK_CDET_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba6a8baea81c15a887cee8d76593721754">kSDIF_ResponseError</a> = SDIF_INTMASK_RE_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba7aab46ff287bade786f734825bf19e6a">kSDIF_CommandDone</a> = SDIF_INTMASK_CDONE_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebbab0a446850d226e415aaf9f76672e87e4">kSDIF_DataTransferOver</a> = SDIF_INTMASK_DTO_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba0ed53d5087e02de21a39b0952fa43a9f">kSDIF_WriteFIFORequest</a> = SDIF_INTMASK_TXDR_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebbaaa8b0faf4e56e6f8b4aeb00124fb6cf4">kSDIF_ReadFIFORequest</a> = SDIF_INTMASK_RXDR_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba67f0464831371026d510e171008bbb18">kSDIF_ResponseCRCError</a> = SDIF_INTMASK_RCRC_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebbac487eb08c6910e398eb303b75bcd29a0">kSDIF_DataCRCError</a> = SDIF_INTMASK_DCRC_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba619f95afb5a0dddf955517eff94b3939">kSDIF_ResponseTimeout</a> = SDIF_INTMASK_RTO_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebbaa323878dfaffad951258dda2357f2e68">kSDIF_DataReadTimeout</a> = SDIF_INTMASK_DRTO_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebbafad89a62d07fba9b26fe6ab7ddba2bf3">kSDIF_DataStarvationByHostTimeout</a> = SDIF_INTMASK_HTO_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba397e10660d40bb20969df3b7699db4f2">kSDIF_FIFOError</a> = SDIF_INTMASK_FRUN_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba761428cb616af48531af3f857d9e0be5">kSDIF_HardwareLockError</a> = SDIF_INTMASK_HLE_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba291b8c9bbb1d9e989545d6d61af08117">kSDIF_DataStartBitError</a> = SDIF_INTMASK_SBE_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebbaa52598ea2150e99c45c7b9924ad4fd94">kSDIF_AutoCmdDone</a> = SDIF_INTMASK_ACD_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba2bac7769b6e2c2290630a9fef6f6d7c8">kSDIF_DataEndBitError</a> = SDIF_INTMASK_EBE_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba0b9a6053102bd4b4b35df1442223281d">kSDIF_SDIOInterrupt</a> = SDIF_INTMASK_SDIO_INT_MASK_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba0ca5490df2a1d065d7ad41f576163104">kSDIF_CommandTransferStatus</a>,
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<br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba052aab1aca6b295d572adc9cb61f7561">kSDIF_DataTransferStatus</a>
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, <br/>
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  <a class="el" href="a00050.html#gga0ed680fdb405e7195d9f14032851eebba2bdef2ae7a84e31cd7ad50ec3f24b04b">kSDIF_AllInterruptStatus</a> = 0x1FFFFU
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<br/>
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}</td></tr>
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<tr class="memdesc:ga0ed680fdb405e7195d9f14032851eebb"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_interrupt_mask define the interrupt mask flags <a href="a00050.html#ga0ed680fdb405e7195d9f14032851eebb">More...</a><br/></td></tr>
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<tr class="separator:ga0ed680fdb405e7195d9f14032851eebb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0944a4353780132eeab7b06e3e42291d"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#gga0944a4353780132eeab7b06e3e42291dac0d13081e45441059e860a377129398a">kSDIF_DMATransFinishOneDescriptor</a> = SDIF_IDSTS_TI_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0944a4353780132eeab7b06e3e42291daad0130645ec9d3b61d4aa370b22dd69d">kSDIF_DMARecvFinishOneDescriptor</a> = SDIF_IDSTS_RI_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0944a4353780132eeab7b06e3e42291daa622d870a3753fd81ddeb07d52b9472c">kSDIF_DMAFatalBusError</a> = SDIF_IDSTS_FBE_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0944a4353780132eeab7b06e3e42291dacde9409865d8c3541694543672f7398e">kSDIF_DMADescriptorUnavailable</a> = SDIF_IDSTS_DU_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0944a4353780132eeab7b06e3e42291da8851cf5387f9071b392fc50faf9fbd90">kSDIF_DMACardErrorSummary</a> = SDIF_IDSTS_CES_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0944a4353780132eeab7b06e3e42291da844f5f23ed367ff3959d529c03c545a4">kSDIF_NormalInterruptSummary</a> = SDIF_IDSTS_NIS_MASK,
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<br/>
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  <a class="el" href="a00050.html#gga0944a4353780132eeab7b06e3e42291da2f91f26a38f52241a995d2bd90bd8ac2">kSDIF_AbnormalInterruptSummary</a> = SDIF_IDSTS_AIS_MASK
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<br/>
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}</td></tr>
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<tr class="memdesc:ga0944a4353780132eeab7b06e3e42291d"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_dma_status define the internal DMA status flags <a href="a00050.html#ga0944a4353780132eeab7b06e3e42291d">More...</a><br/></td></tr>
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<tr class="separator:ga0944a4353780132eeab7b06e3e42291d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4790f45dcc812c1b00184a2edccdddf5"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00050.html#gga4790f45dcc812c1b00184a2edccdddf5a1c2af2525d1f81757b7da07eda13df16">kSDIF_DisableCompleteInterrupt</a> = 0x2U,
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<br/>
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  <a class="el" href="a00050.html#gga4790f45dcc812c1b00184a2edccdddf5a35d7873e7234b6f6a8dd60f83d6a1576">kSDIF_DMADescriptorDataBufferEnd</a> = 0x4U,
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<br/>
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  <a class="el" href="a00050.html#gga4790f45dcc812c1b00184a2edccdddf5aa98e2d5b42b28b1c4bebe29ceb48b041">kSDIF_DMADescriptorDataBufferStart</a> = 0x8U,
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<br/>
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  <a class="el" href="a00050.html#gga4790f45dcc812c1b00184a2edccdddf5a69a7866e867cc6b241fdabac6941f559">kSDIF_DMASecondAddrChained</a> = 0x10U,
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<br/>
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  <a class="el" href="a00050.html#gga4790f45dcc812c1b00184a2edccdddf5ade67ea0cc618f38d8a6c0e6a87995994">kSDIF_DMADescriptorEnd</a> = 0x20U,
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<br/>
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  <a class="el" href="a00050.html#gga4790f45dcc812c1b00184a2edccdddf5a1e1368354275b6dd092bc91a1cec781d">kSDIF_DMADescriptorOwnByDMA</a> = (int)0x80000000
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<br/>
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}</td></tr>
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<tr class="memdesc:ga4790f45dcc812c1b00184a2edccdddf5"><td class="mdescLeft"> </td><td class="mdescRight">_sdif_dma_descriptor_flag define the internal DMA descriptor flag <a href="a00050.html#ga4790f45dcc812c1b00184a2edccdddf5">More...</a><br/></td></tr>
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<tr class="separator:ga4790f45dcc812c1b00184a2edccdddf5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacd95056faf986ed27c29786acb0074f0"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gacd95056faf986ed27c29786acb0074f0">_sdif_dma_mode</a> </td></tr>
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<tr class="memdesc:gacd95056faf986ed27c29786acb0074f0"><td class="mdescLeft"> </td><td class="mdescRight">define the internal DMA mode <br/></td></tr>
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<tr class="separator:gacd95056faf986ed27c29786acb0074f0"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:gaf3d376ef4ebd49d0a194187b9e3fda25"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaf3d376ef4ebd49d0a194187b9e3fda25">SDIF_Init</a> (SDIF_Type *base, <a class="el" href="a00050.html#ga9c23bbca54bba64556f3392d9d085c60">sdif_config_t</a> *config)</td></tr>
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<tr class="memdesc:gaf3d376ef4ebd49d0a194187b9e3fda25"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module initialization function. <a href="#gaf3d376ef4ebd49d0a194187b9e3fda25">More...</a><br/></td></tr>
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<tr class="separator:gaf3d376ef4ebd49d0a194187b9e3fda25"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44ffb4c05d4f35ff83d120f0d4eadd10"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga44ffb4c05d4f35ff83d120f0d4eadd10">SDIF_Deinit</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:ga44ffb4c05d4f35ff83d120f0d4eadd10"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module deinit function. <a href="#ga44ffb4c05d4f35ff83d120f0d4eadd10">More...</a><br/></td></tr>
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<tr class="separator:ga44ffb4c05d4f35ff83d120f0d4eadd10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0520bc2d303de664527ca056d12b8dd7"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga0520bc2d303de664527ca056d12b8dd7">SDIF_SendCardActive</a> (SDIF_Type *base, uint32_t timeout)</td></tr>
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<tr class="memdesc:ga0520bc2d303de664527ca056d12b8dd7"><td class="mdescLeft"> </td><td class="mdescRight">SDIF send initialize 80 clocks for SD card after initial. <a href="#ga0520bc2d303de664527ca056d12b8dd7">More...</a><br/></td></tr>
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<tr class="separator:ga0520bc2d303de664527ca056d12b8dd7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga238fba84ef11ca7606a17024d46099d3"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga238fba84ef11ca7606a17024d46099d3">SDIF_EnableCardClock</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga238fba84ef11ca7606a17024d46099d3"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module enable/disable card0 clock. <a href="#ga238fba84ef11ca7606a17024d46099d3">More...</a><br/></td></tr>
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<tr class="separator:ga238fba84ef11ca7606a17024d46099d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaad2cd620457f49db24ff3c2fa5e9fe7b"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaad2cd620457f49db24ff3c2fa5e9fe7b">SDIF_EnableCard1Clock</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:gaad2cd620457f49db24ff3c2fa5e9fe7b"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module enable/disable card1 clock. <a href="#gaad2cd620457f49db24ff3c2fa5e9fe7b">More...</a><br/></td></tr>
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<tr class="separator:gaad2cd620457f49db24ff3c2fa5e9fe7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga731675f9cc243f93b5bee3f00f676fba"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga731675f9cc243f93b5bee3f00f676fba">SDIF_EnableLowPowerMode</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga731675f9cc243f93b5bee3f00f676fba"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module enable/disable module disable the card clock to enter low power mode when card is idle,for SDIF cards, if interrupts must be detected, clock should not be stopped. <a href="#ga731675f9cc243f93b5bee3f00f676fba">More...</a><br/></td></tr>
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<tr class="separator:ga731675f9cc243f93b5bee3f00f676fba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7654bb34219e1afac8cc578e9c7ae26f"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga7654bb34219e1afac8cc578e9c7ae26f">SDIF_EnableCard1LowPowerMode</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga7654bb34219e1afac8cc578e9c7ae26f"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module enable/disable module disable the card clock to enter low power mode when card is idle,for SDIF cards, if interrupts must be detected, clock should not be stopped. <a href="#ga7654bb34219e1afac8cc578e9c7ae26f">More...</a><br/></td></tr>
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<tr class="separator:ga7654bb34219e1afac8cc578e9c7ae26f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga29e9a4d679c626c3c09d701252d3944a"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga29e9a4d679c626c3c09d701252d3944a">SDIF_EnableCardPower</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga29e9a4d679c626c3c09d701252d3944a"><td class="mdescLeft"> </td><td class="mdescRight">enable/disable the card0 power. <a href="#ga29e9a4d679c626c3c09d701252d3944a">More...</a><br/></td></tr>
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<tr class="separator:ga29e9a4d679c626c3c09d701252d3944a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga098ad71c1441817c65ed65ea27a6fad4"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga098ad71c1441817c65ed65ea27a6fad4">SDIF_EnableCard1Power</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga098ad71c1441817c65ed65ea27a6fad4"><td class="mdescLeft"> </td><td class="mdescRight">enable/disable the card1 power. <a href="#ga098ad71c1441817c65ed65ea27a6fad4">More...</a><br/></td></tr>
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<tr class="separator:ga098ad71c1441817c65ed65ea27a6fad4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf28092607c443942a914aedfa6b6d78e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaf28092607c443942a914aedfa6b6d78e">SDIF_SetCardBusWidth</a> (SDIF_Type *base, <a class="el" href="a00050.html#gac37b3617968ac9f175b48d38d1de6a22">sdif_bus_width_t</a> type)</td></tr>
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<tr class="memdesc:gaf28092607c443942a914aedfa6b6d78e"><td class="mdescLeft"> </td><td class="mdescRight">set card0 data bus width <a href="#gaf28092607c443942a914aedfa6b6d78e">More...</a><br/></td></tr>
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<tr class="separator:gaf28092607c443942a914aedfa6b6d78e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab58c29ace9feac9bd262d90f3d71825c"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gab58c29ace9feac9bd262d90f3d71825c">SDIF_SetCard1BusWidth</a> (SDIF_Type *base, <a class="el" href="a00050.html#gac37b3617968ac9f175b48d38d1de6a22">sdif_bus_width_t</a> type)</td></tr>
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<tr class="memdesc:gab58c29ace9feac9bd262d90f3d71825c"><td class="mdescLeft"> </td><td class="mdescRight">set card1 data bus width <a href="#gab58c29ace9feac9bd262d90f3d71825c">More...</a><br/></td></tr>
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<tr class="separator:gab58c29ace9feac9bd262d90f3d71825c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab1e2eea6244cdc8f2438a3f0d2f09b3a"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gab1e2eea6244cdc8f2438a3f0d2f09b3a">SDIF_DetectCardInsert</a> (SDIF_Type *base, bool data3)</td></tr>
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<tr class="memdesc:gab1e2eea6244cdc8f2438a3f0d2f09b3a"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module detect card0 insert status function. <a href="#gab1e2eea6244cdc8f2438a3f0d2f09b3a">More...</a><br/></td></tr>
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<tr class="separator:gab1e2eea6244cdc8f2438a3f0d2f09b3a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaeca05343ef043a79c2209cd49a6e4673"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaeca05343ef043a79c2209cd49a6e4673">SDIF_DetectCard1Insert</a> (SDIF_Type *base, bool data3)</td></tr>
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<tr class="memdesc:gaeca05343ef043a79c2209cd49a6e4673"><td class="mdescLeft"> </td><td class="mdescRight">SDIF module detect card1 insert status function. <a href="#gaeca05343ef043a79c2209cd49a6e4673">More...</a><br/></td></tr>
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<tr class="separator:gaeca05343ef043a79c2209cd49a6e4673"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga052694c07f58b318c661ea18b3c1890a"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga052694c07f58b318c661ea18b3c1890a">SDIF_SetCardClock</a> (SDIF_Type *base, uint32_t srcClock_Hz, uint32_t target_HZ)</td></tr>
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<tr class="memdesc:ga052694c07f58b318c661ea18b3c1890a"><td class="mdescLeft"> </td><td class="mdescRight">Sets the card bus clock frequency. <a href="#ga052694c07f58b318c661ea18b3c1890a">More...</a><br/></td></tr>
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<tr class="separator:ga052694c07f58b318c661ea18b3c1890a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad53fbc5b77f2b99d11a085b22592ede0"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gad53fbc5b77f2b99d11a085b22592ede0">SDIF_Reset</a> (SDIF_Type *base, uint32_t mask, uint32_t timeout)</td></tr>
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<tr class="memdesc:gad53fbc5b77f2b99d11a085b22592ede0"><td class="mdescLeft"> </td><td class="mdescRight">reset the different block of the interface. <a href="#gad53fbc5b77f2b99d11a085b22592ede0">More...</a><br/></td></tr>
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<tr class="separator:gad53fbc5b77f2b99d11a085b22592ede0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabbad56ab4fcf4b10f63d37c78ca2ce9c"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gabbad56ab4fcf4b10f63d37c78ca2ce9c">SDIF_GetCardWriteProtect</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:gabbad56ab4fcf4b10f63d37c78ca2ce9c"><td class="mdescLeft"> </td><td class="mdescRight">get the card write protect status <a href="#gabbad56ab4fcf4b10f63d37c78ca2ce9c">More...</a><br/></td></tr>
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<tr class="separator:gabbad56ab4fcf4b10f63d37c78ca2ce9c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa64572819b17cb8ab2e0f9e4d1e58079"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaa64572819b17cb8ab2e0f9e4d1e58079">SDIF_AssertHardwareReset</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:gaa64572819b17cb8ab2e0f9e4d1e58079"><td class="mdescLeft"> </td><td class="mdescRight">toggle state on hardware reset PIN This is used which card has a reset PIN typically. <a href="#gaa64572819b17cb8ab2e0f9e4d1e58079">More...</a><br/></td></tr>
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<tr class="separator:gaa64572819b17cb8ab2e0f9e4d1e58079"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1871b7bc4a8845121e3e3c5ec71e9ff6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga1871b7bc4a8845121e3e3c5ec71e9ff6">SDIF_SendCommand</a> (SDIF_Type *base, <a class="el" href="a00050.html#gafdde0422895c51cdc357bd9f802eb1ce">sdif_command_t</a> *cmd, uint32_t timeout)</td></tr>
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<tr class="memdesc:ga1871b7bc4a8845121e3e3c5ec71e9ff6"><td class="mdescLeft"> </td><td class="mdescRight">send command to the card <a href="#ga1871b7bc4a8845121e3e3c5ec71e9ff6">More...</a><br/></td></tr>
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<tr class="separator:ga1871b7bc4a8845121e3e3c5ec71e9ff6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4df0d246442af9b0980059c413034ba0"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga4df0d246442af9b0980059c413034ba0">SDIF_EnableGlobalInterrupt</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga4df0d246442af9b0980059c413034ba0"><td class="mdescLeft"> </td><td class="mdescRight">SDIF enable/disable global interrupt. <a href="#ga4df0d246442af9b0980059c413034ba0">More...</a><br/></td></tr>
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<tr class="separator:ga4df0d246442af9b0980059c413034ba0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9f5e2107a7313f59ea9ee93826d1814e"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga9f5e2107a7313f59ea9ee93826d1814e">SDIF_EnableInterrupt</a> (SDIF_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga9f5e2107a7313f59ea9ee93826d1814e"><td class="mdescLeft"> </td><td class="mdescRight">SDIF enable interrupt. <a href="#ga9f5e2107a7313f59ea9ee93826d1814e">More...</a><br/></td></tr>
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<tr class="separator:ga9f5e2107a7313f59ea9ee93826d1814e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga82b9d1520698894b52b8e0fc7eb917db"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga82b9d1520698894b52b8e0fc7eb917db">SDIF_DisableInterrupt</a> (SDIF_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga82b9d1520698894b52b8e0fc7eb917db"><td class="mdescLeft"> </td><td class="mdescRight">SDIF disable interrupt. <a href="#ga82b9d1520698894b52b8e0fc7eb917db">More...</a><br/></td></tr>
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<tr class="separator:ga82b9d1520698894b52b8e0fc7eb917db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4d35b808d8b0ee949f1358b7807d8e29"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga4d35b808d8b0ee949f1358b7807d8e29">SDIF_GetInterruptStatus</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:ga4d35b808d8b0ee949f1358b7807d8e29"><td class="mdescLeft"> </td><td class="mdescRight">SDIF get interrupt status. <a href="#ga4d35b808d8b0ee949f1358b7807d8e29">More...</a><br/></td></tr>
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<tr class="separator:ga4d35b808d8b0ee949f1358b7807d8e29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac308946f04a061629cfbf4997aac2159"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gac308946f04a061629cfbf4997aac2159">SDIF_GetEnabledInterruptStatus</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:gac308946f04a061629cfbf4997aac2159"><td class="mdescLeft"> </td><td class="mdescRight">SDIF get enabled interrupt status. <a href="#gac308946f04a061629cfbf4997aac2159">More...</a><br/></td></tr>
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<tr class="separator:gac308946f04a061629cfbf4997aac2159"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga591a0ea1e778d01a4fcc45b2e5c8fade"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga591a0ea1e778d01a4fcc45b2e5c8fade">SDIF_ClearInterruptStatus</a> (SDIF_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga591a0ea1e778d01a4fcc45b2e5c8fade"><td class="mdescLeft"> </td><td class="mdescRight">SDIF clear interrupt status. <a href="#ga591a0ea1e778d01a4fcc45b2e5c8fade">More...</a><br/></td></tr>
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<tr class="separator:ga591a0ea1e778d01a4fcc45b2e5c8fade"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada2c95bc61cf25f0d49fc7daa09fe4a1"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gada2c95bc61cf25f0d49fc7daa09fe4a1">SDIF_TransferCreateHandle</a> (SDIF_Type *base, <a class="el" href="a00050.html#gaabd0af455c37e449cdd1cee065d04c73">sdif_handle_t</a> *handle, <a class="el" href="a00050.html#gaeffa26738150dee3d0af5b65608a057f">sdif_transfer_callback_t</a> *callback, void *userData)</td></tr>
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<tr class="memdesc:gada2c95bc61cf25f0d49fc7daa09fe4a1"><td class="mdescLeft"> </td><td class="mdescRight">Creates the SDIF handle. <a href="#gada2c95bc61cf25f0d49fc7daa09fe4a1">More...</a><br/></td></tr>
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<tr class="separator:gada2c95bc61cf25f0d49fc7daa09fe4a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga853b2efb18cbddb0544cd973c975107f"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga853b2efb18cbddb0544cd973c975107f">SDIF_EnableDmaInterrupt</a> (SDIF_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga853b2efb18cbddb0544cd973c975107f"><td class="mdescLeft"> </td><td class="mdescRight">SDIF enable DMA interrupt. <a href="#ga853b2efb18cbddb0544cd973c975107f">More...</a><br/></td></tr>
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<tr class="separator:ga853b2efb18cbddb0544cd973c975107f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gacc05b4f10da3d87c7b8d5e33fd21a0b2"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gacc05b4f10da3d87c7b8d5e33fd21a0b2">SDIF_DisableDmaInterrupt</a> (SDIF_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:gacc05b4f10da3d87c7b8d5e33fd21a0b2"><td class="mdescLeft"> </td><td class="mdescRight">SDIF disable DMA interrupt. <a href="#gacc05b4f10da3d87c7b8d5e33fd21a0b2">More...</a><br/></td></tr>
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<tr class="separator:gacc05b4f10da3d87c7b8d5e33fd21a0b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a02a30d2f6c5e4031ccba7bdbaf4ff2"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga3a02a30d2f6c5e4031ccba7bdbaf4ff2">SDIF_GetInternalDMAStatus</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:ga3a02a30d2f6c5e4031ccba7bdbaf4ff2"><td class="mdescLeft"> </td><td class="mdescRight">SDIF get internal DMA status. <a href="#ga3a02a30d2f6c5e4031ccba7bdbaf4ff2">More...</a><br/></td></tr>
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<tr class="separator:ga3a02a30d2f6c5e4031ccba7bdbaf4ff2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaba1e93be4f74c3707aab32751423025c"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaba1e93be4f74c3707aab32751423025c">SDIF_GetEnabledDMAInterruptStatus</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:gaba1e93be4f74c3707aab32751423025c"><td class="mdescLeft"> </td><td class="mdescRight">SDIF get enabled internal DMA interrupt status. <a href="#gaba1e93be4f74c3707aab32751423025c">More...</a><br/></td></tr>
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<tr class="separator:gaba1e93be4f74c3707aab32751423025c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9ecc4486134980e1bd0f88f8ad49bd6f"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga9ecc4486134980e1bd0f88f8ad49bd6f">SDIF_ClearInternalDMAStatus</a> (SDIF_Type *base, uint32_t mask)</td></tr>
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<tr class="memdesc:ga9ecc4486134980e1bd0f88f8ad49bd6f"><td class="mdescLeft"> </td><td class="mdescRight">SDIF clear internal DMA status. <a href="#ga9ecc4486134980e1bd0f88f8ad49bd6f">More...</a><br/></td></tr>
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<tr class="separator:ga9ecc4486134980e1bd0f88f8ad49bd6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gada1c8bc16d487ab726e71f621f8b48fe"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gada1c8bc16d487ab726e71f621f8b48fe">SDIF_InternalDMAConfig</a> (SDIF_Type *base, <a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> *config, const uint32_t *data, uint32_t dataSize)</td></tr>
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<tr class="memdesc:gada1c8bc16d487ab726e71f621f8b48fe"><td class="mdescLeft"> </td><td class="mdescRight">SDIF internal DMA config function. <a href="#gada1c8bc16d487ab726e71f621f8b48fe">More...</a><br/></td></tr>
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<tr class="separator:gada1c8bc16d487ab726e71f621f8b48fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga04289d3749cfbe9a895fb5572a6f8117"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga04289d3749cfbe9a895fb5572a6f8117">SDIF_EnableInternalDMA</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga04289d3749cfbe9a895fb5572a6f8117"><td class="mdescLeft"> </td><td class="mdescRight">SDIF internal DMA enable. <a href="#ga04289d3749cfbe9a895fb5572a6f8117">More...</a><br/></td></tr>
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<tr class="separator:ga04289d3749cfbe9a895fb5572a6f8117"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac7ed837df2405c44bcdb6d777581884f"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gac7ed837df2405c44bcdb6d777581884f">SDIF_SendReadWait</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:gac7ed837df2405c44bcdb6d777581884f"><td class="mdescLeft"> </td><td class="mdescRight">SDIF send read wait to SDIF card function. <a href="#gac7ed837df2405c44bcdb6d777581884f">More...</a><br/></td></tr>
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<tr class="separator:gac7ed837df2405c44bcdb6d777581884f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3b0acc99a40a2992041d8628b733027c"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga3b0acc99a40a2992041d8628b733027c">SDIF_AbortReadData</a> (SDIF_Type *base, uint32_t timeout)</td></tr>
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<tr class="memdesc:ga3b0acc99a40a2992041d8628b733027c"><td class="mdescLeft"> </td><td class="mdescRight">SDIF abort the read data when SDIF card is in suspend state Once assert this bit,data state machine will be reset which is waiting for the next blocking data,used in SDIO card suspend sequence,should call after suspend cmd send. <a href="#ga3b0acc99a40a2992041d8628b733027c">More...</a><br/></td></tr>
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<tr class="separator:ga3b0acc99a40a2992041d8628b733027c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e7e5df36b8ef27cf047dadfd7d96a14"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga1e7e5df36b8ef27cf047dadfd7d96a14">SDIF_EnableCEATAInterrupt</a> (SDIF_Type *base, bool enable)</td></tr>
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<tr class="memdesc:ga1e7e5df36b8ef27cf047dadfd7d96a14"><td class="mdescLeft"> </td><td class="mdescRight">SDIF enable/disable CE-ATA card interrupt this bit should set together with the card register. <a href="#ga1e7e5df36b8ef27cf047dadfd7d96a14">More...</a><br/></td></tr>
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<tr class="separator:ga1e7e5df36b8ef27cf047dadfd7d96a14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf37227d56a5b14d21b9d6d75566c6aac"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gaf37227d56a5b14d21b9d6d75566c6aac">SDIF_TransferNonBlocking</a> (SDIF_Type *base, <a class="el" href="a00050.html#gaabd0af455c37e449cdd1cee065d04c73">sdif_handle_t</a> *handle, <a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> *dmaConfig, <a class="el" href="a00050.html#gaa092db6631be91815d3659207c75e7dc">sdif_transfer_t</a> *transfer)</td></tr>
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<tr class="memdesc:gaf37227d56a5b14d21b9d6d75566c6aac"><td class="mdescLeft"> </td><td class="mdescRight">SDIF transfer function data/cmd in a non-blocking way this API should be use in interrupt mode, when use this API user must call SDIF_TransferCreateHandle first, all status check through interrupt. <a href="#gaf37227d56a5b14d21b9d6d75566c6aac">More...</a><br/></td></tr>
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<tr class="separator:gaf37227d56a5b14d21b9d6d75566c6aac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga864c001cda8f456e8fd9eecca2492c66"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga864c001cda8f456e8fd9eecca2492c66">SDIF_TransferBlocking</a> (SDIF_Type *base, <a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> *dmaConfig, <a class="el" href="a00050.html#gaa092db6631be91815d3659207c75e7dc">sdif_transfer_t</a> *transfer)</td></tr>
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<tr class="memdesc:ga864c001cda8f456e8fd9eecca2492c66"><td class="mdescLeft"> </td><td class="mdescRight">SDIF transfer function data/cmd in a blocking way. <a href="#ga864c001cda8f456e8fd9eecca2492c66">More...</a><br/></td></tr>
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<tr class="separator:ga864c001cda8f456e8fd9eecca2492c66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9a8a07fe13db8c3d090fc8c16f5116e0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga9a8a07fe13db8c3d090fc8c16f5116e0">SDIF_ReleaseDMADescriptor</a> (SDIF_Type *base, <a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> *dmaConfig)</td></tr>
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<tr class="memdesc:ga9a8a07fe13db8c3d090fc8c16f5116e0"><td class="mdescLeft"> </td><td class="mdescRight">SDIF release the DMA descriptor to DMA engine this function should be called when DMA descriptor unavailable status occurs. <a href="#ga9a8a07fe13db8c3d090fc8c16f5116e0">More...</a><br/></td></tr>
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<tr class="separator:ga9a8a07fe13db8c3d090fc8c16f5116e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7328c849a897a65bc5379a1e95a7669d"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga7328c849a897a65bc5379a1e95a7669d">SDIF_GetCapability</a> (SDIF_Type *base, <a class="el" href="a00050.html#ga9d783f07ed845d9b0fd2cdce1846443d">sdif_capability_t</a> *capability)</td></tr>
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<tr class="memdesc:ga7328c849a897a65bc5379a1e95a7669d"><td class="mdescLeft"> </td><td class="mdescRight">SDIF return the controller capability. <a href="#ga7328c849a897a65bc5379a1e95a7669d">More...</a><br/></td></tr>
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<tr class="separator:ga7328c849a897a65bc5379a1e95a7669d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga66ea0d4a73b9f4961437a5d9c9727bfa"><td class="memItemLeft" align="right" valign="top">static uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga66ea0d4a73b9f4961437a5d9c9727bfa">SDIF_GetControllerStatus</a> (SDIF_Type *base)</td></tr>
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<tr class="memdesc:ga66ea0d4a73b9f4961437a5d9c9727bfa"><td class="mdescLeft"> </td><td class="mdescRight">SDIF return the controller status. <a href="#ga66ea0d4a73b9f4961437a5d9c9727bfa">More...</a><br/></td></tr>
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<tr class="separator:ga66ea0d4a73b9f4961437a5d9c9727bfa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3f50e2a3a43c7f9fe7a95cc2a65c26d3"><td class="memItemLeft" align="right" valign="top">static void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga3f50e2a3a43c7f9fe7a95cc2a65c26d3">SDIF_SendCCSD</a> (SDIF_Type *base, bool withAutoStop)</td></tr>
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<tr class="memdesc:ga3f50e2a3a43c7f9fe7a95cc2a65c26d3"><td class="mdescLeft"> </td><td class="mdescRight">SDIF send command complete signal disable to CE-ATA card. <a href="#ga3f50e2a3a43c7f9fe7a95cc2a65c26d3">More...</a><br/></td></tr>
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<tr class="separator:ga3f50e2a3a43c7f9fe7a95cc2a65c26d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabb1f2a73fbc1a47f0f3d3f19f7179f62"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#gabb1f2a73fbc1a47f0f3d3f19f7179f62">SDIF_ConfigClockDelay</a> (uint32_t target_HZ, uint32_t divider)</td></tr>
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<tr class="memdesc:gabb1f2a73fbc1a47f0f3d3f19f7179f62"><td class="mdescLeft"> </td><td class="mdescRight">SDIF config the clock delay This function is used to config the cclk_in delay to sample and driver the data ,should meet the min setup time and hold time, and user need to config this parameter according to your board setting. <a href="#gabb1f2a73fbc1a47f0f3d3f19f7179f62">More...</a><br/></td></tr>
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<tr class="separator:gabb1f2a73fbc1a47f0f3d3f19f7179f62"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Driver version</h2></td></tr>
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<tr class="memitem:ga881d73082e5a2fb426c8fdd98d077e8e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ga881d73082e5a2fb426c8fdd98d077e8e">FSL_SDIF_DRIVER_VERSION</a>   (<a class="el" href="a00242.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2U, 1U, 0U))</td></tr>
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<tr class="memdesc:ga881d73082e5a2fb426c8fdd98d077e8e"><td class="mdescLeft"> </td><td class="mdescRight">Driver version 2.0.15. <a href="#ga881d73082e5a2fb426c8fdd98d077e8e">More...</a><br/></td></tr>
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</table>
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<hr/><h2 class="groupheader">Data Structure Documentation</h2>
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<a name="a00402" id="a00402"></a>
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<td class="memname">struct _sdif_dma_descriptor</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:ae3d7b028d0be86ea03091e51516af55e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae3d7b028d0be86ea03091e51516af55e"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ae3d7b028d0be86ea03091e51516af55e">dmaDesAttribute</a></td></tr>
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<tr class="memdesc:ae3d7b028d0be86ea03091e51516af55e"><td class="mdescLeft"> </td><td class="mdescRight">internal DMA attribute control and status <br/></td></tr>
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<tr class="memitem:aea49ada0485fe01fe1f812737c47d920"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aea49ada0485fe01fe1f812737c47d920"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aea49ada0485fe01fe1f812737c47d920">dmaDataBufferSize</a></td></tr>
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<tr class="memdesc:aea49ada0485fe01fe1f812737c47d920"><td class="mdescLeft"> </td><td class="mdescRight">internal DMA transfer buffer size control <br/></td></tr>
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<tr class="memitem:a58986cdd5f8dd8d65fb855bb0d368a1b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a58986cdd5f8dd8d65fb855bb0d368a1b"></a>
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const uint32_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a58986cdd5f8dd8d65fb855bb0d368a1b">dmaDataBufferAddr0</a></td></tr>
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<tr class="memdesc:a58986cdd5f8dd8d65fb855bb0d368a1b"><td class="mdescLeft"> </td><td class="mdescRight">internal DMA buffer 0 addr ,the buffer size must be 32bit aligned <br/></td></tr>
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<tr class="memitem:a6925dfeae66ced1c96d8faa00c404404"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6925dfeae66ced1c96d8faa00c404404"></a>
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const uint32_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a6925dfeae66ced1c96d8faa00c404404">dmaDataBufferAddr1</a></td></tr>
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<tr class="memdesc:a6925dfeae66ced1c96d8faa00c404404"><td class="mdescLeft"> </td><td class="mdescRight">internal DMA buffer 1 addr ,the buffer size must be 32bit aligned <br/></td></tr>
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</table>
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</div>
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<a name="a00401" id="a00401"></a>
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<td class="memname">struct _sdif_dma_config</td>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:ad92ecaa59fe9d4e91268840707fb23f4"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ad92ecaa59fe9d4e91268840707fb23f4">enableFixBurstLen</a></td></tr>
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<tr class="memdesc:ad92ecaa59fe9d4e91268840707fb23f4"><td class="mdescLeft"> </td><td class="mdescRight"><pre class="fragment">fix burst len enable/disable flag,When set, the AHB will
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</pre><p> use only SINGLE, INCR4, INCR8 or INCR16 during start of normal burst transfers. <a href="#ad92ecaa59fe9d4e91268840707fb23f4">More...</a><br/></td></tr>
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<tr class="separator:ad92ecaa59fe9d4e91268840707fb23f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7a7cd598cda894d0d865457bfb37e977"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a7a7cd598cda894d0d865457bfb37e977"></a>
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<a class="el" href="a00050.html#gaa2dd65df89da0ddf0071c1ad8c36fc9d">sdif_dma_mode_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a7a7cd598cda894d0d865457bfb37e977">mode</a></td></tr>
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<tr class="memdesc:a7a7cd598cda894d0d865457bfb37e977"><td class="mdescLeft"> </td><td class="mdescRight">define the DMA mode <br/></td></tr>
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<tr class="memitem:aeb58813e78ceb08d4300cdb170a07a73"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aeb58813e78ceb08d4300cdb170a07a73"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aeb58813e78ceb08d4300cdb170a07a73">dmaDesSkipLen</a></td></tr>
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<tr class="memdesc:aeb58813e78ceb08d4300cdb170a07a73"><td class="mdescLeft"> </td><td class="mdescRight">define the descriptor skip length ,the length between two descriptor this field is special for dual DMA mode <br/></td></tr>
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<tr class="memitem:a97d4b66e9e19f59c1d1a0c00ecc87c51"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a97d4b66e9e19f59c1d1a0c00ecc87c51"></a>
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uint32_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a97d4b66e9e19f59c1d1a0c00ecc87c51">dmaDesBufferStartAddr</a></td></tr>
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<tr class="memdesc:a97d4b66e9e19f59c1d1a0c00ecc87c51"><td class="mdescLeft"> </td><td class="mdescRight">internal DMA descriptor start address <br/></td></tr>
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<tr class="memitem:a08936303f91480fc91797bd14951595f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a08936303f91480fc91797bd14951595f"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a08936303f91480fc91797bd14951595f">dmaDesBufferLen</a></td></tr>
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<tr class="memdesc:a08936303f91480fc91797bd14951595f"><td class="mdescLeft"> </td><td class="mdescRight">internal DMA buffer descriptor buffer len ,user need to pay attention to the dma descriptor buffer length if it is bigger enough for your transfer <br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<td class="memname">bool _sdif_dma_config::enableFixBurstLen</td>
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<p>When reset, the AHB will use SINGLE and INCR burst transfer operations </p>
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<a name="a00400" id="a00400"></a>
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<td class="memname">struct _sdif_data</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a73dc9894c5f8fc1a823523eb57c80e77"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a73dc9894c5f8fc1a823523eb57c80e77"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a73dc9894c5f8fc1a823523eb57c80e77">streamTransfer</a></td></tr>
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<tr class="memdesc:a73dc9894c5f8fc1a823523eb57c80e77"><td class="mdescLeft"> </td><td class="mdescRight">indicate this is a stream data transfer command <br/></td></tr>
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<tr class="memitem:aa64eb9e736375227a9d0a4fd08a66d52"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aa64eb9e736375227a9d0a4fd08a66d52"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aa64eb9e736375227a9d0a4fd08a66d52">enableAutoCommand12</a></td></tr>
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<tr class="memdesc:aa64eb9e736375227a9d0a4fd08a66d52"><td class="mdescLeft"> </td><td class="mdescRight">indicate if auto stop will send when data transfer over <br/></td></tr>
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<tr class="separator:aa64eb9e736375227a9d0a4fd08a66d52"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9c155ea8f75cd0dbd0fb33895bcae4da"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9c155ea8f75cd0dbd0fb33895bcae4da"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a9c155ea8f75cd0dbd0fb33895bcae4da">enableIgnoreError</a></td></tr>
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<tr class="memdesc:a9c155ea8f75cd0dbd0fb33895bcae4da"><td class="mdescLeft"> </td><td class="mdescRight">indicate if enable ignore error when transfer data <br/></td></tr>
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<tr class="separator:a9c155ea8f75cd0dbd0fb33895bcae4da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a835e54bba30c5600e2e41a93c1251997"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a835e54bba30c5600e2e41a93c1251997"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a835e54bba30c5600e2e41a93c1251997">blockSize</a></td></tr>
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<tr class="memdesc:a835e54bba30c5600e2e41a93c1251997"><td class="mdescLeft"> </td><td class="mdescRight">Block size, take care when configure this parameter. <br/></td></tr>
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<tr class="separator:a835e54bba30c5600e2e41a93c1251997"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0cb1ccb8a9cb7266ee964fe8e5b8cc18"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0cb1ccb8a9cb7266ee964fe8e5b8cc18"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a0cb1ccb8a9cb7266ee964fe8e5b8cc18">blockCount</a></td></tr>
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<tr class="memdesc:a0cb1ccb8a9cb7266ee964fe8e5b8cc18"><td class="mdescLeft"> </td><td class="mdescRight">Block count. <br/></td></tr>
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<tr class="separator:a0cb1ccb8a9cb7266ee964fe8e5b8cc18"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5cd2d57ca61d279cd0634a21a181618f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5cd2d57ca61d279cd0634a21a181618f"></a>
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uint32_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a5cd2d57ca61d279cd0634a21a181618f">rxData</a></td></tr>
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<tr class="memdesc:a5cd2d57ca61d279cd0634a21a181618f"><td class="mdescLeft"> </td><td class="mdescRight">data buffer to receive <br/></td></tr>
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<tr class="separator:a5cd2d57ca61d279cd0634a21a181618f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aea30fdcfa95e2a9fb7162d5de5523ec0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aea30fdcfa95e2a9fb7162d5de5523ec0"></a>
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const uint32_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aea30fdcfa95e2a9fb7162d5de5523ec0">txData</a></td></tr>
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<tr class="memdesc:aea30fdcfa95e2a9fb7162d5de5523ec0"><td class="mdescLeft"> </td><td class="mdescRight">data buffer to transfer <br/></td></tr>
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<tr class="separator:aea30fdcfa95e2a9fb7162d5de5523ec0"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<a name="a00398" id="a00398"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">struct _sdif_command</td>
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</table>
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</div><div class="memdoc">
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<div class="textblock"><p>Define card command-related attribute. </p>
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</div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a8d29c720219757892f8f8c908266af24"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a8d29c720219757892f8f8c908266af24"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a8d29c720219757892f8f8c908266af24">index</a></td></tr>
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<tr class="memdesc:a8d29c720219757892f8f8c908266af24"><td class="mdescLeft"> </td><td class="mdescRight">Command index. <br/></td></tr>
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<tr class="separator:a8d29c720219757892f8f8c908266af24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5e28a39abd85cdd5abbb707836ed2e85"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5e28a39abd85cdd5abbb707836ed2e85"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a5e28a39abd85cdd5abbb707836ed2e85">argument</a></td></tr>
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<tr class="memdesc:a5e28a39abd85cdd5abbb707836ed2e85"><td class="mdescLeft"> </td><td class="mdescRight">Command argument. <br/></td></tr>
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<tr class="separator:a5e28a39abd85cdd5abbb707836ed2e85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acce44a46ba1315fb4ef70541aed2bb74"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="acce44a46ba1315fb4ef70541aed2bb74"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#acce44a46ba1315fb4ef70541aed2bb74">response</a> [4U]</td></tr>
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<tr class="memdesc:acce44a46ba1315fb4ef70541aed2bb74"><td class="mdescLeft"> </td><td class="mdescRight">Response for this command. <br/></td></tr>
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<tr class="separator:acce44a46ba1315fb4ef70541aed2bb74"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a33eecc657285a6b43027a8d4fcd86d0d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a33eecc657285a6b43027a8d4fcd86d0d"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a33eecc657285a6b43027a8d4fcd86d0d">type</a></td></tr>
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<tr class="memdesc:a33eecc657285a6b43027a8d4fcd86d0d"><td class="mdescLeft"> </td><td class="mdescRight">define the command type <br/></td></tr>
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<tr class="separator:a33eecc657285a6b43027a8d4fcd86d0d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5b52e23bd63544d25b299c161e8fbbc3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5b52e23bd63544d25b299c161e8fbbc3"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a5b52e23bd63544d25b299c161e8fbbc3">responseType</a></td></tr>
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<tr class="memdesc:a5b52e23bd63544d25b299c161e8fbbc3"><td class="mdescLeft"> </td><td class="mdescRight">Command response type. <br/></td></tr>
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<tr class="separator:a5b52e23bd63544d25b299c161e8fbbc3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac2f9233b4303b15c1d1d204b25c79f2f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac2f9233b4303b15c1d1d204b25c79f2f"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ac2f9233b4303b15c1d1d204b25c79f2f">flags</a></td></tr>
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<tr class="memdesc:ac2f9233b4303b15c1d1d204b25c79f2f"><td class="mdescLeft"> </td><td class="mdescRight">Cmd flags. <br/></td></tr>
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<tr class="separator:ac2f9233b4303b15c1d1d204b25c79f2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0791b9e8414daa7c0bc28bcf48af723f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0791b9e8414daa7c0bc28bcf48af723f"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a0791b9e8414daa7c0bc28bcf48af723f">responseErrorFlags</a></td></tr>
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<tr class="memdesc:a0791b9e8414daa7c0bc28bcf48af723f"><td class="mdescLeft"> </td><td class="mdescRight">response error flags, need to check the flags when receive the cmd response <br/></td></tr>
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<tr class="separator:a0791b9e8414daa7c0bc28bcf48af723f"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<a name="a00405" id="a00405"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">struct _sdif_transfer</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a31ce4178c19815209167d944a68ced86"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a31ce4178c19815209167d944a68ced86"></a>
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<a class="el" href="a00050.html#ga5867e5466af41cd4a9fb614e9fdd8943">sdif_data_t</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a31ce4178c19815209167d944a68ced86">data</a></td></tr>
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<tr class="memdesc:a31ce4178c19815209167d944a68ced86"><td class="mdescLeft"> </td><td class="mdescRight">Data to transfer. <br/></td></tr>
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<tr class="separator:a31ce4178c19815209167d944a68ced86"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab56d8fbca1ff1813f33365909a06cdfc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab56d8fbca1ff1813f33365909a06cdfc"></a>
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<a class="el" href="a00050.html#gafdde0422895c51cdc357bd9f802eb1ce">sdif_command_t</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ab56d8fbca1ff1813f33365909a06cdfc">command</a></td></tr>
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<tr class="memdesc:ab56d8fbca1ff1813f33365909a06cdfc"><td class="mdescLeft"> </td><td class="mdescRight">Command to send. <br/></td></tr>
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<tr class="separator:ab56d8fbca1ff1813f33365909a06cdfc"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<a name="a00399" id="a00399"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">struct _sdif_config</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a36806b11f47feaf25c049850488c15fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a36806b11f47feaf25c049850488c15fb"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a36806b11f47feaf25c049850488c15fb">responseTimeout</a></td></tr>
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<tr class="memdesc:a36806b11f47feaf25c049850488c15fb"><td class="mdescLeft"> </td><td class="mdescRight">command response timeout value <br/></td></tr>
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<tr class="separator:a36806b11f47feaf25c049850488c15fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1941f669a0c3eeb0e7ea831fe18c41e1"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a1941f669a0c3eeb0e7ea831fe18c41e1"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a1941f669a0c3eeb0e7ea831fe18c41e1">cardDetDebounce_Clock</a></td></tr>
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<tr class="memdesc:a1941f669a0c3eeb0e7ea831fe18c41e1"><td class="mdescLeft"> </td><td class="mdescRight">define the debounce clock count which will used in card detect logic,typical value is 5-25ms <br/></td></tr>
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<tr class="separator:a1941f669a0c3eeb0e7ea831fe18c41e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab75c659d0f4ca49cb6779b94b53acd39"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab75c659d0f4ca49cb6779b94b53acd39"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ab75c659d0f4ca49cb6779b94b53acd39">dataTimeout</a></td></tr>
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<tr class="memdesc:ab75c659d0f4ca49cb6779b94b53acd39"><td class="mdescLeft"> </td><td class="mdescRight">data timeout value <br/></td></tr>
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<tr class="separator:ab75c659d0f4ca49cb6779b94b53acd39"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<a name="a00397" id="a00397"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">struct _sdif_capability</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<div class="textblock"><p>Defines a structure to get the capability information of SDIF. </p>
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</div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:ac961e1b07b67a33aa8327bba6a4a57e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac961e1b07b67a33aa8327bba6a4a57e9"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ac961e1b07b67a33aa8327bba6a4a57e9">sdVersion</a></td></tr>
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<tr class="memdesc:ac961e1b07b67a33aa8327bba6a4a57e9"><td class="mdescLeft"> </td><td class="mdescRight">support SD card/sdio version <br/></td></tr>
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<tr class="separator:ac961e1b07b67a33aa8327bba6a4a57e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a06e3f6ce2d2aa2cd128ee249bd80f9ef"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a06e3f6ce2d2aa2cd128ee249bd80f9ef"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a06e3f6ce2d2aa2cd128ee249bd80f9ef">mmcVersion</a></td></tr>
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<tr class="memdesc:a06e3f6ce2d2aa2cd128ee249bd80f9ef"><td class="mdescLeft"> </td><td class="mdescRight">support emmc card version <br/></td></tr>
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<tr class="separator:a06e3f6ce2d2aa2cd128ee249bd80f9ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adca57564eb2ee458c38cae3b8dc8d322"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="adca57564eb2ee458c38cae3b8dc8d322"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#adca57564eb2ee458c38cae3b8dc8d322">maxBlockLength</a></td></tr>
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<tr class="memdesc:adca57564eb2ee458c38cae3b8dc8d322"><td class="mdescLeft"> </td><td class="mdescRight">Maximum block length united as byte. <br/></td></tr>
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<tr class="separator:adca57564eb2ee458c38cae3b8dc8d322"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab0eb9f6cb290868c8132b66f2df6031"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aab0eb9f6cb290868c8132b66f2df6031"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aab0eb9f6cb290868c8132b66f2df6031">maxBlockCount</a></td></tr>
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<tr class="memdesc:aab0eb9f6cb290868c8132b66f2df6031"><td class="mdescLeft"> </td><td class="mdescRight">Maximum byte count can be transfered. <br/></td></tr>
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<tr class="separator:aab0eb9f6cb290868c8132b66f2df6031"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a643777d2a3418f2d072cfbe0d131f109"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a643777d2a3418f2d072cfbe0d131f109"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a643777d2a3418f2d072cfbe0d131f109">flags</a></td></tr>
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<tr class="memdesc:a643777d2a3418f2d072cfbe0d131f109"><td class="mdescLeft"> </td><td class="mdescRight">Capability flags to indicate the support information. <br/></td></tr>
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<tr class="separator:a643777d2a3418f2d072cfbe0d131f109"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<a name="a00406" id="a00406"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<td class="memname">struct _sdif_transfer_callback</td>
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</table>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:ace0751a464185bf8990b9d6e2f0dfc3f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ace0751a464185bf8990b9d6e2f0dfc3f"></a>
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void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ace0751a464185bf8990b9d6e2f0dfc3f">cardInserted</a> )(SDIF_Type *base, void *userData)</td></tr>
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<tr class="memdesc:ace0751a464185bf8990b9d6e2f0dfc3f"><td class="mdescLeft"> </td><td class="mdescRight">card insert call back <br/></td></tr>
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<tr class="separator:ace0751a464185bf8990b9d6e2f0dfc3f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa52f7153322bd421091215426aabec8b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aa52f7153322bd421091215426aabec8b"></a>
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void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aa52f7153322bd421091215426aabec8b">cardRemoved</a> )(SDIF_Type *base, void *userData)</td></tr>
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<tr class="memdesc:aa52f7153322bd421091215426aabec8b"><td class="mdescLeft"> </td><td class="mdescRight">card remove call back <br/></td></tr>
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<tr class="separator:aa52f7153322bd421091215426aabec8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aec970b3c4982939c5f1362942193fbfb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aec970b3c4982939c5f1362942193fbfb"></a>
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void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aec970b3c4982939c5f1362942193fbfb">SDIOInterrupt</a> )(SDIF_Type *base, void *userData)</td></tr>
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<tr class="memdesc:aec970b3c4982939c5f1362942193fbfb"><td class="mdescLeft"> </td><td class="mdescRight">SDIO card interrupt occurs. <br/></td></tr>
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<tr class="separator:aec970b3c4982939c5f1362942193fbfb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad18a937f86f0699e32df76ab66632b07"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad18a937f86f0699e32df76ab66632b07"></a>
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void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ad18a937f86f0699e32df76ab66632b07">DMADesUnavailable</a> )(SDIF_Type *base, void *userData)</td></tr>
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<tr class="memdesc:ad18a937f86f0699e32df76ab66632b07"><td class="mdescLeft"> </td><td class="mdescRight">DMA descriptor unavailable. <br/></td></tr>
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<tr class="separator:ad18a937f86f0699e32df76ab66632b07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6548b7da5dfbb39133df936d9d64d295"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6548b7da5dfbb39133df936d9d64d295"></a>
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void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a6548b7da5dfbb39133df936d9d64d295">CommandReload</a> )(SDIF_Type *base, void *userData)</td></tr>
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<tr class="memdesc:a6548b7da5dfbb39133df936d9d64d295"><td class="mdescLeft"> </td><td class="mdescRight">command buffer full,need re-load <br/></td></tr>
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<tr class="separator:a6548b7da5dfbb39133df936d9d64d295"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a37507180746aaa996d272ff8990a06ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a37507180746aaa996d272ff8990a06ec"></a>
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void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a37507180746aaa996d272ff8990a06ec">TransferComplete</a> )(SDIF_Type *base, void *handle, <a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> status, void *userData)</td></tr>
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<tr class="memdesc:a37507180746aaa996d272ff8990a06ec"><td class="mdescLeft"> </td><td class="mdescRight">Transfer complete callback. <br/></td></tr>
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<tr class="separator:a37507180746aaa996d272ff8990a06ec"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<a name="a00403" id="a00403"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<td class="memname">struct _sdif_handle</td>
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</div><div class="memdoc">
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<div class="textblock"><p>Defines the structure to save the sdif state information and callback function. The detail interrupt status when send command or transfer data can be obtained from interruptFlags field by using mask defined in sdif_interrupt_flag_t; </p>
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<dl class="section note"><dt>Note</dt><dd>All the fields except interruptFlags and transferredWords must be allocated by the user. </dd></dl>
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</div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a4c263537577d71b2692acf466442cee5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4c263537577d71b2692acf466442cee5"></a>
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<a class="el" href="a00050.html#ga5867e5466af41cd4a9fb614e9fdd8943">sdif_data_t</a> *volatile </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a4c263537577d71b2692acf466442cee5">data</a></td></tr>
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<tr class="memdesc:a4c263537577d71b2692acf466442cee5"><td class="mdescLeft"> </td><td class="mdescRight">Data to transfer. <br/></td></tr>
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<tr class="separator:a4c263537577d71b2692acf466442cee5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad104ba479869aff004ee905dc33ba311"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad104ba479869aff004ee905dc33ba311"></a>
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<a class="el" href="a00050.html#gafdde0422895c51cdc357bd9f802eb1ce">sdif_command_t</a> *volatile </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#ad104ba479869aff004ee905dc33ba311">command</a></td></tr>
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<tr class="memdesc:ad104ba479869aff004ee905dc33ba311"><td class="mdescLeft"> </td><td class="mdescRight">Command to send. <br/></td></tr>
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<tr class="separator:ad104ba479869aff004ee905dc33ba311"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a70df09147d140d494f35d0c55732467f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a70df09147d140d494f35d0c55732467f"></a>
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volatile uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a70df09147d140d494f35d0c55732467f">transferredWords</a></td></tr>
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<tr class="memdesc:a70df09147d140d494f35d0c55732467f"><td class="mdescLeft"> </td><td class="mdescRight">Words transferred by polling way. <br/></td></tr>
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<tr class="separator:a70df09147d140d494f35d0c55732467f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a462127d9ac11b86e9f0a1b69b305036c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a462127d9ac11b86e9f0a1b69b305036c"></a>
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<a class="el" href="a00050.html#gaeffa26738150dee3d0af5b65608a057f">sdif_transfer_callback_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a462127d9ac11b86e9f0a1b69b305036c">callback</a></td></tr>
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<tr class="memdesc:a462127d9ac11b86e9f0a1b69b305036c"><td class="mdescLeft"> </td><td class="mdescRight">Callback function. <br/></td></tr>
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<tr class="separator:a462127d9ac11b86e9f0a1b69b305036c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a07aebf655e382d4d09d64270b281671b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a07aebf655e382d4d09d64270b281671b"></a>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a07aebf655e382d4d09d64270b281671b">userData</a></td></tr>
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<tr class="memdesc:a07aebf655e382d4d09d64270b281671b"><td class="mdescLeft"> </td><td class="mdescRight">Parameter for transfer complete callback. <br/></td></tr>
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<tr class="separator:a07aebf655e382d4d09d64270b281671b"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<a name="a00404" id="a00404"></a>
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<td class="memname">struct _sdif_host</td>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a7528078e517fc0e51904d4c4315f8614"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a7528078e517fc0e51904d4c4315f8614"></a>
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SDIF_Type * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a7528078e517fc0e51904d4c4315f8614">base</a></td></tr>
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<tr class="memdesc:a7528078e517fc0e51904d4c4315f8614"><td class="mdescLeft"> </td><td class="mdescRight">sdif peripheral base address <br/></td></tr>
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<tr class="separator:a7528078e517fc0e51904d4c4315f8614"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6e993b872b249fbb5e66618379bd68f2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6e993b872b249fbb5e66618379bd68f2"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a6e993b872b249fbb5e66618379bd68f2">sourceClock_Hz</a></td></tr>
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<tr class="memdesc:a6e993b872b249fbb5e66618379bd68f2"><td class="mdescLeft"> </td><td class="mdescRight">sdif source clock frequency united in Hz <br/></td></tr>
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<tr class="separator:a6e993b872b249fbb5e66618379bd68f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a849977bace51719ba74e55b6380ef8e9"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a849977bace51719ba74e55b6380ef8e9"></a>
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<a class="el" href="a00050.html#ga9c23bbca54bba64556f3392d9d085c60">sdif_config_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a849977bace51719ba74e55b6380ef8e9">config</a></td></tr>
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<tr class="memdesc:a849977bace51719ba74e55b6380ef8e9"><td class="mdescLeft"> </td><td class="mdescRight">sdif configuration <br/></td></tr>
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<tr class="separator:a849977bace51719ba74e55b6380ef8e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaac1a513b258a9c50896b26bd687de6b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aaac1a513b258a9c50896b26bd687de6b"></a>
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<a class="el" href="a00050.html#ga24f457e1fc3ee1d874b8174efd5d554b">sdif_transfer_function_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#aaac1a513b258a9c50896b26bd687de6b">transfer</a></td></tr>
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<tr class="memdesc:aaac1a513b258a9c50896b26bd687de6b"><td class="mdescLeft"> </td><td class="mdescRight">sdif transfer function <br/></td></tr>
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<tr class="separator:aaac1a513b258a9c50896b26bd687de6b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6db8d5eefe8a83d357cba0ef1f96e94b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6db8d5eefe8a83d357cba0ef1f96e94b"></a>
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<a class="el" href="a00050.html#ga9d783f07ed845d9b0fd2cdce1846443d">sdif_capability_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00050.html#a6db8d5eefe8a83d357cba0ef1f96e94b">capability</a></td></tr>
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<tr class="memdesc:a6db8d5eefe8a83d357cba0ef1f96e94b"><td class="mdescLeft"> </td><td class="mdescRight">sdif capability information <br/></td></tr>
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<tr class="separator:a6db8d5eefe8a83d357cba0ef1f96e94b"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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</div>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<a class="anchor" id="ga881d73082e5a2fb426c8fdd98d077e8e"></a>
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<td class="memname">#define FSL_SDIF_DRIVER_VERSION   (<a class="el" href="a00242.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2U, 1U, 0U))</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<a class="anchor" id="ga21e0ec02d52ccc6c1790785e0a1e4c15"></a>
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<td class="memname">#define SDIF_CLOCK_RANGE_NEED_DELAY   (50000000U)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Such as: response error/CRC error and so on</p>
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<p>clock range value which need to add delay to avoid timing issue </p>
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</div>
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</div>
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<a class="anchor" id="gac8d7da6e4ec1cee68577dce64f2d4e30"></a>
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<td class="memname">#define SDIF_HIGHSPEED_SAMPLE_DELAY   (12U)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>12 * 250ps = 3ns </p>
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</div>
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</div>
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<a class="anchor" id="ga8075c2549cb54cffef00d5cf382c3d3c"></a>
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<td class="memname">#define SDIF_HIGHSPEED_DRV_DELAY   (31U)</td>
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</table>
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</div><div class="memdoc">
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<p>31 * 250ps = 7.75ns </p>
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</div>
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</div>
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<a class="anchor" id="gae4f0b6438ebc1c7429ccfdfd043f5266"></a>
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<td class="memname">#define SDIF_DEFAULT_MODE_SAMPLE_DELAY   (12U)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>12 * 250ps = 3ns </p>
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</div>
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<h2 class="groupheader">Typedef Documentation</h2>
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<a class="anchor" id="gae6d0cda258bab3c5c069370756dffba7"></a>
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<td class="memname">typedef struct <a class="el" href="a00050.html#a00401">_sdif_dma_config</a> <a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a></td>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<a class="anchor" id="gafdde0422895c51cdc357bd9f802eb1ce"></a>
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<td class="memname">typedef struct <a class="el" href="a00050.html#a00398">_sdif_command</a> <a class="el" href="a00050.html#gafdde0422895c51cdc357bd9f802eb1ce">sdif_command_t</a></td>
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</div><div class="memdoc">
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<p>Define card command-related attribute. </p>
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<a class="anchor" id="ga9d783f07ed845d9b0fd2cdce1846443d"></a>
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<td class="memname">typedef struct <a class="el" href="a00050.html#a00397">_sdif_capability</a> <a class="el" href="a00050.html#ga9d783f07ed845d9b0fd2cdce1846443d">sdif_capability_t</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Defines a structure to get the capability information of SDIF. </p>
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<a class="anchor" id="gaeffa26738150dee3d0af5b65608a057f"></a>
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<td class="memname">typedef struct <a class="el" href="a00050.html#a00406">_sdif_transfer_callback</a> <a class="el" href="a00050.html#gaeffa26738150dee3d0af5b65608a057f">sdif_transfer_callback_t</a></td>
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</div><div class="memdoc">
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<a class="anchor" id="gaabd0af455c37e449cdd1cee065d04c73"></a>
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<td class="memname">typedef struct <a class="el" href="a00050.html#a00403">_sdif_handle</a> <a class="el" href="a00050.html#gaabd0af455c37e449cdd1cee065d04c73">sdif_handle_t</a></td>
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</div><div class="memdoc">
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<p>Defines the structure to save the sdif state information and callback function. The detail interrupt status when send command or transfer data can be obtained from interruptFlags field by using mask defined in sdif_interrupt_flag_t; </p>
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<dl class="section note"><dt>Note</dt><dd>All the fields except interruptFlags and transferredWords must be allocated by the user. </dd></dl>
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<td class="memname">typedef <a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a>(* sdif_transfer_function_t)(SDIF_Type *base, <a class="el" href="a00050.html#gaa092db6631be91815d3659207c75e7dc">sdif_transfer_t</a> *content)</td>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<a class="anchor" id="ga94798fdadfbf49a7c658ace669a1d310"></a>
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<td class="memname">anonymous enum</td>
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310affb9182360cf683b9b56bb7d6137f1fa"></a>kStatus_SDIF_DescriptorBufferLenError</em> </td><td class="fielddoc">
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<p>Set DMA descriptor failed. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310a14433840ce27b3e4f9e93adc7bd0ff96"></a>kStatus_SDIF_InvalidArgument</em> </td><td class="fielddoc">
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<p>invalid argument status </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310a768343b1047ef305d1f6d4890dc2f6e8"></a>kStatus_SDIF_SyncCmdTimeout</em> </td><td class="fielddoc">
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<p>sync command to CIU timeout status </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310ada6e65b3f5e6bb69c529d8521893077a"></a>kStatus_SDIF_SendCmdFail</em> </td><td class="fielddoc">
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<p>send command to card fail </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310aa949a8ea4ebdf057c3302c2691f9e1a7"></a>kStatus_SDIF_SendCmdErrorBufferFull</em> </td><td class="fielddoc">
|
|
<p>send command to card fail, due to command buffer full user need to resend this command </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310a66bfe56d1576b4a8c2b0e9918798b536"></a>kStatus_SDIF_DMATransferFailWithFBE</em> </td><td class="fielddoc">
|
|
<p>DMA transfer data fail with fatal bus error , to do with this error :issue a hard reset/controller reset. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310a8fc19c221f2d75afed23dd787ab9f3df"></a>kStatus_SDIF_DMATransferDescriptorUnavailable</em> </td><td class="fielddoc">
|
|
<p>DMA descriptor unavailable. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310ad109309cb0d032eaeab7aff5aed50643"></a>kStatus_SDIF_DataTransferFail</em> </td><td class="fielddoc">
|
|
<p>transfer data fail </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310a5ea0e44c0cae54e6d6522869f38c57aa"></a>kStatus_SDIF_ResponseError</em> </td><td class="fielddoc">
|
|
<p>response error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310add0613dcab7dc57b9fc808a7244c80b8"></a>kStatus_SDIF_DMAAddrNotAlign</em> </td><td class="fielddoc">
|
|
<p>DMA address not align. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310acf576c022cbc7f0f8c5b3a7d41982800"></a>kStatus_SDIF_BusyTransferring</em> </td><td class="fielddoc">
|
|
<p>SDIF transfer busy status. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310ae4b2a2b0998dcdf940fa2bc5aecf217e"></a>kStatus_SDIF_DataTransferSuccess</em> </td><td class="fielddoc">
|
|
<p>transfer data success </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga94798fdadfbf49a7c658ace669a1d310a0938352eb53bfa49dd714852cb5973f8"></a>kStatus_SDIF_SendCmdSuccess</em> </td><td class="fielddoc">
|
|
<p>transfer command success </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gae4d5251432e1a9e6803c0240cc492e18"></a>
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|
<div class="memitem">
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|
<div class="memproto">
|
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<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggae4d5251432e1a9e6803c0240cc492e18a37d71dded0a8486f1903bf9d388d0f19"></a>kSDIF_SupportHighSpeedFlag</em> </td><td class="fielddoc">
|
|
<p>Support high-speed. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggae4d5251432e1a9e6803c0240cc492e18a5e195eba807f307e481e5e650eb3aed7"></a>kSDIF_SupportDmaFlag</em> </td><td class="fielddoc">
|
|
<p>Support DMA. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggae4d5251432e1a9e6803c0240cc492e18a8d919e7879aa3cb1dd653233ca804d8f"></a>kSDIF_SupportSuspendResumeFlag</em> </td><td class="fielddoc">
|
|
<p>Support suspend/resume. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggae4d5251432e1a9e6803c0240cc492e18a7f35069105bd14ef049563536cb26ebb"></a>kSDIF_SupportV330Flag</em> </td><td class="fielddoc">
|
|
<p>Support voltage 3.3V. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggae4d5251432e1a9e6803c0240cc492e18a85bd0f974c1db6fbb3e9ff905c5ced33"></a>kSDIF_Support4BitFlag</em> </td><td class="fielddoc">
|
|
<p>Support 4 bit mode. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggae4d5251432e1a9e6803c0240cc492e18ac3e1e0c96d0a6d6a3fdf004d3306bae4"></a>kSDIF_Support8BitFlag</em> </td><td class="fielddoc">
|
|
<p>Support 8 bit mode. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga7ff5f2dff38e7639981794c43dc9167b"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga7ff5f2dff38e7639981794c43dc9167baef40cc6fcf0a97b4b2fd2c75f88bc779"></a>kSDIF_ResetController</em> </td><td class="fielddoc">
|
|
<p>reset controller,will reset: BIU/CIU interface CIU and state machine,ABORT_READ_DATA,SEND_IRQ_RESPONSE and READ_WAIT bits of control register,START_CMD bit of the command register </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga7ff5f2dff38e7639981794c43dc9167bac0fb2455d783502198e25620759737e6"></a>kSDIF_ResetFIFO</em> </td><td class="fielddoc">
|
|
<p>reset data FIFO </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga7ff5f2dff38e7639981794c43dc9167ba9200d7f30ecc3222473158089913bd3a"></a>kSDIF_ResetDMAInterface</em> </td><td class="fielddoc">
|
|
<p>reset DMA interface </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga7ff5f2dff38e7639981794c43dc9167ba1e49461e4d4843585850d067d207d582"></a>kSDIF_ResetAll</em> </td><td class="fielddoc">
|
|
<p>reset all </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga072babb2a973c08a492c7ce298ba5434"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">enum <a class="el" href="a00050.html#ga072babb2a973c08a492c7ce298ba5434">_sdif_bus_width</a></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga072babb2a973c08a492c7ce298ba5434ab7d8da1ba7af8502355e546b5f086ed2"></a>kSDIF_Bus1BitWidth</em> </td><td class="fielddoc">
|
|
<p>1bit bus width, 1bit mode and 4bit mode share one register bit </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga072babb2a973c08a492c7ce298ba5434a1baf3ad61dd63b12c5d89df87ae58fea"></a>kSDIF_Bus4BitWidth</em> </td><td class="fielddoc">
|
|
<p>4bit mode mask </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga072babb2a973c08a492c7ce298ba5434af919b8fe0e8e5531cb62ad00a7135d6b"></a>kSDIF_Bus8BitWidth</em> </td><td class="fielddoc">
|
|
<p>support 8 bit mode </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaabfcbcb5ac86a1edac4035264bc7d2b8"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a69b983ebdb8a3e9417e1448d9e257772"></a>kSDIF_CmdResponseExpect</em> </td><td class="fielddoc">
|
|
<p>command request response </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a7881b17a0812647bf1211bd6c2ecbacd"></a>kSDIF_CmdResponseLengthLong</em> </td><td class="fielddoc">
|
|
<p>command response length long </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a60b2fc9d9d799ce1a402feb88ad1d0f7"></a>kSDIF_CmdCheckResponseCRC</em> </td><td class="fielddoc">
|
|
<p>request check command response CRC </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8afaca694830ba3659fc5f4ab0c54727ce"></a>kSDIF_DataExpect</em> </td><td class="fielddoc">
|
|
<p>request data transfer,either read/write </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a1d8afe6680f1803f334c6242595636ac"></a>kSDIF_DataWriteToCard</em> </td><td class="fielddoc">
|
|
<p>data transfer direction </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8ae63bc8f0de5089a3f50fcd881f42b222"></a>kSDIF_DataStreamTransfer</em> </td><td class="fielddoc">
|
|
<p>data transfer mode :stream/block transfer command </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a7b124728d0045868bd9ee09da3cdab07"></a>kSDIF_DataTransferAutoStop</em> </td><td class="fielddoc">
|
|
<p>data transfer with auto stop at the end of </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8afec895df86c912894df96ed10958a521"></a>kSDIF_WaitPreTransferComplete</em> </td><td class="fielddoc">
|
|
<p>wait pre transfer complete before sending this cmd </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a94065d24edd9a7668a66dc9bd591950a"></a>kSDIF_TransferStopAbort</em> </td><td class="fielddoc">
|
|
<p>when host issue stop or abort cmd to stop data transfer ,this bit should set so that cmd/data state-machines of CIU can return to idle correctly </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a9fb7d6c27a3fcd251d4fe32ec4840480"></a>kSDIF_SendInitialization</em> </td><td class="fielddoc">
|
|
<p>send initialization 80 clocks for SD card after power on </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8aa4c4bf9a08b7e29d4847753f9b16ad17"></a>kSDIF_CmdUpdateClockRegisterOnly</em> </td><td class="fielddoc">
|
|
<p>send cmd update the CIU clock register only </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a093f1056ae474c3e6c0fbc50794b4cdf"></a>kSDIF_CmdtoReadCEATADevice</em> </td><td class="fielddoc">
|
|
<p>host is perform read access to CE-ATA device </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a1565e1a4e13a968d157f9262381bb5c7"></a>kSDIF_CmdExpectCCS</em> </td><td class="fielddoc">
|
|
<p>command expect command completion signal signal </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8ae80eb10284249894dce0ab1858fe733f"></a>kSDIF_BootModeEnable</em> </td><td class="fielddoc">
|
|
<p>this bit should only be set for mandatory boot mode </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8ae82a77a4612cab23fd02d796dd92e319"></a>kSDIF_BootModeExpectAck</em> </td><td class="fielddoc">
|
|
<p>boot mode expect ack </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8ad7f0a31bd66b1494e9c0bf2859f1628d"></a>kSDIF_BootModeDisable</em> </td><td class="fielddoc">
|
|
<p>when software set this bit along with START_CMD, CIU terminates the boot operation </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8ae06160be54c46c5f69e9c0eedf381270"></a>kSDIF_BootModeAlternate</em> </td><td class="fielddoc">
|
|
<p>select boot mode ,alternate or mandatory </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a33079fbf59cf33517c65161da234bade"></a>kSDIF_CmdVoltageSwitch</em> </td><td class="fielddoc">
|
|
<p>this bit set for CMD11 only </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaabfcbcb5ac86a1edac4035264bc7d2b8a6b5255fe7e86c08e16ce8d007910fe59"></a>kSDIF_CmdDataUseHoldReg</em> </td><td class="fielddoc">
|
|
<p>cmd and data send to card through the HOLD register </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga5d76b81b0ad4c19007a781d4edb8181f"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga5d76b81b0ad4c19007a781d4edb8181fae24ab83bd6c0959918366bee522417f9"></a>kCARD_CommandTypeNormal</em> </td><td class="fielddoc">
|
|
<p>Normal command. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga5d76b81b0ad4c19007a781d4edb8181fa635a0b0c8ce3312236ca7a2d1ce159f5"></a>kCARD_CommandTypeSuspend</em> </td><td class="fielddoc">
|
|
<p>Suspend command. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga5d76b81b0ad4c19007a781d4edb8181fa5c6154a2bf09464d521d21c874fc76a7"></a>kCARD_CommandTypeResume</em> </td><td class="fielddoc">
|
|
<p>Resume command. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga5d76b81b0ad4c19007a781d4edb8181faa3909c9f96f6ec9fa625efe84ecfb5c9"></a>kCARD_CommandTypeAbort</em> </td><td class="fielddoc">
|
|
<p>Abort command. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaac34dfe6c6b73b43a4656c9dce041034"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>Define the command response type from card to host controller. </p>
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034a5d49d4b2f8a98053ee48d5012acf9ed2"></a>kCARD_ResponseTypeNone</em> </td><td class="fielddoc">
|
|
<p>Response type: none. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034a74964391f7a0126c628c74baeafa518b"></a>kCARD_ResponseTypeR1</em> </td><td class="fielddoc">
|
|
<p>Response type: R1. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034a7e8a8155761b6f1511f498ce53e07ccf"></a>kCARD_ResponseTypeR1b</em> </td><td class="fielddoc">
|
|
<p>Response type: R1b. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034ac4895a8c8ba120c3732db68b89f96953"></a>kCARD_ResponseTypeR2</em> </td><td class="fielddoc">
|
|
<p>Response type: R2. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034ad1f920acb2d8a5a28bff976cae7aff46"></a>kCARD_ResponseTypeR3</em> </td><td class="fielddoc">
|
|
<p>Response type: R3. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034a8298df9537021d76ecfe0a026c4c3fdd"></a>kCARD_ResponseTypeR4</em> </td><td class="fielddoc">
|
|
<p>Response type: R4. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034a9c1b4e62f3f81d7d23ec127c3a4a213f"></a>kCARD_ResponseTypeR5</em> </td><td class="fielddoc">
|
|
<p>Response type: R5. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034ae08443bb563fccdaba2fc81737292fb1"></a>kCARD_ResponseTypeR5b</em> </td><td class="fielddoc">
|
|
<p>Response type: R5b. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034a1a659f655dbc1e029fd601f496e81bb5"></a>kCARD_ResponseTypeR6</em> </td><td class="fielddoc">
|
|
<p>Response type: R6. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="ggaac34dfe6c6b73b43a4656c9dce041034a3e8c6d2dc60235e4134e3a46789bebd1"></a>kCARD_ResponseTypeR7</em> </td><td class="fielddoc">
|
|
<p>Response type: R7. </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
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</div>
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<a class="anchor" id="ga0ed680fdb405e7195d9f14032851eebb"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">anonymous enum</td>
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</tr>
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</table>
|
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</div><div class="memdoc">
|
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<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba160a4abad8284aacf4126987ee59324d"></a>kSDIF_CardDetect</em> </td><td class="fielddoc">
|
|
<p>mask for card detect </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba6a8baea81c15a887cee8d76593721754"></a>kSDIF_ResponseError</em> </td><td class="fielddoc">
|
|
<p>command response error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba7aab46ff287bade786f734825bf19e6a"></a>kSDIF_CommandDone</em> </td><td class="fielddoc">
|
|
<p>command transfer over </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebbab0a446850d226e415aaf9f76672e87e4"></a>kSDIF_DataTransferOver</em> </td><td class="fielddoc">
|
|
<p>data transfer over flag </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba0ed53d5087e02de21a39b0952fa43a9f"></a>kSDIF_WriteFIFORequest</em> </td><td class="fielddoc">
|
|
<p>write FIFO request </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebbaaa8b0faf4e56e6f8b4aeb00124fb6cf4"></a>kSDIF_ReadFIFORequest</em> </td><td class="fielddoc">
|
|
<p>read FIFO request </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba67f0464831371026d510e171008bbb18"></a>kSDIF_ResponseCRCError</em> </td><td class="fielddoc">
|
|
<p>response CRC error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebbac487eb08c6910e398eb303b75bcd29a0"></a>kSDIF_DataCRCError</em> </td><td class="fielddoc">
|
|
<p>data CRC error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba619f95afb5a0dddf955517eff94b3939"></a>kSDIF_ResponseTimeout</em> </td><td class="fielddoc">
|
|
<p>response timeout </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebbaa323878dfaffad951258dda2357f2e68"></a>kSDIF_DataReadTimeout</em> </td><td class="fielddoc">
|
|
<p>read data timeout </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebbafad89a62d07fba9b26fe6ab7ddba2bf3"></a>kSDIF_DataStarvationByHostTimeout</em> </td><td class="fielddoc">
|
|
<p>data starvation by host time out </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba397e10660d40bb20969df3b7699db4f2"></a>kSDIF_FIFOError</em> </td><td class="fielddoc">
|
|
<p>indicate the FIFO under run or overrun error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba761428cb616af48531af3f857d9e0be5"></a>kSDIF_HardwareLockError</em> </td><td class="fielddoc">
|
|
<p>hardware lock write error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba291b8c9bbb1d9e989545d6d61af08117"></a>kSDIF_DataStartBitError</em> </td><td class="fielddoc">
|
|
<p>start bit error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebbaa52598ea2150e99c45c7b9924ad4fd94"></a>kSDIF_AutoCmdDone</em> </td><td class="fielddoc">
|
|
<p>indicate the auto command done </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba2bac7769b6e2c2290630a9fef6f6d7c8"></a>kSDIF_DataEndBitError</em> </td><td class="fielddoc">
|
|
<p>end bit error </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba0b9a6053102bd4b4b35df1442223281d"></a>kSDIF_SDIOInterrupt</em> </td><td class="fielddoc">
|
|
<p>interrupt from the SDIO card </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba0ca5490df2a1d065d7ad41f576163104"></a>kSDIF_CommandTransferStatus</em> </td><td class="fielddoc">
|
|
<p>command transfer status collection </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba052aab1aca6b295d572adc9cb61f7561"></a>kSDIF_DataTransferStatus</em> </td><td class="fielddoc">
|
|
<p>data transfer status collection </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0ed680fdb405e7195d9f14032851eebba2bdef2ae7a84e31cd7ad50ec3f24b04b"></a>kSDIF_AllInterruptStatus</em> </td><td class="fielddoc">
|
|
<p>all interrupt mask </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga0944a4353780132eeab7b06e3e42291d"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
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</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga0944a4353780132eeab7b06e3e42291dac0d13081e45441059e860a377129398a"></a>kSDIF_DMATransFinishOneDescriptor</em> </td><td class="fielddoc">
|
|
<p>DMA transfer finished for one DMA descriptor. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0944a4353780132eeab7b06e3e42291daad0130645ec9d3b61d4aa370b22dd69d"></a>kSDIF_DMARecvFinishOneDescriptor</em> </td><td class="fielddoc">
|
|
<p>DMA receive finished for one DMA descriptor. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0944a4353780132eeab7b06e3e42291daa622d870a3753fd81ddeb07d52b9472c"></a>kSDIF_DMAFatalBusError</em> </td><td class="fielddoc">
|
|
<p>DMA fatal bus error. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0944a4353780132eeab7b06e3e42291dacde9409865d8c3541694543672f7398e"></a>kSDIF_DMADescriptorUnavailable</em> </td><td class="fielddoc">
|
|
<p>DMA descriptor unavailable. </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0944a4353780132eeab7b06e3e42291da8851cf5387f9071b392fc50faf9fbd90"></a>kSDIF_DMACardErrorSummary</em> </td><td class="fielddoc">
|
|
<p>card error summary </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0944a4353780132eeab7b06e3e42291da844f5f23ed367ff3959d529c03c545a4"></a>kSDIF_NormalInterruptSummary</em> </td><td class="fielddoc">
|
|
<p>normal interrupt summary </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga0944a4353780132eeab7b06e3e42291da2f91f26a38f52241a995d2bd90bd8ac2"></a>kSDIF_AbnormalInterruptSummary</em> </td><td class="fielddoc">
|
|
<p>abnormal interrupt summary </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga4790f45dcc812c1b00184a2edccdddf5"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">anonymous enum</td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="deprecated"><dt><b>Deprecated:</b></dt><dd>Do not use this enum anymore, please use SDIF_DMA_DESCRIPTOR_XXX_FLAG instead. </dd></dl>
|
|
<table class="fieldtable">
|
|
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga4790f45dcc812c1b00184a2edccdddf5a1c2af2525d1f81757b7da07eda13df16"></a>kSDIF_DisableCompleteInterrupt</em> </td><td class="fielddoc">
|
|
<p>disable the complete interrupt flag for the ends in the buffer pointed to by this descriptor </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga4790f45dcc812c1b00184a2edccdddf5a35d7873e7234b6f6a8dd60f83d6a1576"></a>kSDIF_DMADescriptorDataBufferEnd</em> </td><td class="fielddoc">
|
|
<p>indicate this descriptor contain the last data buffer of data </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga4790f45dcc812c1b00184a2edccdddf5aa98e2d5b42b28b1c4bebe29ceb48b041"></a>kSDIF_DMADescriptorDataBufferStart</em> </td><td class="fielddoc">
|
|
<p>indicate this descriptor contain the first data buffer of data,if first buffer size is 0,next descriptor contain the begin of the data </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga4790f45dcc812c1b00184a2edccdddf5a69a7866e867cc6b241fdabac6941f559"></a>kSDIF_DMASecondAddrChained</em> </td><td class="fielddoc">
|
|
<p>indicate that the second addr in the descriptor is the next descriptor addr not the data buffer </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga4790f45dcc812c1b00184a2edccdddf5ade67ea0cc618f38d8a6c0e6a87995994"></a>kSDIF_DMADescriptorEnd</em> </td><td class="fielddoc">
|
|
<p>indicate that the descriptor list reached its final descriptor </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga4790f45dcc812c1b00184a2edccdddf5a1e1368354275b6dd092bc91a1cec781d"></a>kSDIF_DMADescriptorOwnByDMA</em> </td><td class="fielddoc">
|
|
<p>indicate the descriptor is own by SD/MMC DMA </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
|
</div>
|
|
<h2 class="groupheader">Function Documentation</h2>
|
|
<a class="anchor" id="gaf3d376ef4ebd49d0a194187b9e3fda25"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">void SDIF_Init </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#ga9c23bbca54bba64556f3392d9d085c60">sdif_config_t</a> * </td>
|
|
<td class="paramname"><em>config</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>Configures the SDIF according to the user configuration. </p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">config</td><td>SDIF configuration information. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
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<a class="anchor" id="ga44ffb4c05d4f35ff83d120f0d4eadd10"></a>
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<tr>
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<td class="memname">void SDIF_Deinit </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<p>user should call this function follow with IP reset </p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
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<a class="anchor" id="ga0520bc2d303de664527ca056d12b8dd7"></a>
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">bool SDIF_SendCardActive </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>timeout</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">timeout</td><td>timeout value </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga238fba84ef11ca7606a17024d46099d3"></a>
|
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
|
|
<td class="mlabels-left">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">static void SDIF_EnableCardClock </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>enable</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaad2cd620457f49db24ff3c2fa5e9fe7b"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="mlabels">
|
|
<tr>
|
|
<td class="mlabels-left">
|
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<table class="memname">
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<tr>
|
|
<td class="memname">static void SDIF_EnableCard1Clock </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>enable</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
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<a class="anchor" id="ga731675f9cc243f93b5bee3f00f676fba"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
|
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<td class="mlabels-left">
|
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<table class="memname">
|
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<tr>
|
|
<td class="memname">static void SDIF_EnableLowPowerMode </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
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</tr>
|
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
|
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<td class="paramtype">bool </td>
|
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<td class="paramname"><em>enable</em> </td>
|
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga7654bb34219e1afac8cc578e9c7ae26f"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
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<td class="mlabels-left">
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<tr>
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<td class="memname">static void SDIF_EnableCard1LowPowerMode </td>
|
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<td>(</td>
|
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<td class="paramtype">SDIF_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>enable</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga29e9a4d679c626c3c09d701252d3944a"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static void SDIF_EnableCardPower </td>
|
|
<td>(</td>
|
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<td class="paramtype">SDIF_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
|
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<td class="paramtype">bool </td>
|
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<td class="paramname"><em>enable</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>once turn power on, software should wait for regulator/switch ramp-up time before trying to initialize card. </p>
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>enable/disable flag. </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga098ad71c1441817c65ed65ea27a6fad4"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
|
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<td class="memname">static void SDIF_EnableCard1Power </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>enable</em> </td>
|
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</tr>
|
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<tr>
|
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<td></td>
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<td>)</td>
|
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<td></td><td></td>
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</tr>
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</table>
|
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</td>
|
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
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</table>
|
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</div><div class="memdoc">
|
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<p>once turn power on, software should wait for regulator/switch ramp-up time before trying to initialize card. </p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>enable/disable flag. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
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|
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</div>
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</div>
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<a class="anchor" id="gaf28092607c443942a914aedfa6b6d78e"></a>
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<div class="memitem">
|
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">void SDIF_SetCardBusWidth </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gac37b3617968ac9f175b48d38d1de6a22">sdif_bus_width_t</a> </td>
|
|
<td class="paramname"><em>type</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">type</td><td>data bus width type </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
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</div>
|
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</div>
|
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<a class="anchor" id="gab58c29ace9feac9bd262d90f3d71825c"></a>
|
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<div class="memitem">
|
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<div class="memproto">
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<table class="memname">
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<tr>
|
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<td class="memname">void SDIF_SetCard1BusWidth </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gac37b3617968ac9f175b48d38d1de6a22">sdif_bus_width_t</a> </td>
|
|
<td class="paramname"><em>type</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">type</td><td>data bus width type </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gab1e2eea6244cdc8f2438a3f0d2f09b3a"></a>
|
|
<div class="memitem">
|
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<div class="memproto">
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<table class="mlabels">
|
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<tr>
|
|
<td class="mlabels-left">
|
|
<table class="memname">
|
|
<tr>
|
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<td class="memname">static uint32_t SDIF_DetectCardInsert </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>data3</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">data3</td><td>indicate use data3 as card insert detect pin </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">1</td><td>card is inserted 0 card is removed </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaeca05343ef043a79c2209cd49a6e4673"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="mlabels">
|
|
<tr>
|
|
<td class="mlabels-left">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">static uint32_t SDIF_DetectCard1Insert </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>data3</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">data3</td><td>indicate use data3 as card insert detect pin </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="retval"><dt>Return values</dt><dd>
|
|
<table class="retval">
|
|
<tr><td class="paramname">1</td><td>card is inserted 0 card is removed </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
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<a class="anchor" id="ga052694c07f58b318c661ea18b3c1890a"></a>
|
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<div class="memitem">
|
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<div class="memproto">
|
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<table class="memname">
|
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<tr>
|
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<td class="memname">uint32_t SDIF_SetCardClock </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>srcClock_Hz</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>target_HZ</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">srcClock_Hz</td><td>SDIF source clock frequency united in Hz. </td></tr>
|
|
<tr><td class="paramname">target_HZ</td><td>card bus clock frequency united in Hz. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>The nearest frequency of busClock_Hz configured to SD bus. </dd></dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gad53fbc5b77f2b99d11a085b22592ede0"></a>
|
|
<div class="memitem">
|
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<div class="memproto">
|
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<table class="memname">
|
|
<tr>
|
|
<td class="memname">bool SDIF_Reset </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>mask</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>timeout</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">mask</td><td>indicate which block to reset. </td></tr>
|
|
<tr><td class="paramname">timeout</td><td>timeout value,set to wait the bit self clear </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>reset result. </dd></dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gabbad56ab4fcf4b10f63d37c78ca2ce9c"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="mlabels">
|
|
<tr>
|
|
<td class="mlabels-left">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">static uint32_t SDIF_GetCardWriteProtect </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gaa64572819b17cb8ab2e0f9e4d1e58079"></a>
|
|
<div class="memitem">
|
|
<div class="memproto">
|
|
<table class="mlabels">
|
|
<tr>
|
|
<td class="mlabels-left">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">static void SDIF_AssertHardwareReset </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="ga1871b7bc4a8845121e3e3c5ec71e9ff6"></a>
|
|
<div class="memitem">
|
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<div class="memproto">
|
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<table class="memname">
|
|
<tr>
|
|
<td class="memname"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> SDIF_SendCommand </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
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<td class="paramtype"><a class="el" href="a00050.html#gafdde0422895c51cdc357bd9f802eb1ce">sdif_command_t</a> * </td>
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<td class="paramname"><em>cmd</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>timeout</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>This api include polling the status of the bit START_COMMAND, if 0 used as timeout value, then this function will return directly without polling the START_CMD status. </p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
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<tr><td class="paramname">cmd</td><td>configuration collection </td></tr>
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<tr><td class="paramname">timeout</td><td>the timeout value of polling START_CMD auto clear status. </td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>command excute status </dd></dl>
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</div>
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<a class="anchor" id="ga4df0d246442af9b0980059c413034ba0"></a>
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<td class="mlabels-left">
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<td class="memname">static void SDIF_EnableGlobalInterrupt </td>
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<td>(</td>
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<td class="paramtype">SDIF_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
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<td class="paramname"><em>enable</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
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<tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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<a class="anchor" id="ga9f5e2107a7313f59ea9ee93826d1814e"></a>
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<tr>
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<td class="mlabels-left">
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<tr>
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<td class="memname">static void SDIF_EnableInterrupt </td>
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<td>(</td>
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<td class="paramtype">SDIF_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>mask</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
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<tr><td class="paramname">mask</td><td>mask </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga82b9d1520698894b52b8e0fc7eb917db"></a>
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<td class="memname">static void SDIF_DisableInterrupt </td>
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<td>(</td>
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<td class="paramtype">SDIF_Type * </td>
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<td class="paramname"><em>base</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>mask</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
|
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<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
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<tr><td class="paramname">mask</td><td>mask </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="ga4d35b808d8b0ee949f1358b7807d8e29"></a>
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<div class="memitem">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static uint32_t SDIF_GetInterruptStatus </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
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<td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
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</div>
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</div>
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<a class="anchor" id="gac308946f04a061629cfbf4997aac2159"></a>
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<div class="memproto">
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<tr>
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<td class="mlabels-left">
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<td class="memname">static uint32_t SDIF_GetEnabledInterruptStatus </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
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|
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</div>
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</div>
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<a class="anchor" id="ga591a0ea1e778d01a4fcc45b2e5c8fade"></a>
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<div class="memitem">
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<tr>
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<td class="mlabels-left">
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<td class="memname">static void SDIF_ClearInterruptStatus </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
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<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>mask</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
|
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</td>
|
|
<td class="mlabels-right">
|
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">mask</td><td>mask to clear </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
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|
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</div>
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</div>
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<a class="anchor" id="gada2c95bc61cf25f0d49fc7daa09fe4a1"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void SDIF_TransferCreateHandle </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gaabd0af455c37e449cdd1cee065d04c73">sdif_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gaeffa26738150dee3d0af5b65608a057f">sdif_transfer_callback_t</a> * </td>
|
|
<td class="paramname"><em>callback</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">void * </td>
|
|
<td class="paramname"><em>userData</em> </td>
|
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
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<p>register call back function for interrupt and enable the interrupt </p>
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">handle</td><td>SDIF handle pointer. </td></tr>
|
|
<tr><td class="paramname">callback</td><td>Structure pointer to contain all callback functions. </td></tr>
|
|
<tr><td class="paramname">userData</td><td>Callback function parameter. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
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|
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</div>
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</div>
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<a class="anchor" id="ga853b2efb18cbddb0544cd973c975107f"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
|
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<td class="memname">static void SDIF_EnableDmaInterrupt </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>mask</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
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</table>
|
|
</td>
|
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<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">mask</td><td>mask to set </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
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|
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</div>
|
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</div>
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<a class="anchor" id="gacc05b4f10da3d87c7b8d5e33fd21a0b2"></a>
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<td class="mlabels-left">
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<td class="memname">static void SDIF_DisableDmaInterrupt </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>mask</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
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</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
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</table>
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">mask</td><td>mask to clear </td></tr>
|
|
</table>
|
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</dd>
|
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</dl>
|
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</div>
|
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</div>
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<a class="anchor" id="ga3a02a30d2f6c5e4031ccba7bdbaf4ff2"></a>
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<div class="memitem">
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<tr>
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<td class="mlabels-left">
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<tr>
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<td class="memname">static uint32_t SDIF_GetInternalDMAStatus </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>the internal DMA status register </dd></dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="gaba1e93be4f74c3707aab32751423025c"></a>
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<td class="memname">static uint32_t SDIF_GetEnabledDMAInterruptStatus </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
|
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</table>
|
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
<dl class="section return"><dt>Returns</dt><dd>the internal DMA status register </dd></dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="ga9ecc4486134980e1bd0f88f8ad49bd6f"></a>
|
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
|
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<td class="mlabels-left">
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<table class="memname">
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<tr>
|
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<td class="memname">static void SDIF_ClearInternalDMAStatus </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>mask</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
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<tr><td class="paramname">mask</td><td>mask to clear </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
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</div>
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</div>
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<a class="anchor" id="gada1c8bc16d487ab726e71f621f8b48fe"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> SDIF_InternalDMAConfig </td>
|
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<td>(</td>
|
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<td class="paramtype">SDIF_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
|
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> * </td>
|
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<td class="paramname"><em>config</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">const uint32_t * </td>
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<td class="paramname"><em>data</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>dataSize</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
|
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<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
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<tr><td class="paramname">config</td><td>DMA configuration collection </td></tr>
|
|
<tr><td class="paramname">data</td><td>buffer pointer </td></tr>
|
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<tr><td class="paramname">dataSize</td><td>buffer size </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
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|
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</div>
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</div>
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<a class="anchor" id="ga04289d3749cfbe9a895fb5572a6f8117"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static void SDIF_EnableInternalDMA </td>
|
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<td>(</td>
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<td class="paramtype">SDIF_Type * </td>
|
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<td class="paramname"><em>base</em>, </td>
|
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</tr>
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">bool </td>
|
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<td class="paramname"><em>enable</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
|
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<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
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<tr><td class="paramname">enable</td><td>internal DMA enable or disable flag. </td></tr>
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</table>
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</dd>
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</dl>
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</div>
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</div>
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<a class="anchor" id="gac7ed837df2405c44bcdb6d777581884f"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
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<td class="mlabels-left">
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<table class="memname">
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<tr>
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<td class="memname">static void SDIF_SendReadWait </td>
|
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<td>(</td>
|
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<td class="paramtype">SDIF_Type * </td>
|
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<td class="paramname"><em>base</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</td>
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<td class="mlabels-right">
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
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</table>
|
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</dd>
|
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</dl>
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|
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</div>
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</div>
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<a class="anchor" id="ga3b0acc99a40a2992041d8628b733027c"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">bool SDIF_AbortReadData </td>
|
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<td>(</td>
|
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<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
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</tr>
|
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<tr>
|
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<td class="paramkey"></td>
|
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<td></td>
|
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<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>timeout</em> </td>
|
|
</tr>
|
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<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
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</table>
|
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">timeout</td><td>timeout value to wait this bit self clear which indicate the data machine reset to idle </td></tr>
|
|
</table>
|
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</dd>
|
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</dl>
|
|
|
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</div>
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</div>
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<a class="anchor" id="ga1e7e5df36b8ef27cf047dadfd7d96a14"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="mlabels">
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<tr>
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<td class="mlabels-left">
|
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<table class="memname">
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<tr>
|
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<td class="memname">static void SDIF_EnableCEATAInterrupt </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>enable</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
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</tr>
|
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</table>
|
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</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
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</tr>
|
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</table>
|
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">enable</td><td>enable/disable flag </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
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</div>
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</div>
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<a class="anchor" id="gaf37227d56a5b14d21b9d6d75566c6aac"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> SDIF_TransferNonBlocking </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gaabd0af455c37e449cdd1cee065d04c73">sdif_handle_t</a> * </td>
|
|
<td class="paramname"><em>handle</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> * </td>
|
|
<td class="paramname"><em>dmaConfig</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gaa092db6631be91815d3659207c75e7dc">sdif_transfer_t</a> * </td>
|
|
<td class="paramname"><em>transfer</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">handle</td><td>handle </td></tr>
|
|
<tr><td class="paramname">dmaConfig</td><td>config structure This parameter can be config as:<ol type="1">
|
|
<li>NULL In this condition, polling transfer mode is selected</li>
|
|
<li>avaliable DMA config In this condition, DMA transfer mode is selected </li>
|
|
</ol>
|
|
</td></tr>
|
|
<tr><td class="paramname">transfer</td><td>transfer configuration collection </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
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<a class="anchor" id="ga864c001cda8f456e8fd9eecca2492c66"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> SDIF_TransferBlocking </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> * </td>
|
|
<td class="paramname"><em>dmaConfig</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gaa092db6631be91815d3659207c75e7dc">sdif_transfer_t</a> * </td>
|
|
<td class="paramname"><em>transfer</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">dmaConfig</td><td>config structure<ol type="1">
|
|
<li>NULL In this condition, polling transfer mode is selected</li>
|
|
<li>avaliable DMA config In this condition, DMA transfer mode is selected </li>
|
|
</ol>
|
|
</td></tr>
|
|
<tr><td class="paramname">transfer</td><td>transfer configuration collection </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
|
|
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</div>
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</div>
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<a class="anchor" id="ga9a8a07fe13db8c3d090fc8c16f5116e0"></a>
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<div class="memitem">
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<div class="memproto">
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<tr>
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<td class="memname"><a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> SDIF_ReleaseDMADescriptor </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#gae6d0cda258bab3c5c069370756dffba7">sdif_dma_config_t</a> * </td>
|
|
<td class="paramname"><em>dmaConfig</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">dmaConfig</td><td>DMA config pointer </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga7328c849a897a65bc5379a1e95a7669d"></a>
|
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">void SDIF_GetCapability </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
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<td></td>
|
|
<td class="paramtype"><a class="el" href="a00050.html#ga9d783f07ed845d9b0fd2cdce1846443d">sdif_capability_t</a> * </td>
|
|
<td class="paramname"><em>capability</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
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<td>)</td>
|
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<td></td><td></td>
|
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</tr>
|
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</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">capability</td><td>capability pointer </td></tr>
|
|
</table>
|
|
</dd>
|
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</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga66ea0d4a73b9f4961437a5d9c9727bfa"></a>
|
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<div class="memitem">
|
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<div class="memproto">
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<table class="mlabels">
|
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<tr>
|
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<td class="mlabels-left">
|
|
<table class="memname">
|
|
<tr>
|
|
<td class="memname">static uint32_t SDIF_GetControllerStatus </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em></td><td>)</td>
|
|
<td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
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</table>
|
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</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
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</div>
|
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<a class="anchor" id="ga3f50e2a3a43c7f9fe7a95cc2a65c26d3"></a>
|
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<div class="memitem">
|
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<div class="memproto">
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<table class="mlabels">
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<tr>
|
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<td class="mlabels-left">
|
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<table class="memname">
|
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<tr>
|
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<td class="memname">static void SDIF_SendCCSD </td>
|
|
<td>(</td>
|
|
<td class="paramtype">SDIF_Type * </td>
|
|
<td class="paramname"><em>base</em>, </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="paramkey"></td>
|
|
<td></td>
|
|
<td class="paramtype">bool </td>
|
|
<td class="paramname"><em>withAutoStop</em> </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td>)</td>
|
|
<td></td><td></td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
<td class="mlabels-right">
|
|
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span> </td>
|
|
</tr>
|
|
</table>
|
|
</div><div class="memdoc">
|
|
<dl class="params"><dt>Parameters</dt><dd>
|
|
<table class="params">
|
|
<tr><td class="paramname">base</td><td>SDIF peripheral base address. </td></tr>
|
|
<tr><td class="paramname">withAutoStop</td><td>auto stop flag </td></tr>
|
|
</table>
|
|
</dd>
|
|
</dl>
|
|
|
|
</div>
|
|
</div>
|
|
<a class="anchor" id="gabb1f2a73fbc1a47f0f3d3f19f7179f62"></a>
|
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<div class="memitem">
|
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<div class="memproto">
|
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<table class="memname">
|
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<tr>
|
|
<td class="memname">void SDIF_ConfigClockDelay </td>
|
|
<td>(</td>
|
|
<td class="paramtype">uint32_t </td>
|
|
<td class="paramname"><em>target_HZ</em>, </td>
|
|
</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">uint32_t </td>
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<td class="paramname"><em>divider</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">target_HZ</td><td>freq work mode </td></tr>
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<tr><td class="paramname">divider</td><td>not used in this function anymore, use DELAY value instead of phase directly. </td></tr>
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</table>
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</dd>
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</dl>
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