1299 lines
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1299 lines
99 KiB
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 <span id="projectnumber">Rev 2.15.000</span>
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<a href="#define-members">Macros</a> |
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<a href="#var-members">Variables</a> </div>
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<div class="title">SPI Driver<div class="ingroups"><a class="el" href="a00249.html">SPI: Serial Peripheral Interface Driver</a></div></div> </div>
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<div class="contents">
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
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<p>This section describes the programming interface of the SPI DMA driver. </p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="files"></a>
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Files</h2></td></tr>
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<tr class="memitem:a00172"><td class="memItemLeft" align="right" valign="top">file  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00172.html">fsl_spi.h</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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Data Structures</h2></td></tr>
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<tr class="memitem:a00425"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a00425">_spi_delay_config</a></td></tr>
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<tr class="memdesc:a00425"><td class="mdescLeft"> </td><td class="mdescRight">SPI delay time configure structure. <a href="a00059.html#a00425">More...</a><br/></td></tr>
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<tr class="separator:a00425"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00428"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a00428">_spi_master_config</a></td></tr>
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<tr class="memdesc:a00428"><td class="mdescLeft"> </td><td class="mdescRight">SPI master user configure structure. <a href="a00059.html#a00428">More...</a><br/></td></tr>
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<tr class="separator:a00428"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00430"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a00430">_spi_slave_config</a></td></tr>
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<tr class="memdesc:a00430"><td class="mdescLeft"> </td><td class="mdescRight">SPI slave user configure structure. <a href="a00059.html#a00430">More...</a><br/></td></tr>
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<tr class="separator:a00430"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00431"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a00431">_spi_transfer</a></td></tr>
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<tr class="memdesc:a00431"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer structure. <a href="a00059.html#a00431">More...</a><br/></td></tr>
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<tr class="separator:a00431"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00427"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a00427">_spi_half_duplex_transfer</a></td></tr>
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<tr class="memdesc:a00427"><td class="mdescLeft"> </td><td class="mdescRight">SPI half-duplex(master only) transfer structure. <a href="a00059.html#a00427">More...</a><br/></td></tr>
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<tr class="separator:a00427"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00424"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a00424">_spi_config</a></td></tr>
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<tr class="memdesc:a00424"><td class="mdescLeft"> </td><td class="mdescRight">Internal configuration structure used in 'spi' and 'spi_dma' driver. <a href="a00059.html#a00424">More...</a><br/></td></tr>
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<tr class="separator:a00424"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a00429"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a00429">_spi_master_handle</a></td></tr>
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<tr class="memdesc:a00429"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer handle structure. <a href="a00059.html#a00429">More...</a><br/></td></tr>
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<tr class="separator:a00429"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:ga1541129ba8262e1649592b5109e2074c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga1541129ba8262e1649592b5109e2074c">SPI_DUMMYDATA</a>   (0x00U)</td></tr>
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<tr class="memdesc:ga1541129ba8262e1649592b5109e2074c"><td class="mdescLeft"> </td><td class="mdescRight">SPI dummy transfer data, the data is sent while txBuff is NULL. <a href="#ga1541129ba8262e1649592b5109e2074c">More...</a><br/></td></tr>
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<tr class="separator:ga1541129ba8262e1649592b5109e2074c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa4717c15ca9604c505a5e5c60df29ebe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gaa4717c15ca9604c505a5e5c60df29ebe">SPI_RETRY_TIMES</a>   0U /* Define to zero means keep waiting until the flag is assert/deassert. */</td></tr>
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<tr class="memdesc:gaa4717c15ca9604c505a5e5c60df29ebe"><td class="mdescLeft"> </td><td class="mdescRight">Retry times for waiting flag. <a href="#gaa4717c15ca9604c505a5e5c60df29ebe">More...</a><br/></td></tr>
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<tr class="separator:gaa4717c15ca9604c505a5e5c60df29ebe"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
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Typedefs</h2></td></tr>
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<tr class="memitem:ga3814c31ee934902d15e6831da736cd47"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00059.html#gaaa2e2f2efa7be228c775fa239ab5ea03">_spi_xfer_option</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga3814c31ee934902d15e6831da736cd47">spi_xfer_option_t</a></td></tr>
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<tr class="memdesc:ga3814c31ee934902d15e6831da736cd47"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer option. <a href="#ga3814c31ee934902d15e6831da736cd47">More...</a><br/></td></tr>
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<tr class="separator:ga3814c31ee934902d15e6831da736cd47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gadc24bb931a59fc64ee4cb60ed56addb4"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00059.html#ga1737fd82344e0800f66b541342894b85">_spi_shift_direction</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gadc24bb931a59fc64ee4cb60ed56addb4">spi_shift_direction_t</a></td></tr>
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<tr class="memdesc:gadc24bb931a59fc64ee4cb60ed56addb4"><td class="mdescLeft"> </td><td class="mdescRight">SPI data shifter direction options. <a href="#gadc24bb931a59fc64ee4cb60ed56addb4">More...</a><br/></td></tr>
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<tr class="separator:gadc24bb931a59fc64ee4cb60ed56addb4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9de95ac02ae859ac26534c06eb47b5b8"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00059.html#ga17f9450af8f63de3fa2b3b105eeec38d">_spi_clock_polarity</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga9de95ac02ae859ac26534c06eb47b5b8">spi_clock_polarity_t</a></td></tr>
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<tr class="memdesc:ga9de95ac02ae859ac26534c06eb47b5b8"><td class="mdescLeft"> </td><td class="mdescRight">SPI clock polarity configuration. <a href="#ga9de95ac02ae859ac26534c06eb47b5b8">More...</a><br/></td></tr>
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<tr class="separator:ga9de95ac02ae859ac26534c06eb47b5b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga12e1c73dd72aaabd76ff5ce23c0d3244"><td class="memItemLeft" align="right" valign="top">typedef enum <a class="el" href="a00059.html#ga76b6ec98408fdaf2e9133952eefa1baa">_spi_clock_phase</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga12e1c73dd72aaabd76ff5ce23c0d3244">spi_clock_phase_t</a></td></tr>
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<tr class="memdesc:ga12e1c73dd72aaabd76ff5ce23c0d3244"><td class="mdescLeft"> </td><td class="mdescRight">SPI clock phase configuration. <a href="#ga12e1c73dd72aaabd76ff5ce23c0d3244">More...</a><br/></td></tr>
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<tr class="separator:ga12e1c73dd72aaabd76ff5ce23c0d3244"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7fef36dc3a69e6e5f998bc61be0a5569"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7fef36dc3a69e6e5f998bc61be0a5569"></a>
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typedef enum <a class="el" href="a00059.html#ga35cda0eedeef2b6fc66409f8d7cbab0f">_spi_txfifo_watermark</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga7fef36dc3a69e6e5f998bc61be0a5569">spi_txfifo_watermark_t</a></td></tr>
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<tr class="memdesc:ga7fef36dc3a69e6e5f998bc61be0a5569"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark values <br/></td></tr>
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<tr class="separator:ga7fef36dc3a69e6e5f998bc61be0a5569"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac97bab8c9034bbe8f10c332eb726feba"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac97bab8c9034bbe8f10c332eb726feba"></a>
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typedef enum <a class="el" href="a00059.html#ga07607e4b4c217d4b9e3a5f5745ba11fc">_spi_rxfifo_watermark</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gac97bab8c9034bbe8f10c332eb726feba">spi_rxfifo_watermark_t</a></td></tr>
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<tr class="memdesc:gac97bab8c9034bbe8f10c332eb726feba"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark values <br/></td></tr>
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<tr class="separator:gac97bab8c9034bbe8f10c332eb726feba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga237f202331592eab8ddadc63b780fa9d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga237f202331592eab8ddadc63b780fa9d"></a>
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typedef enum <a class="el" href="a00059.html#ga63554b1f1f01b827bf6449b55ca80280">_spi_data_width</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga237f202331592eab8ddadc63b780fa9d">spi_data_width_t</a></td></tr>
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<tr class="memdesc:ga237f202331592eab8ddadc63b780fa9d"><td class="mdescLeft"> </td><td class="mdescRight">Transfer data width. <br/></td></tr>
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<tr class="separator:ga237f202331592eab8ddadc63b780fa9d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab2c4dcc02a93990358783cbdce5e6d51"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab2c4dcc02a93990358783cbdce5e6d51"></a>
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typedef enum <a class="el" href="a00059.html#ga6cb1b64722deb9a98a4f1a442f58f8a9">_spi_ssel</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gab2c4dcc02a93990358783cbdce5e6d51">spi_ssel_t</a></td></tr>
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<tr class="memdesc:gab2c4dcc02a93990358783cbdce5e6d51"><td class="mdescLeft"> </td><td class="mdescRight">Slave select. <br/></td></tr>
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<tr class="separator:gab2c4dcc02a93990358783cbdce5e6d51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga81db47cb3d4de3ce1bee11725659b0d7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga81db47cb3d4de3ce1bee11725659b0d7"></a>
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typedef enum <a class="el" href="a00059.html#gaace382ece8210631749c404f115f2998">_spi_spol</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga81db47cb3d4de3ce1bee11725659b0d7">spi_spol_t</a></td></tr>
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<tr class="memdesc:ga81db47cb3d4de3ce1bee11725659b0d7"><td class="mdescLeft"> </td><td class="mdescRight">ssel polarity <br/></td></tr>
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<tr class="separator:ga81db47cb3d4de3ce1bee11725659b0d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5d2ab71dbc12d399a9e125103fd3ec10"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00059.html#a00425">_spi_delay_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga5d2ab71dbc12d399a9e125103fd3ec10">spi_delay_config_t</a></td></tr>
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<tr class="memdesc:ga5d2ab71dbc12d399a9e125103fd3ec10"><td class="mdescLeft"> </td><td class="mdescRight">SPI delay time configure structure. <a href="#ga5d2ab71dbc12d399a9e125103fd3ec10">More...</a><br/></td></tr>
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<tr class="separator:ga5d2ab71dbc12d399a9e125103fd3ec10"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga15e5f834f83ba89de1e920bba9d00394"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00059.html#a00428">_spi_master_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga15e5f834f83ba89de1e920bba9d00394">spi_master_config_t</a></td></tr>
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<tr class="memdesc:ga15e5f834f83ba89de1e920bba9d00394"><td class="mdescLeft"> </td><td class="mdescRight">SPI master user configure structure. <a href="#ga15e5f834f83ba89de1e920bba9d00394">More...</a><br/></td></tr>
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<tr class="separator:ga15e5f834f83ba89de1e920bba9d00394"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa62352a5d0a01f70fe74941809d03ec3"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="a00059.html#a00430">_spi_slave_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gaa62352a5d0a01f70fe74941809d03ec3">spi_slave_config_t</a></td></tr>
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<tr class="memdesc:gaa62352a5d0a01f70fe74941809d03ec3"><td class="mdescLeft"> </td><td class="mdescRight">SPI slave user configure structure. <a href="#gaa62352a5d0a01f70fe74941809d03ec3">More...</a><br/></td></tr>
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<tr class="separator:gaa62352a5d0a01f70fe74941809d03ec3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga59314d5596f240cfbe8b9466bd99ed3f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga59314d5596f240cfbe8b9466bd99ed3f"></a>
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typedef struct <a class="el" href="a00059.html#a00431">_spi_transfer</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga59314d5596f240cfbe8b9466bd99ed3f">spi_transfer_t</a></td></tr>
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<tr class="memdesc:ga59314d5596f240cfbe8b9466bd99ed3f"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer structure. <br/></td></tr>
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<tr class="separator:ga59314d5596f240cfbe8b9466bd99ed3f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5788e6eb50f5486bfd9aaf9ca6bc2930"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5788e6eb50f5486bfd9aaf9ca6bc2930"></a>
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typedef struct <br class="typebreak"/>
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<a class="el" href="a00059.html#a00427">_spi_half_duplex_transfer</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga5788e6eb50f5486bfd9aaf9ca6bc2930">spi_half_duplex_transfer_t</a></td></tr>
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<tr class="memdesc:ga5788e6eb50f5486bfd9aaf9ca6bc2930"><td class="mdescLeft"> </td><td class="mdescRight">SPI half-duplex(master only) transfer structure. <br/></td></tr>
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<tr class="separator:ga5788e6eb50f5486bfd9aaf9ca6bc2930"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa17cf32c2b184e9a5945091ba92a16a4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa17cf32c2b184e9a5945091ba92a16a4"></a>
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typedef struct <a class="el" href="a00059.html#a00424">_spi_config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gaa17cf32c2b184e9a5945091ba92a16a4">spi_config_t</a></td></tr>
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<tr class="memdesc:gaa17cf32c2b184e9a5945091ba92a16a4"><td class="mdescLeft"> </td><td class="mdescRight">Internal configuration structure used in 'spi' and 'spi_dma' driver. <br/></td></tr>
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<tr class="separator:gaa17cf32c2b184e9a5945091ba92a16a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gafb311d8a8b7de084d82915f5a003a300"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gafb311d8a8b7de084d82915f5a003a300"></a>
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typedef struct <a class="el" href="a00059.html#a00429">_spi_master_handle</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gafb311d8a8b7de084d82915f5a003a300">spi_master_handle_t</a></td></tr>
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<tr class="memdesc:gafb311d8a8b7de084d82915f5a003a300"><td class="mdescLeft"> </td><td class="mdescRight">Master handle type. <br/></td></tr>
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<tr class="separator:gafb311d8a8b7de084d82915f5a003a300"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad267cfee3a876b2860217ff94f03f574"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gad267cfee3a876b2860217ff94f03f574"></a>
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typedef <a class="el" href="a00059.html#gafb311d8a8b7de084d82915f5a003a300">spi_master_handle_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a></td></tr>
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<tr class="memdesc:gad267cfee3a876b2860217ff94f03f574"><td class="mdescLeft"> </td><td class="mdescRight">Slave handle type. <br/></td></tr>
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<tr class="separator:gad267cfee3a876b2860217ff94f03f574"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae9bd140aeb645efab6c7552b3994e01a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae9bd140aeb645efab6c7552b3994e01a"></a>
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typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gae9bd140aeb645efab6c7552b3994e01a">spi_master_callback_t</a> )(SPI_Type *base, <a class="el" href="a00059.html#gafb311d8a8b7de084d82915f5a003a300">spi_master_handle_t</a> *handle, <a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> status, void *userData)</td></tr>
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<tr class="memdesc:gae9bd140aeb645efab6c7552b3994e01a"><td class="mdescLeft"> </td><td class="mdescRight">SPI master callback for finished transmit. <br/></td></tr>
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<tr class="separator:gae9bd140aeb645efab6c7552b3994e01a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga86b45b85e036adc762eed5bcd2a0491d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga86b45b85e036adc762eed5bcd2a0491d"></a>
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typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga86b45b85e036adc762eed5bcd2a0491d">spi_slave_callback_t</a> )(SPI_Type *base, <a class="el" href="a00059.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a> *handle, <a class="el" href="a00242.html#gaaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> status, void *userData)</td></tr>
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<tr class="memdesc:ga86b45b85e036adc762eed5bcd2a0491d"><td class="mdescLeft"> </td><td class="mdescRight">SPI slave callback for finished transmit. <br/></td></tr>
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<tr class="separator:ga86b45b85e036adc762eed5bcd2a0491d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2c61065c015d5b1c3247cf979238d434"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga2c61065c015d5b1c3247cf979238d434">flexcomm_spi_master_irq_handler_t</a> )(SPI_Type *base, <a class="el" href="a00059.html#gafb311d8a8b7de084d82915f5a003a300">spi_master_handle_t</a> *handle)</td></tr>
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<tr class="memdesc:ga2c61065c015d5b1c3247cf979238d434"><td class="mdescLeft"> </td><td class="mdescRight">Typedef for master interrupt handler. <a href="#ga2c61065c015d5b1c3247cf979238d434">More...</a><br/></td></tr>
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<tr class="separator:ga2c61065c015d5b1c3247cf979238d434"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae305531ff5562d2c51423f85032942ae"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gae305531ff5562d2c51423f85032942ae">flexcomm_spi_slave_irq_handler_t</a> )(SPI_Type *base, <a class="el" href="a00059.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a> *handle)</td></tr>
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<tr class="memdesc:gae305531ff5562d2c51423f85032942ae"><td class="mdescLeft"> </td><td class="mdescRight">Typedef for slave interrupt handler. <a href="#gae305531ff5562d2c51423f85032942ae">More...</a><br/></td></tr>
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<tr class="separator:gae305531ff5562d2c51423f85032942ae"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
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Enumerations</h2></td></tr>
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<tr class="memitem:gaaa2e2f2efa7be228c775fa239ab5ea03"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gaaa2e2f2efa7be228c775fa239ab5ea03">_spi_xfer_option</a> { <br/>
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  <a class="el" href="a00059.html#ggaaa2e2f2efa7be228c775fa239ab5ea03a368ad1fd03f7af182af9a61c7f4967ed">kSPI_FrameDelay</a> = (SPI_FIFOWR_EOF_MASK),
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<br/>
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  <a class="el" href="a00059.html#ggaaa2e2f2efa7be228c775fa239ab5ea03adbcf2b399fc2e5f1ad5c2586117a1ae9">kSPI_FrameAssert</a> = (SPI_FIFOWR_EOT_MASK)
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<br/>
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}</td></tr>
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<tr class="memdesc:gaaa2e2f2efa7be228c775fa239ab5ea03"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer option. <a href="a00059.html#gaaa2e2f2efa7be228c775fa239ab5ea03">More...</a><br/></td></tr>
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<tr class="separator:gaaa2e2f2efa7be228c775fa239ab5ea03"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1737fd82344e0800f66b541342894b85"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga1737fd82344e0800f66b541342894b85">_spi_shift_direction</a> { <br/>
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  <a class="el" href="a00059.html#gga1737fd82344e0800f66b541342894b85ae7b997e8cff761aab865cbd42c4c3989">kSPI_MsbFirst</a> = 0U,
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  <a class="el" href="a00059.html#gga1737fd82344e0800f66b541342894b85a20ac53684c3e1ad338553cecbfab94a9">kSPI_LsbFirst</a> = 1U
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}</td></tr>
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<tr class="memdesc:ga1737fd82344e0800f66b541342894b85"><td class="mdescLeft"> </td><td class="mdescRight">SPI data shifter direction options. <a href="a00059.html#ga1737fd82344e0800f66b541342894b85">More...</a><br/></td></tr>
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<tr class="separator:ga1737fd82344e0800f66b541342894b85"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga17f9450af8f63de3fa2b3b105eeec38d"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga17f9450af8f63de3fa2b3b105eeec38d">_spi_clock_polarity</a> { <br/>
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  <a class="el" href="a00059.html#gga17f9450af8f63de3fa2b3b105eeec38da031c0ee2693cf1fd621e8b8cba676629">kSPI_ClockPolarityActiveHigh</a> = 0x0U,
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  <a class="el" href="a00059.html#gga17f9450af8f63de3fa2b3b105eeec38dacfc8257079c9604086622df6de326aea">kSPI_ClockPolarityActiveLow</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga17f9450af8f63de3fa2b3b105eeec38d"><td class="mdescLeft"> </td><td class="mdescRight">SPI clock polarity configuration. <a href="a00059.html#ga17f9450af8f63de3fa2b3b105eeec38d">More...</a><br/></td></tr>
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<tr class="separator:ga17f9450af8f63de3fa2b3b105eeec38d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga76b6ec98408fdaf2e9133952eefa1baa"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga76b6ec98408fdaf2e9133952eefa1baa">_spi_clock_phase</a> { <br/>
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  <a class="el" href="a00059.html#gga76b6ec98408fdaf2e9133952eefa1baaad15d61c6fd642f13101edbf401d0c72e">kSPI_ClockPhaseFirstEdge</a> = 0x0U,
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  <a class="el" href="a00059.html#gga76b6ec98408fdaf2e9133952eefa1baaa18a98985c1f7dd56175e4a2724db3675">kSPI_ClockPhaseSecondEdge</a>
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<br/>
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}</td></tr>
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<tr class="memdesc:ga76b6ec98408fdaf2e9133952eefa1baa"><td class="mdescLeft"> </td><td class="mdescRight">SPI clock phase configuration. <a href="a00059.html#ga76b6ec98408fdaf2e9133952eefa1baa">More...</a><br/></td></tr>
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<tr class="separator:ga76b6ec98408fdaf2e9133952eefa1baa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga35cda0eedeef2b6fc66409f8d7cbab0f"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga35cda0eedeef2b6fc66409f8d7cbab0f">_spi_txfifo_watermark</a> { <br/>
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0fab00ed44c27cc2f5c8be6a37a7e54bbb0">kSPI_TxFifo0</a> = 0,
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0fad84aa8fe681fb1922108dd71035a1e7a">kSPI_TxFifo1</a> = 1,
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0faf0f35b4313810fb0a721f6d0c96e361d">kSPI_TxFifo2</a> = 2,
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<br/>
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0fa583e03e419cab47b3a257f39a96f9098">kSPI_TxFifo3</a> = 3,
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0fadd72390240691eb878a8bc236b0ae0f1">kSPI_TxFifo4</a> = 4,
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0fa2d97d5d6a34b441ebdd1a5dcf9cd0d49">kSPI_TxFifo5</a> = 5,
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0fa50675672a2887ec04a4a2d11c183958b">kSPI_TxFifo6</a> = 6,
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  <a class="el" href="a00059.html#gga35cda0eedeef2b6fc66409f8d7cbab0fa4f8e84453e704f97a592944ff3dc5c50">kSPI_TxFifo7</a> = 7
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<br/>
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}</td></tr>
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<tr class="memdesc:ga35cda0eedeef2b6fc66409f8d7cbab0f"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark values <a href="a00059.html#ga35cda0eedeef2b6fc66409f8d7cbab0f">More...</a><br/></td></tr>
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<tr class="separator:ga35cda0eedeef2b6fc66409f8d7cbab0f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga07607e4b4c217d4b9e3a5f5745ba11fc"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga07607e4b4c217d4b9e3a5f5745ba11fc">_spi_rxfifo_watermark</a> { <br/>
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fca2d49ceb52f1bf6c51e2514b35e5d9804">kSPI_RxFifo1</a> = 0,
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fca90eb93fdd80d4baf71ff3d75d4df2454">kSPI_RxFifo2</a> = 1,
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<br/>
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fcab27946413b575e3dd27e0a37c8ccb17b">kSPI_RxFifo3</a> = 2,
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<br/>
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fcaf6dcb50b13a1d8208d1d977ce79ff662">kSPI_RxFifo4</a> = 3,
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fca2c961e2e2c24014368dfe867d2295f3d">kSPI_RxFifo5</a> = 4,
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fcad8bce70560016fbd76c7e1a9e5a2369f">kSPI_RxFifo6</a> = 5,
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fca24b9a255d74d6a5b47d59b82717586dc">kSPI_RxFifo7</a> = 6,
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<br/>
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  <a class="el" href="a00059.html#gga07607e4b4c217d4b9e3a5f5745ba11fcaba4452e3c770cac6e822a0f85e2b53f3">kSPI_RxFifo8</a> = 7
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}</td></tr>
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<tr class="memdesc:ga07607e4b4c217d4b9e3a5f5745ba11fc"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark values <a href="a00059.html#ga07607e4b4c217d4b9e3a5f5745ba11fc">More...</a><br/></td></tr>
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<tr class="separator:ga07607e4b4c217d4b9e3a5f5745ba11fc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga63554b1f1f01b827bf6449b55ca80280"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga63554b1f1f01b827bf6449b55ca80280">_spi_data_width</a> { <br/>
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280a0cb8b30c67c53c6d53712d5bacc818ce">kSPI_Data4Bits</a> = 3,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280a7232b4afb5bd82503252ce608638e6eb">kSPI_Data5Bits</a> = 4,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280a6604fcf5c8bebf904c5b072295027bba">kSPI_Data6Bits</a> = 5,
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<br/>
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280a2c62d3d7d92866c97bb513d4e603518e">kSPI_Data7Bits</a> = 6,
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<br/>
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280ad6b98474a7f14ae7665b7b6d3355657c">kSPI_Data8Bits</a> = 7,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280a4b864a74545165c2cf2dd74134fdadd1">kSPI_Data9Bits</a> = 8,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280a2b2887663c9d025a4137263fc7984024">kSPI_Data10Bits</a> = 9,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280a91e908a7a4725ab9df05549a2b034dec">kSPI_Data11Bits</a> = 10,
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<br/>
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280ad1cfe18fd912c0d25dc32e6ca9fa8f97">kSPI_Data12Bits</a> = 11,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280ad8c2fa2e2f5bf137176dc736cc6a2531">kSPI_Data13Bits</a> = 12,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280ae83435f494d1b9f3ce2f2da0ac03fc38">kSPI_Data14Bits</a> = 13,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280add11012a8887066fad29e23c20d66af8">kSPI_Data15Bits</a> = 14,
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  <a class="el" href="a00059.html#gga63554b1f1f01b827bf6449b55ca80280abbc2566ba4eb2b5e5dc259a7c4f80bcf">kSPI_Data16Bits</a> = 15
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<br/>
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}</td></tr>
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<tr class="memdesc:ga63554b1f1f01b827bf6449b55ca80280"><td class="mdescLeft"> </td><td class="mdescRight">Transfer data width. <a href="a00059.html#ga63554b1f1f01b827bf6449b55ca80280">More...</a><br/></td></tr>
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<tr class="separator:ga63554b1f1f01b827bf6449b55ca80280"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6cb1b64722deb9a98a4f1a442f58f8a9"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga6cb1b64722deb9a98a4f1a442f58f8a9">_spi_ssel</a> { <br/>
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  <a class="el" href="a00059.html#gga6cb1b64722deb9a98a4f1a442f58f8a9aba6e24e125d6e2623fdf66179d8d3595">kSPI_Ssel0</a> = 0,
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<br/>
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  <a class="el" href="a00059.html#gga6cb1b64722deb9a98a4f1a442f58f8a9a6a919364d43781f9da7c826c53008863">kSPI_Ssel1</a> = 1,
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<br/>
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  <a class="el" href="a00059.html#gga6cb1b64722deb9a98a4f1a442f58f8a9a42cddec913f2774241d7d962143e1588">kSPI_Ssel2</a> = 2,
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  <a class="el" href="a00059.html#gga6cb1b64722deb9a98a4f1a442f58f8a9a242faca0999052891ca8ed24a116e466">kSPI_Ssel3</a> = 3
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<br/>
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}</td></tr>
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<tr class="memdesc:ga6cb1b64722deb9a98a4f1a442f58f8a9"><td class="mdescLeft"> </td><td class="mdescRight">Slave select. <a href="a00059.html#ga6cb1b64722deb9a98a4f1a442f58f8a9">More...</a><br/></td></tr>
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<tr class="separator:ga6cb1b64722deb9a98a4f1a442f58f8a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaace382ece8210631749c404f115f2998"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gaace382ece8210631749c404f115f2998">_spi_spol</a> </td></tr>
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<tr class="memdesc:gaace382ece8210631749c404f115f2998"><td class="mdescLeft"> </td><td class="mdescRight">ssel polarity <br/></td></tr>
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<tr class="separator:gaace382ece8210631749c404f115f2998"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga61dadd085c1777f559549e05962b2c9e"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br/>
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  <a class="el" href="a00059.html#gga61dadd085c1777f559549e05962b2c9ea703abdf7900047c4d13536480f3463ab">kStatus_SPI_Busy</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 0),
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<br/>
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  <a class="el" href="a00059.html#gga61dadd085c1777f559549e05962b2c9ea4e32c5b06dccaf4b81e2fd1679e1b560">kStatus_SPI_Idle</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 1),
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<br/>
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  <a class="el" href="a00059.html#gga61dadd085c1777f559549e05962b2c9ea2ff91d774e93aed936b87ffaa18aaf9e">kStatus_SPI_Error</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 2),
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  <a class="el" href="a00059.html#gga61dadd085c1777f559549e05962b2c9eab0f4d4de5f92524c9d33524f22a04e03">kStatus_SPI_BaudrateNotSupport</a>,
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  <a class="el" href="a00059.html#gga61dadd085c1777f559549e05962b2c9ea496ced6fffc33d7bbeb01d203dfc4836">kStatus_SPI_Timeout</a> = MAKE_STATUS(kStatusGroup_LPC_SPI, 4)
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}</td></tr>
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<tr class="memdesc:ga61dadd085c1777f559549e05962b2c9e"><td class="mdescLeft"> </td><td class="mdescRight">SPI transfer status. <a href="a00059.html#ga61dadd085c1777f559549e05962b2c9e">More...</a><br/></td></tr>
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<tr class="separator:ga61dadd085c1777f559549e05962b2c9e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaedd690a0f91a0a9eb0fd573b57e31f67"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gaedd690a0f91a0a9eb0fd573b57e31f67">_spi_interrupt_enable</a> { <br/>
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  <a class="el" href="a00059.html#ggaedd690a0f91a0a9eb0fd573b57e31f67a81a10bf611827929fcf8eed0468aea7a">kSPI_RxLvlIrq</a> = SPI_FIFOINTENSET_RXLVL_MASK,
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  <a class="el" href="a00059.html#ggaedd690a0f91a0a9eb0fd573b57e31f67a13d4e9159c4ba5d49adef5e7e5f5b1dd">kSPI_TxLvlIrq</a> = SPI_FIFOINTENSET_TXLVL_MASK
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<br/>
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}</td></tr>
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<tr class="memdesc:gaedd690a0f91a0a9eb0fd573b57e31f67"><td class="mdescLeft"> </td><td class="mdescRight">SPI interrupt sources. <a href="a00059.html#gaedd690a0f91a0a9eb0fd573b57e31f67">More...</a><br/></td></tr>
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<tr class="separator:gaedd690a0f91a0a9eb0fd573b57e31f67"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga88b3958a041355f297213b5c407dded2"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga88b3958a041355f297213b5c407dded2">_spi_statusflags</a> { <br/>
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  <a class="el" href="a00059.html#gga88b3958a041355f297213b5c407dded2a243d09d83665d0ab9deefcb8e14ea1ae">kSPI_TxEmptyFlag</a> = SPI_FIFOSTAT_TXEMPTY_MASK,
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  <a class="el" href="a00059.html#gga88b3958a041355f297213b5c407dded2a3892d0ae82fadd910932410fb86b0415">kSPI_TxNotFullFlag</a> = SPI_FIFOSTAT_TXNOTFULL_MASK,
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  <a class="el" href="a00059.html#gga88b3958a041355f297213b5c407dded2a5dffa125a4a171d539f4d1df9abf6e8a">kSPI_RxNotEmptyFlag</a> = SPI_FIFOSTAT_RXNOTEMPTY_MASK,
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  <a class="el" href="a00059.html#gga88b3958a041355f297213b5c407dded2a24187382b09195b069e487ed1e29cbcd">kSPI_RxFullFlag</a> = SPI_FIFOSTAT_RXFULL_MASK
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<br/>
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}</td></tr>
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<tr class="memdesc:ga88b3958a041355f297213b5c407dded2"><td class="mdescLeft"> </td><td class="mdescRight">SPI status flags. <a href="a00059.html#ga88b3958a041355f297213b5c407dded2">More...</a><br/></td></tr>
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<tr class="separator:ga88b3958a041355f297213b5c407dded2"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
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Variables</h2></td></tr>
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<tr class="memitem:ga9d35e904f2864488f65fddcfb5277f44"><td class="memItemLeft" align="right" valign="top">volatile uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ga9d35e904f2864488f65fddcfb5277f44">s_dummyData</a> []</td></tr>
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<tr class="memdesc:ga9d35e904f2864488f65fddcfb5277f44"><td class="mdescLeft"> </td><td class="mdescRight">SPI default SSEL COUNT. <a href="#ga9d35e904f2864488f65fddcfb5277f44">More...</a><br/></td></tr>
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<tr class="separator:ga9d35e904f2864488f65fddcfb5277f44"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Driver version</h2></td></tr>
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<tr class="memitem:gaeb6046de02dffe9248de71332fac246e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#gaeb6046de02dffe9248de71332fac246e">FSL_SPI_DRIVER_VERSION</a>   (<a class="el" href="a00242.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 3, 1))</td></tr>
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<tr class="memdesc:gaeb6046de02dffe9248de71332fac246e"><td class="mdescLeft"> </td><td class="mdescRight">SPI driver version. <a href="#gaeb6046de02dffe9248de71332fac246e">More...</a><br/></td></tr>
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<tr class="separator:gaeb6046de02dffe9248de71332fac246e"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<hr/><h2 class="groupheader">Data Structure Documentation</h2>
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<a name="a00425" id="a00425"></a>
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<td class="memname">struct _spi_delay_config</td>
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<div class="textblock"><p>Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15. </p>
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</div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a5a9538fb17f9ad1ae6e5bc3654674bf5"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a5a9538fb17f9ad1ae6e5bc3654674bf5">preDelay</a></td></tr>
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<tr class="memdesc:a5a9538fb17f9ad1ae6e5bc3654674bf5"><td class="mdescLeft"> </td><td class="mdescRight">Delay between SSEL assertion and the beginning of transfer. <a href="#a5a9538fb17f9ad1ae6e5bc3654674bf5">More...</a><br/></td></tr>
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<tr class="separator:a5a9538fb17f9ad1ae6e5bc3654674bf5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed8236ecb1aea1a39be3f060e8de34c7"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#aed8236ecb1aea1a39be3f060e8de34c7">postDelay</a></td></tr>
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<tr class="memdesc:aed8236ecb1aea1a39be3f060e8de34c7"><td class="mdescLeft"> </td><td class="mdescRight">Delay between the end of transfer and SSEL deassertion. <a href="#aed8236ecb1aea1a39be3f060e8de34c7">More...</a><br/></td></tr>
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<tr class="separator:aed8236ecb1aea1a39be3f060e8de34c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abf7584dd222128b434052c58d1bdecbc"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#abf7584dd222128b434052c58d1bdecbc">frameDelay</a></td></tr>
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<tr class="memdesc:abf7584dd222128b434052c58d1bdecbc"><td class="mdescLeft"> </td><td class="mdescRight">Delay between frame to frame. <a href="#abf7584dd222128b434052c58d1bdecbc">More...</a><br/></td></tr>
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<tr class="separator:abf7584dd222128b434052c58d1bdecbc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aef054205e545959e62a3aea546cee042"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#aef054205e545959e62a3aea546cee042">transferDelay</a></td></tr>
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<tr class="memdesc:aef054205e545959e62a3aea546cee042"><td class="mdescLeft"> </td><td class="mdescRight">Delay between transfer to transfer. <a href="#aef054205e545959e62a3aea546cee042">More...</a><br/></td></tr>
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<tr class="separator:aef054205e545959e62a3aea546cee042"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a5a9538fb17f9ad1ae6e5bc3654674bf5"></a>
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<td class="memname">uint8_t _spi_delay_config::preDelay</td>
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<td class="memname">uint8_t _spi_delay_config::postDelay</td>
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<td class="memname">uint8_t _spi_delay_config::frameDelay</td>
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<td class="memname">uint8_t _spi_delay_config::transferDelay</td>
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<a name="a00428" id="a00428"></a>
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<td class="memname">struct _spi_master_config</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a1677d25ffaa802e2a44ea7ed20d2ca18"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a1677d25ffaa802e2a44ea7ed20d2ca18"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a1677d25ffaa802e2a44ea7ed20d2ca18">enableLoopback</a></td></tr>
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<tr class="memdesc:a1677d25ffaa802e2a44ea7ed20d2ca18"><td class="mdescLeft"> </td><td class="mdescRight">Enable loopback for test purpose. <br/></td></tr>
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<tr class="memitem:a21f290440b9d5e90f40c297a35e9d5ec"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a21f290440b9d5e90f40c297a35e9d5ec"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a21f290440b9d5e90f40c297a35e9d5ec">enableMaster</a></td></tr>
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<tr class="memdesc:a21f290440b9d5e90f40c297a35e9d5ec"><td class="mdescLeft"> </td><td class="mdescRight">Enable SPI at initialization time. <br/></td></tr>
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<tr class="memitem:a15ea04ce3dbecb805bd69d09bbfdd7f0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a15ea04ce3dbecb805bd69d09bbfdd7f0"></a>
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<a class="el" href="a00059.html#ga9de95ac02ae859ac26534c06eb47b5b8">spi_clock_polarity_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a15ea04ce3dbecb805bd69d09bbfdd7f0">polarity</a></td></tr>
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<tr class="memdesc:a15ea04ce3dbecb805bd69d09bbfdd7f0"><td class="mdescLeft"> </td><td class="mdescRight">Clock polarity. <br/></td></tr>
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<tr class="memitem:adc401e8087ffd719fe719f95953540b3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="adc401e8087ffd719fe719f95953540b3"></a>
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<a class="el" href="a00059.html#ga12e1c73dd72aaabd76ff5ce23c0d3244">spi_clock_phase_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#adc401e8087ffd719fe719f95953540b3">phase</a></td></tr>
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<tr class="memdesc:adc401e8087ffd719fe719f95953540b3"><td class="mdescLeft"> </td><td class="mdescRight">Clock phase. <br/></td></tr>
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<tr class="memitem:ae222bf1f735603efc912489f7d3b778c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ae222bf1f735603efc912489f7d3b778c"></a>
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<a class="el" href="a00059.html#gadc24bb931a59fc64ee4cb60ed56addb4">spi_shift_direction_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ae222bf1f735603efc912489f7d3b778c">direction</a></td></tr>
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<tr class="memdesc:ae222bf1f735603efc912489f7d3b778c"><td class="mdescLeft"> </td><td class="mdescRight">MSB or LSB. <br/></td></tr>
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<tr class="memitem:a8cba2f473c8c924773ddc933be83c939"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a8cba2f473c8c924773ddc933be83c939"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a8cba2f473c8c924773ddc933be83c939">baudRate_Bps</a></td></tr>
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<tr class="memdesc:a8cba2f473c8c924773ddc933be83c939"><td class="mdescLeft"> </td><td class="mdescRight">Baud Rate for SPI in Hz. <br/></td></tr>
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<tr class="memitem:a469b1825c66af9b9a2a1f7f6988cb496"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a469b1825c66af9b9a2a1f7f6988cb496"></a>
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<a class="el" href="a00059.html#ga237f202331592eab8ddadc63b780fa9d">spi_data_width_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a469b1825c66af9b9a2a1f7f6988cb496">dataWidth</a></td></tr>
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<tr class="memdesc:a469b1825c66af9b9a2a1f7f6988cb496"><td class="mdescLeft"> </td><td class="mdescRight">Width of the data. <br/></td></tr>
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<tr class="separator:a469b1825c66af9b9a2a1f7f6988cb496"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9393478a24ae6a6ffbbd29d44bc26c75"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9393478a24ae6a6ffbbd29d44bc26c75"></a>
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<a class="el" href="a00059.html#gab2c4dcc02a93990358783cbdce5e6d51">spi_ssel_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a9393478a24ae6a6ffbbd29d44bc26c75">sselNum</a></td></tr>
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<tr class="memdesc:a9393478a24ae6a6ffbbd29d44bc26c75"><td class="mdescLeft"> </td><td class="mdescRight">Slave select number. <br/></td></tr>
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<tr class="separator:a9393478a24ae6a6ffbbd29d44bc26c75"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0f51045dced477383067e6b7139beccc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0f51045dced477383067e6b7139beccc"></a>
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<a class="el" href="a00059.html#ga81db47cb3d4de3ce1bee11725659b0d7">spi_spol_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a0f51045dced477383067e6b7139beccc">sselPol</a></td></tr>
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<tr class="memdesc:a0f51045dced477383067e6b7139beccc"><td class="mdescLeft"> </td><td class="mdescRight">Configure active CS polarity. <br/></td></tr>
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<tr class="separator:a0f51045dced477383067e6b7139beccc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a283383f8535f2b2bd364bb372ace9851"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a283383f8535f2b2bd364bb372ace9851"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a283383f8535f2b2bd364bb372ace9851">txWatermark</a></td></tr>
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<tr class="memdesc:a283383f8535f2b2bd364bb372ace9851"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark <br/></td></tr>
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<tr class="separator:a283383f8535f2b2bd364bb372ace9851"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1482772b5fe9846211f758a17e333e26"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a1482772b5fe9846211f758a17e333e26"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a1482772b5fe9846211f758a17e333e26">rxWatermark</a></td></tr>
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<tr class="memdesc:a1482772b5fe9846211f758a17e333e26"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark <br/></td></tr>
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<tr class="separator:a1482772b5fe9846211f758a17e333e26"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0dd557fb69673bc7e825d0e9845fd575"><td class="memItemLeft" align="right" valign="top"><a class="el" href="a00059.html#ga5d2ab71dbc12d399a9e125103fd3ec10">spi_delay_config_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a0dd557fb69673bc7e825d0e9845fd575">delayConfig</a></td></tr>
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<tr class="memdesc:a0dd557fb69673bc7e825d0e9845fd575"><td class="mdescLeft"> </td><td class="mdescRight">Delay configuration. <a href="#a0dd557fb69673bc7e825d0e9845fd575">More...</a><br/></td></tr>
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<tr class="separator:a0dd557fb69673bc7e825d0e9845fd575"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a0dd557fb69673bc7e825d0e9845fd575"></a>
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<td class="memname"><a class="el" href="a00059.html#ga5d2ab71dbc12d399a9e125103fd3ec10">spi_delay_config_t</a> _spi_master_config::delayConfig</td>
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</div><div class="memdoc">
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<a name="a00430" id="a00430"></a>
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<td class="memname">struct _spi_slave_config</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a9cd2350556d5f374c285e1cc82d1a0cd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9cd2350556d5f374c285e1cc82d1a0cd"></a>
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bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a9cd2350556d5f374c285e1cc82d1a0cd">enableSlave</a></td></tr>
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<tr class="memdesc:a9cd2350556d5f374c285e1cc82d1a0cd"><td class="mdescLeft"> </td><td class="mdescRight">Enable SPI at initialization time. <br/></td></tr>
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<tr class="memitem:aec2c4ad4d95665683b976ec6ba239f16"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aec2c4ad4d95665683b976ec6ba239f16"></a>
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<a class="el" href="a00059.html#ga9de95ac02ae859ac26534c06eb47b5b8">spi_clock_polarity_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#aec2c4ad4d95665683b976ec6ba239f16">polarity</a></td></tr>
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<tr class="memdesc:aec2c4ad4d95665683b976ec6ba239f16"><td class="mdescLeft"> </td><td class="mdescRight">Clock polarity. <br/></td></tr>
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<tr class="separator:aec2c4ad4d95665683b976ec6ba239f16"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a35333ccd9d63ff0501a613b9607db161"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a35333ccd9d63ff0501a613b9607db161"></a>
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<a class="el" href="a00059.html#ga12e1c73dd72aaabd76ff5ce23c0d3244">spi_clock_phase_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a35333ccd9d63ff0501a613b9607db161">phase</a></td></tr>
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<tr class="memdesc:a35333ccd9d63ff0501a613b9607db161"><td class="mdescLeft"> </td><td class="mdescRight">Clock phase. <br/></td></tr>
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<tr class="separator:a35333ccd9d63ff0501a613b9607db161"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa45fa3b6868b3efab6bb769342a83b08"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aa45fa3b6868b3efab6bb769342a83b08"></a>
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<a class="el" href="a00059.html#gadc24bb931a59fc64ee4cb60ed56addb4">spi_shift_direction_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#aa45fa3b6868b3efab6bb769342a83b08">direction</a></td></tr>
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<tr class="memdesc:aa45fa3b6868b3efab6bb769342a83b08"><td class="mdescLeft"> </td><td class="mdescRight">MSB or LSB. <br/></td></tr>
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<tr class="separator:aa45fa3b6868b3efab6bb769342a83b08"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a42d262df3d5c8b7f90ad8cc4f194dff6"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a42d262df3d5c8b7f90ad8cc4f194dff6"></a>
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<a class="el" href="a00059.html#ga237f202331592eab8ddadc63b780fa9d">spi_data_width_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a42d262df3d5c8b7f90ad8cc4f194dff6">dataWidth</a></td></tr>
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<tr class="memdesc:a42d262df3d5c8b7f90ad8cc4f194dff6"><td class="mdescLeft"> </td><td class="mdescRight">Width of the data. <br/></td></tr>
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<tr class="separator:a42d262df3d5c8b7f90ad8cc4f194dff6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad09544cb7084b593e71e2ab2fa932f6e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad09544cb7084b593e71e2ab2fa932f6e"></a>
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<a class="el" href="a00059.html#ga81db47cb3d4de3ce1bee11725659b0d7">spi_spol_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ad09544cb7084b593e71e2ab2fa932f6e">sselPol</a></td></tr>
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<tr class="memdesc:ad09544cb7084b593e71e2ab2fa932f6e"><td class="mdescLeft"> </td><td class="mdescRight">Configure active CS polarity. <br/></td></tr>
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<tr class="separator:ad09544cb7084b593e71e2ab2fa932f6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9c69c6713b47950e540f3af41872cffe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9c69c6713b47950e540f3af41872cffe"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a9c69c6713b47950e540f3af41872cffe">txWatermark</a></td></tr>
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<tr class="memdesc:a9c69c6713b47950e540f3af41872cffe"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark <br/></td></tr>
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<tr class="separator:a9c69c6713b47950e540f3af41872cffe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af8773abc4a51284ca118dcfe1786216d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af8773abc4a51284ca118dcfe1786216d"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#af8773abc4a51284ca118dcfe1786216d">rxWatermark</a></td></tr>
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<tr class="memdesc:af8773abc4a51284ca118dcfe1786216d"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark <br/></td></tr>
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<tr class="separator:af8773abc4a51284ca118dcfe1786216d"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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</div>
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<a name="a00431" id="a00431"></a>
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<td class="memname">struct _spi_transfer</td>
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</div><div class="memdoc">
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a4c9897ae5dd550dba2db4a5bc4beb00e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4c9897ae5dd550dba2db4a5bc4beb00e"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a4c9897ae5dd550dba2db4a5bc4beb00e">txData</a></td></tr>
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<tr class="memdesc:a4c9897ae5dd550dba2db4a5bc4beb00e"><td class="mdescLeft"> </td><td class="mdescRight">Send buffer. <br/></td></tr>
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<tr class="separator:a4c9897ae5dd550dba2db4a5bc4beb00e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a747148e84f9c242b274a022aed7a0555"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a747148e84f9c242b274a022aed7a0555"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a747148e84f9c242b274a022aed7a0555">rxData</a></td></tr>
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<tr class="memdesc:a747148e84f9c242b274a022aed7a0555"><td class="mdescLeft"> </td><td class="mdescRight">Receive buffer. <br/></td></tr>
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<tr class="separator:a747148e84f9c242b274a022aed7a0555"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a59471cf32712d027d561669583d2f89f"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a59471cf32712d027d561669583d2f89f">configFlags</a></td></tr>
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<tr class="memdesc:a59471cf32712d027d561669583d2f89f"><td class="mdescLeft"> </td><td class="mdescRight">Additional option to control transfer, <a class="el" href="a00059.html#ga3814c31ee934902d15e6831da736cd47">spi_xfer_option_t</a>. <a href="#a59471cf32712d027d561669583d2f89f">More...</a><br/></td></tr>
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<tr class="separator:a59471cf32712d027d561669583d2f89f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a79e2b8992abc1795158494ee18ad4473"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a79e2b8992abc1795158494ee18ad4473"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a79e2b8992abc1795158494ee18ad4473">dataSize</a></td></tr>
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<tr class="memdesc:a79e2b8992abc1795158494ee18ad4473"><td class="mdescLeft"> </td><td class="mdescRight">Transfer bytes. <br/></td></tr>
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<tr class="separator:a79e2b8992abc1795158494ee18ad4473"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h4 class="groupheader">Field Documentation</h4>
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<a class="anchor" id="a59471cf32712d027d561669583d2f89f"></a>
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<td class="memname">uint32_t _spi_transfer::configFlags</td>
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<a name="a00427" id="a00427"></a>
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<td class="memname">struct _spi_half_duplex_transfer</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a080448a05b0c375a4792c23b3e5aea00"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a080448a05b0c375a4792c23b3e5aea00"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a080448a05b0c375a4792c23b3e5aea00">txData</a></td></tr>
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<tr class="memdesc:a080448a05b0c375a4792c23b3e5aea00"><td class="mdescLeft"> </td><td class="mdescRight">Send buffer. <br/></td></tr>
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<tr class="separator:a080448a05b0c375a4792c23b3e5aea00"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6146042bc7848109c2aa8ceee88d1458"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6146042bc7848109c2aa8ceee88d1458"></a>
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uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a6146042bc7848109c2aa8ceee88d1458">rxData</a></td></tr>
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<tr class="memdesc:a6146042bc7848109c2aa8ceee88d1458"><td class="mdescLeft"> </td><td class="mdescRight">Receive buffer. <br/></td></tr>
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<tr class="separator:a6146042bc7848109c2aa8ceee88d1458"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa53d83102495ade899e43aef7b5a99fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aa53d83102495ade899e43aef7b5a99fb"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#aa53d83102495ade899e43aef7b5a99fb">txDataSize</a></td></tr>
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<tr class="memdesc:aa53d83102495ade899e43aef7b5a99fb"><td class="mdescLeft"> </td><td class="mdescRight">Transfer bytes for transmit. <br/></td></tr>
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<tr class="separator:aa53d83102495ade899e43aef7b5a99fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69f3aea64144af631ee97cc42ed4bc56"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a69f3aea64144af631ee97cc42ed4bc56"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a69f3aea64144af631ee97cc42ed4bc56">rxDataSize</a></td></tr>
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<tr class="memdesc:a69f3aea64144af631ee97cc42ed4bc56"><td class="mdescLeft"> </td><td class="mdescRight">Transfer bytes. <br/></td></tr>
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<tr class="separator:a69f3aea64144af631ee97cc42ed4bc56"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adc1f76e21c3fea4cb9aac948342bfcec"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#adc1f76e21c3fea4cb9aac948342bfcec">configFlags</a></td></tr>
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<tr class="memdesc:adc1f76e21c3fea4cb9aac948342bfcec"><td class="mdescLeft"> </td><td class="mdescRight">Transfer configuration flags, <a class="el" href="a00059.html#ga3814c31ee934902d15e6831da736cd47">spi_xfer_option_t</a>. <a href="#adc1f76e21c3fea4cb9aac948342bfcec">More...</a><br/></td></tr>
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<tr class="separator:adc1f76e21c3fea4cb9aac948342bfcec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6ce59b84b55723ce006d4ffd8af48148"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a6ce59b84b55723ce006d4ffd8af48148">isPcsAssertInTransfer</a></td></tr>
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<tr class="memdesc:a6ce59b84b55723ce006d4ffd8af48148"><td class="mdescLeft"> </td><td class="mdescRight">If PCS pin keep assert between transmit and receive. <a href="#a6ce59b84b55723ce006d4ffd8af48148">More...</a><br/></td></tr>
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<tr class="memitem:ace8535f343a6ed512dc3e03f7fec0b94"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ace8535f343a6ed512dc3e03f7fec0b94">isTransmitFirst</a></td></tr>
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<tr class="memdesc:ace8535f343a6ed512dc3e03f7fec0b94"><td class="mdescLeft"> </td><td class="mdescRight">True for transmit first and false for receive first. <a href="#ace8535f343a6ed512dc3e03f7fec0b94">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<td class="memname">uint32_t _spi_half_duplex_transfer::configFlags</td>
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<td class="memname">bool _spi_half_duplex_transfer::isPcsAssertInTransfer</td>
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<p>true for assert and false for deassert. </p>
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<td class="memname">bool _spi_half_duplex_transfer::isTransmitFirst</td>
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<td class="memname">struct _spi_config</td>
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<td class="memname">struct _spi_master_handle</td>
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<div class="textblock"></div><table class="memberdecls">
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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<tr class="memitem:a867963777e36d1376c6650031c56a8dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a867963777e36d1376c6650031c56a8dc"></a>
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uint8_t *volatile </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a867963777e36d1376c6650031c56a8dc">txData</a></td></tr>
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<tr class="memdesc:a867963777e36d1376c6650031c56a8dc"><td class="mdescLeft"> </td><td class="mdescRight">Transfer buffer. <br/></td></tr>
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<tr class="memitem:ac2ff0ccc0b7c02ad4be567e9e09eb840"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac2ff0ccc0b7c02ad4be567e9e09eb840"></a>
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uint8_t *volatile </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ac2ff0ccc0b7c02ad4be567e9e09eb840">rxData</a></td></tr>
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<tr class="memdesc:ac2ff0ccc0b7c02ad4be567e9e09eb840"><td class="mdescLeft"> </td><td class="mdescRight">Receive buffer. <br/></td></tr>
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<tr class="memitem:a6694d3629434500b949c94f88e6f6743"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6694d3629434500b949c94f88e6f6743"></a>
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volatile size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a6694d3629434500b949c94f88e6f6743">txRemainingBytes</a></td></tr>
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<tr class="memdesc:a6694d3629434500b949c94f88e6f6743"><td class="mdescLeft"> </td><td class="mdescRight">Number of data to be transmitted [in bytes]. <br/></td></tr>
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<tr class="memitem:a3706da91ee40a2f2bd006765fa6d9d5f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a3706da91ee40a2f2bd006765fa6d9d5f"></a>
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volatile size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a3706da91ee40a2f2bd006765fa6d9d5f">rxRemainingBytes</a></td></tr>
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<tr class="memdesc:a3706da91ee40a2f2bd006765fa6d9d5f"><td class="mdescLeft"> </td><td class="mdescRight">Number of data to be received [in bytes]. <br/></td></tr>
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<tr class="separator:a3706da91ee40a2f2bd006765fa6d9d5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3b499b11fdcd9160e2a471263b6ed14f"><td class="memItemLeft" align="right" valign="top">volatile int8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a3b499b11fdcd9160e2a471263b6ed14f">toReceiveCount</a></td></tr>
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<tr class="memdesc:a3b499b11fdcd9160e2a471263b6ed14f"><td class="mdescLeft"> </td><td class="mdescRight">The number of data expected to receive in data width. <a href="#a3b499b11fdcd9160e2a471263b6ed14f">More...</a><br/></td></tr>
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<tr class="separator:a3b499b11fdcd9160e2a471263b6ed14f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a90dcc0891804465061db37a61d6a6dfe"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a90dcc0891804465061db37a61d6a6dfe"></a>
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size_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a90dcc0891804465061db37a61d6a6dfe">totalByteCount</a></td></tr>
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<tr class="memdesc:a90dcc0891804465061db37a61d6a6dfe"><td class="mdescLeft"> </td><td class="mdescRight">A number of transfer bytes. <br/></td></tr>
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<tr class="memitem:a4e535bb80a844ac409dbf51c2ecee955"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4e535bb80a844ac409dbf51c2ecee955"></a>
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volatile uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a4e535bb80a844ac409dbf51c2ecee955">state</a></td></tr>
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<tr class="memdesc:a4e535bb80a844ac409dbf51c2ecee955"><td class="mdescLeft"> </td><td class="mdescRight">SPI internal state. <br/></td></tr>
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<tr class="memitem:a23ddc6ed23916e8d059decde7018013b"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a23ddc6ed23916e8d059decde7018013b"></a>
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<a class="el" href="a00059.html#gae9bd140aeb645efab6c7552b3994e01a">spi_master_callback_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a23ddc6ed23916e8d059decde7018013b">callback</a></td></tr>
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<tr class="memdesc:a23ddc6ed23916e8d059decde7018013b"><td class="mdescLeft"> </td><td class="mdescRight">SPI callback. <br/></td></tr>
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void * </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#aaee79d264a914993a6f719038a62f1b9">userData</a></td></tr>
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<tr class="memdesc:aaee79d264a914993a6f719038a62f1b9"><td class="mdescLeft"> </td><td class="mdescRight">Callback parameter. <br/></td></tr>
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<tr class="memitem:a078d736075e4466b9b45e066f33bfb6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a078d736075e4466b9b45e066f33bfb6f"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a078d736075e4466b9b45e066f33bfb6f">dataWidth</a></td></tr>
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<tr class="memdesc:a078d736075e4466b9b45e066f33bfb6f"><td class="mdescLeft"> </td><td class="mdescRight">Width of the data [Valid values: 1 to 16]. <br/></td></tr>
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<tr class="memitem:ade941f6dd3a2fcdf0aad40689a927edc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ade941f6dd3a2fcdf0aad40689a927edc"></a>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ade941f6dd3a2fcdf0aad40689a927edc">sselNum</a></td></tr>
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<tr class="memdesc:ade941f6dd3a2fcdf0aad40689a927edc"><td class="mdescLeft"> </td><td class="mdescRight">Slave select number to be asserted when transferring data [Valid values: 0 to 3]. <br/></td></tr>
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<tr class="memitem:a275f6c34c9089fbb530b69539856fce7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a275f6c34c9089fbb530b69539856fce7"></a>
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uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#a275f6c34c9089fbb530b69539856fce7">configFlags</a></td></tr>
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<tr class="memdesc:a275f6c34c9089fbb530b69539856fce7"><td class="mdescLeft"> </td><td class="mdescRight">Additional option to control transfer. <br/></td></tr>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#af8e6da5db3ee851f4cd404cadb0ba031">txWatermark</a></td></tr>
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<tr class="memdesc:af8e6da5db3ee851f4cd404cadb0ba031"><td class="mdescLeft"> </td><td class="mdescRight">txFIFO watermark <br/></td></tr>
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uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00059.html#ade3cd7ddfb424db1356239c96c27b4c2">rxWatermark</a></td></tr>
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<tr class="memdesc:ade3cd7ddfb424db1356239c96c27b4c2"><td class="mdescLeft"> </td><td class="mdescRight">rxFIFO watermark <br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<td class="memname">volatile int8_t _spi_master_handle::toReceiveCount</td>
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<p>Since the received count and sent count should be the same to complete the transfer, if the sent count is x and the received count is y, toReceiveCount is x-y. </p>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<td class="memname">#define FSL_SPI_DRIVER_VERSION   (<a class="el" href="a00242.html#ga812138aa3315b0c6953c1a26130bcc37">MAKE_VERSION</a>(2, 3, 1))</td>
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<td class="memname">#define SPI_DUMMYDATA   (0x00U)</td>
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<td class="memname">#define SPI_RETRY_TIMES   0U /* Define to zero means keep waiting until the flag is assert/deassert. */</td>
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<h2 class="groupheader">Typedef Documentation</h2>
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<td class="memname">typedef enum <a class="el" href="a00059.html#gaaa2e2f2efa7be228c775fa239ab5ea03">_spi_xfer_option</a> <a class="el" href="a00059.html#ga3814c31ee934902d15e6831da736cd47">spi_xfer_option_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00059.html#ga1737fd82344e0800f66b541342894b85">_spi_shift_direction</a> <a class="el" href="a00059.html#gadc24bb931a59fc64ee4cb60ed56addb4">spi_shift_direction_t</a></td>
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<td class="memname">typedef enum <a class="el" href="a00059.html#ga17f9450af8f63de3fa2b3b105eeec38d">_spi_clock_polarity</a> <a class="el" href="a00059.html#ga9de95ac02ae859ac26534c06eb47b5b8">spi_clock_polarity_t</a></td>
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<td class="memname">typedef struct <a class="el" href="a00059.html#a00425">_spi_delay_config</a> <a class="el" href="a00059.html#ga5d2ab71dbc12d399a9e125103fd3ec10">spi_delay_config_t</a></td>
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<p>Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15. </p>
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<td class="memname">typedef struct <a class="el" href="a00059.html#a00428">_spi_master_config</a> <a class="el" href="a00059.html#ga15e5f834f83ba89de1e920bba9d00394">spi_master_config_t</a></td>
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<td class="memname">typedef struct <a class="el" href="a00059.html#a00430">_spi_slave_config</a> <a class="el" href="a00059.html#gaa62352a5d0a01f70fe74941809d03ec3">spi_slave_config_t</a></td>
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<table class="memname">
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<tr>
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<td class="memname">typedef void(* flexcomm_spi_master_irq_handler_t)(SPI_Type *base, <a class="el" href="a00059.html#gafb311d8a8b7de084d82915f5a003a300">spi_master_handle_t</a> *handle)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<a class="anchor" id="gae305531ff5562d2c51423f85032942ae"></a>
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">typedef void(* flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, <a class="el" href="a00059.html#gad267cfee3a876b2860217ff94f03f574">spi_slave_handle_t</a> *handle)</td>
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</tr>
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</table>
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</div><div class="memdoc">
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</div>
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</div>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<a class="anchor" id="gaaa2e2f2efa7be228c775fa239ab5ea03"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#gaaa2e2f2efa7be228c775fa239ab5ea03">_spi_xfer_option</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaaa2e2f2efa7be228c775fa239ab5ea03a368ad1fd03f7af182af9a61c7f4967ed"></a>kSPI_FrameDelay</em> </td><td class="fielddoc">
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<p>A delay may be inserted, defined in the DLY register. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaaa2e2f2efa7be228c775fa239ab5ea03adbcf2b399fc2e5f1ad5c2586117a1ae9"></a>kSPI_FrameAssert</em> </td><td class="fielddoc">
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<p>SSEL will be deasserted at the end of a transfer. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga1737fd82344e0800f66b541342894b85"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga1737fd82344e0800f66b541342894b85">_spi_shift_direction</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga1737fd82344e0800f66b541342894b85ae7b997e8cff761aab865cbd42c4c3989"></a>kSPI_MsbFirst</em> </td><td class="fielddoc">
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<p>Data transfers start with most significant bit. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga1737fd82344e0800f66b541342894b85a20ac53684c3e1ad338553cecbfab94a9"></a>kSPI_LsbFirst</em> </td><td class="fielddoc">
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<p>Data transfers start with least significant bit. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga17f9450af8f63de3fa2b3b105eeec38d"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga17f9450af8f63de3fa2b3b105eeec38d">_spi_clock_polarity</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga17f9450af8f63de3fa2b3b105eeec38da031c0ee2693cf1fd621e8b8cba676629"></a>kSPI_ClockPolarityActiveHigh</em> </td><td class="fielddoc">
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<p>Active-high SPI clock (idles low). </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga17f9450af8f63de3fa2b3b105eeec38dacfc8257079c9604086622df6de326aea"></a>kSPI_ClockPolarityActiveLow</em> </td><td class="fielddoc">
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<p>Active-low SPI clock (idles high). </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga76b6ec98408fdaf2e9133952eefa1baa"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga76b6ec98408fdaf2e9133952eefa1baa">_spi_clock_phase</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga76b6ec98408fdaf2e9133952eefa1baaad15d61c6fd642f13101edbf401d0c72e"></a>kSPI_ClockPhaseFirstEdge</em> </td><td class="fielddoc">
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<p>First edge on SCK occurs at the middle of the first cycle of a data transfer. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga76b6ec98408fdaf2e9133952eefa1baaa18a98985c1f7dd56175e4a2724db3675"></a>kSPI_ClockPhaseSecondEdge</em> </td><td class="fielddoc">
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<p>First edge on SCK occurs at the start of the first cycle of a data transfer. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga35cda0eedeef2b6fc66409f8d7cbab0f"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga35cda0eedeef2b6fc66409f8d7cbab0f">_spi_txfifo_watermark</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0fab00ed44c27cc2f5c8be6a37a7e54bbb0"></a>kSPI_TxFifo0</em> </td><td class="fielddoc">
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<p>SPI tx watermark is empty. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0fad84aa8fe681fb1922108dd71035a1e7a"></a>kSPI_TxFifo1</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 1 item. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0faf0f35b4313810fb0a721f6d0c96e361d"></a>kSPI_TxFifo2</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 2 items. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0fa583e03e419cab47b3a257f39a96f9098"></a>kSPI_TxFifo3</em> </td><td class="fielddoc">
|
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<p>SPI tx watermark at 3 items. </p>
|
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0fadd72390240691eb878a8bc236b0ae0f1"></a>kSPI_TxFifo4</em> </td><td class="fielddoc">
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<p>SPI tx watermark at 4 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0fa2d97d5d6a34b441ebdd1a5dcf9cd0d49"></a>kSPI_TxFifo5</em> </td><td class="fielddoc">
|
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<p>SPI tx watermark at 5 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0fa50675672a2887ec04a4a2d11c183958b"></a>kSPI_TxFifo6</em> </td><td class="fielddoc">
|
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<p>SPI tx watermark at 6 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga35cda0eedeef2b6fc66409f8d7cbab0fa4f8e84453e704f97a592944ff3dc5c50"></a>kSPI_TxFifo7</em> </td><td class="fielddoc">
|
|
<p>SPI tx watermark at 7 items. </p>
|
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</td></tr>
|
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</table>
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</div>
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</div>
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<a class="anchor" id="ga07607e4b4c217d4b9e3a5f5745ba11fc"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga07607e4b4c217d4b9e3a5f5745ba11fc">_spi_rxfifo_watermark</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fca2d49ceb52f1bf6c51e2514b35e5d9804"></a>kSPI_RxFifo1</em> </td><td class="fielddoc">
|
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<p>SPI rx watermark at 1 item. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fca90eb93fdd80d4baf71ff3d75d4df2454"></a>kSPI_RxFifo2</em> </td><td class="fielddoc">
|
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<p>SPI rx watermark at 2 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fcab27946413b575e3dd27e0a37c8ccb17b"></a>kSPI_RxFifo3</em> </td><td class="fielddoc">
|
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<p>SPI rx watermark at 3 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fcaf6dcb50b13a1d8208d1d977ce79ff662"></a>kSPI_RxFifo4</em> </td><td class="fielddoc">
|
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<p>SPI rx watermark at 4 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fca2c961e2e2c24014368dfe867d2295f3d"></a>kSPI_RxFifo5</em> </td><td class="fielddoc">
|
|
<p>SPI rx watermark at 5 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fcad8bce70560016fbd76c7e1a9e5a2369f"></a>kSPI_RxFifo6</em> </td><td class="fielddoc">
|
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<p>SPI rx watermark at 6 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fca24b9a255d74d6a5b47d59b82717586dc"></a>kSPI_RxFifo7</em> </td><td class="fielddoc">
|
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<p>SPI rx watermark at 7 items. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga07607e4b4c217d4b9e3a5f5745ba11fcaba4452e3c770cac6e822a0f85e2b53f3"></a>kSPI_RxFifo8</em> </td><td class="fielddoc">
|
|
<p>SPI rx watermark at 8 items. </p>
|
|
</td></tr>
|
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</table>
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</div>
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</div>
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<a class="anchor" id="ga63554b1f1f01b827bf6449b55ca80280"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga63554b1f1f01b827bf6449b55ca80280">_spi_data_width</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<table class="fieldtable">
|
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280a0cb8b30c67c53c6d53712d5bacc818ce"></a>kSPI_Data4Bits</em> </td><td class="fielddoc">
|
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<p>4 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280a7232b4afb5bd82503252ce608638e6eb"></a>kSPI_Data5Bits</em> </td><td class="fielddoc">
|
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<p>5 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280a6604fcf5c8bebf904c5b072295027bba"></a>kSPI_Data6Bits</em> </td><td class="fielddoc">
|
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<p>6 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280a2c62d3d7d92866c97bb513d4e603518e"></a>kSPI_Data7Bits</em> </td><td class="fielddoc">
|
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<p>7 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280ad6b98474a7f14ae7665b7b6d3355657c"></a>kSPI_Data8Bits</em> </td><td class="fielddoc">
|
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<p>8 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280a4b864a74545165c2cf2dd74134fdadd1"></a>kSPI_Data9Bits</em> </td><td class="fielddoc">
|
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<p>9 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280a2b2887663c9d025a4137263fc7984024"></a>kSPI_Data10Bits</em> </td><td class="fielddoc">
|
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<p>10 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280a91e908a7a4725ab9df05549a2b034dec"></a>kSPI_Data11Bits</em> </td><td class="fielddoc">
|
|
<p>11 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280ad1cfe18fd912c0d25dc32e6ca9fa8f97"></a>kSPI_Data12Bits</em> </td><td class="fielddoc">
|
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<p>12 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280ad8c2fa2e2f5bf137176dc736cc6a2531"></a>kSPI_Data13Bits</em> </td><td class="fielddoc">
|
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<p>13 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280ae83435f494d1b9f3ce2f2da0ac03fc38"></a>kSPI_Data14Bits</em> </td><td class="fielddoc">
|
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<p>14 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280add11012a8887066fad29e23c20d66af8"></a>kSPI_Data15Bits</em> </td><td class="fielddoc">
|
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<p>15 bits data width </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga63554b1f1f01b827bf6449b55ca80280abbc2566ba4eb2b5e5dc259a7c4f80bcf"></a>kSPI_Data16Bits</em> </td><td class="fielddoc">
|
|
<p>16 bits data width </p>
|
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</td></tr>
|
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</table>
|
|
|
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</div>
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</div>
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<a class="anchor" id="ga6cb1b64722deb9a98a4f1a442f58f8a9"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga6cb1b64722deb9a98a4f1a442f58f8a9">_spi_ssel</a></td>
|
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</tr>
|
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</table>
|
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</div><div class="memdoc">
|
|
<table class="fieldtable">
|
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga6cb1b64722deb9a98a4f1a442f58f8a9aba6e24e125d6e2623fdf66179d8d3595"></a>kSPI_Ssel0</em> </td><td class="fielddoc">
|
|
<p>Slave select 0. </p>
|
|
</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga6cb1b64722deb9a98a4f1a442f58f8a9a6a919364d43781f9da7c826c53008863"></a>kSPI_Ssel1</em> </td><td class="fielddoc">
|
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<p>Slave select 1. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga6cb1b64722deb9a98a4f1a442f58f8a9a42cddec913f2774241d7d962143e1588"></a>kSPI_Ssel2</em> </td><td class="fielddoc">
|
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<p>Slave select 2. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga6cb1b64722deb9a98a4f1a442f58f8a9a242faca0999052891ca8ed24a116e466"></a>kSPI_Ssel3</em> </td><td class="fielddoc">
|
|
<p>Slave select 3. </p>
|
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</td></tr>
|
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</table>
|
|
|
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</div>
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</div>
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<a class="anchor" id="ga61dadd085c1777f559549e05962b2c9e"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">anonymous enum</td>
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</tr>
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</table>
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</div><div class="memdoc">
|
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<table class="fieldtable">
|
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea703abdf7900047c4d13536480f3463ab"></a>kStatus_SPI_Busy</em> </td><td class="fielddoc">
|
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<p>SPI bus is busy. </p>
|
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</td></tr>
|
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea4e32c5b06dccaf4b81e2fd1679e1b560"></a>kStatus_SPI_Idle</em> </td><td class="fielddoc">
|
|
<p>SPI is idle. </p>
|
|
</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea2ff91d774e93aed936b87ffaa18aaf9e"></a>kStatus_SPI_Error</em> </td><td class="fielddoc">
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<p>SPI error. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9eab0f4d4de5f92524c9d33524f22a04e03"></a>kStatus_SPI_BaudrateNotSupport</em> </td><td class="fielddoc">
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<p>Baudrate is not support in current clock source. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="gga61dadd085c1777f559549e05962b2c9ea496ced6fffc33d7bbeb01d203dfc4836"></a>kStatus_SPI_Timeout</em> </td><td class="fielddoc">
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<p>SPI timeout polling status flags. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="gaedd690a0f91a0a9eb0fd573b57e31f67"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#gaedd690a0f91a0a9eb0fd573b57e31f67">_spi_interrupt_enable</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaedd690a0f91a0a9eb0fd573b57e31f67a81a10bf611827929fcf8eed0468aea7a"></a>kSPI_RxLvlIrq</em> </td><td class="fielddoc">
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<p>Rx level interrupt. </p>
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</td></tr>
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<tr><td class="fieldname"><em><a class="anchor" id="ggaedd690a0f91a0a9eb0fd573b57e31f67a13d4e9159c4ba5d49adef5e7e5f5b1dd"></a>kSPI_TxLvlIrq</em> </td><td class="fielddoc">
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<p>Tx level interrupt. </p>
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</td></tr>
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</table>
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</div>
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</div>
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<a class="anchor" id="ga88b3958a041355f297213b5c407dded2"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="a00059.html#ga88b3958a041355f297213b5c407dded2">_spi_statusflags</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a243d09d83665d0ab9deefcb8e14ea1ae"></a>kSPI_TxEmptyFlag</em> </td><td class="fielddoc">
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<p>txFifo is empty </p>
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</td></tr>
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|
<tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a3892d0ae82fadd910932410fb86b0415"></a>kSPI_TxNotFullFlag</em> </td><td class="fielddoc">
|
|
<p>txFifo is not full </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a5dffa125a4a171d539f4d1df9abf6e8a"></a>kSPI_RxNotEmptyFlag</em> </td><td class="fielddoc">
|
|
<p>rxFIFO is not empty </p>
|
|
</td></tr>
|
|
<tr><td class="fieldname"><em><a class="anchor" id="gga88b3958a041355f297213b5c407dded2a24187382b09195b069e487ed1e29cbcd"></a>kSPI_RxFullFlag</em> </td><td class="fielddoc">
|
|
<p>rxFIFO is full </p>
|
|
</td></tr>
|
|
</table>
|
|
|
|
</div>
|
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</div>
|
|
<h2 class="groupheader">Variable Documentation</h2>
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<a class="anchor" id="ga9d35e904f2864488f65fddcfb5277f44"></a>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">volatile uint8_t s_dummyData[]</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Global variable for dummy data value setting. </p>
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</div>
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</div>
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