255 lines
16 KiB
C
255 lines
16 KiB
C
/*
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* Copyright 2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/* clang-format off */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v6.0
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processor: LPC55S69
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package_id: LPC55S69JBD100
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mcu_data: ksdk2_0
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processor_version: 0.2.0
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* clang-format on */
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#include "fsl_common.h"
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#include "fsl_iocon.h"
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#include "pin_mux.h"
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitBootPins
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* Description : Calls initialization functions.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitBootPins(void)
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{
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BOARD_InitPins();
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}
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/* clang-format off */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitPins:
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- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
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mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
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- {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
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slew_rate: standard, invert: disabled, open_drain: disabled}
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- {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
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mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
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- {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
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invert: disabled, open_drain: disabled}
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- {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
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slew_rate: standard, invert: disabled, open_drain: disabled}
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- {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
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open_drain: disabled}
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- {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
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mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
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- {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
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mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
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- {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
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mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled}
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- {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
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mode: pullUp, slew_rate: fast, invert: disabled, open_drain: disabled, asw: enabled}
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- {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: fast, invert: disabled,
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open_drain: disabled}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* clang-format on */
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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/* Function assigned for the Cortex-M33 (Core #0) */
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void BOARD_InitPins(void)
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{
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/* Enables the clock for the I/O controller.: Enable Clock. */
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CLOCK_EnableClock(kCLOCK_Iocon);
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const uint32_t port0_pin10_config = (/* Pin is configured as FC6_SCK */
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IOCON_PIO_FUNC1 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Fast mode, slew rate control is disabled */
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IOCON_PIO_SLEW_FAST |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI |
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/* Analog switch is enabled */
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IOCON_PIO_ASW_EN);
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/* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
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IOCON_PinMuxSet(IOCON, 0U, 10U, port0_pin10_config);
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const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
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IOCON_PIO_FUNC7 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Fast mode, slew rate control is disabled */
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IOCON_PIO_SLEW_FAST |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
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IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
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const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
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IOCON_PIO_FUNC7 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Fast mode, slew rate control is disabled */
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IOCON_PIO_SLEW_FAST |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
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IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
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const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */
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IOCON_PIO_FUNC7 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Fast mode, slew rate control is disabled */
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IOCON_PIO_SLEW_FAST |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
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IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
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const uint32_t port0_pin22_config = (/* Pin is configured as USB0_VBUS */
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IOCON_PIO_FUNC7 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Fast mode, slew rate control is disabled */
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IOCON_PIO_SLEW_FAST |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
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IOCON_PinMuxSet(IOCON, 0U, 22U, port0_pin22_config);
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const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
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IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
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const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
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IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
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const uint32_t port1_pin16_config = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
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IOCON_PIO_FUNC2 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Fast mode, slew rate control is disabled */
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IOCON_PIO_SLEW_FAST |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
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IOCON_PinMuxSet(IOCON, 1U, 16U, port1_pin16_config);
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const uint32_t port1_pin20_config = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
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IOCON_PIO_FUNC5 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
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IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
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const uint32_t port1_pin21_config = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
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IOCON_PIO_FUNC5 |
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/* Selects pull-up function */
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IOCON_PIO_MODE_PULLUP |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
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IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
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const uint32_t port1_pin31_config = (/* Pin is configured as MCLK */
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IOCON_PIO_FUNC1 |
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/* No addition pin function */
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IOCON_PIO_MODE_INACT |
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/* Standard mode, output slew rate control is enabled */
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IOCON_PIO_SLEW_STANDARD |
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/* Input function is not inverted */
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IOCON_PIO_INV_DI |
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/* Enables digital function */
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IOCON_PIO_DIGITAL_EN |
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/* Open drain is disabled */
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IOCON_PIO_OPENDRAIN_DI);
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/* PORT1 PIN31 (coords: 91) is configured as MCLK */
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IOCON_PinMuxSet(IOCON, 1U, 31U, port1_pin31_config);
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}
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/***********************************************************************************************************************
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* EOF
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**********************************************************************************************************************/
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